Renesas ISL6373CRTZ
- Part No.:
- ISL6373CRTZ
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 40-VFQFN Exposed Pad
- Datasheet:
-
ISL6373CRTZ.pdf
- Description:
- IC REG CTRLR INTEL 1OUT 40TQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,940
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Product details
Overview
ISL6373CRTZ from Intersil is a hybrid digital 4-phase PWM controller compliant with Intel VR12.5/VR12 specifications, designed to regulate microprocessor core or memory voltage rails. It delivers ±0.5% closed-loop system accuracy over load, line, and temperature; supports up to 2MHz per phase switching; implements EAPP modulation for fast transient response; and enables auto-phase shedding across 1–4 phases for light-to-full-load efficiency optimization.
For engineers reviewing the ISL6373CRTZ datasheet, ISL6373CRTZ pinout, ISL6373CRTZ application, or ISL6373CRTZ equivalent, key selection considerations include SVID-compliant serial VID interface, differential remote sensing capability, programmable PSI1/PSI2/PSI3 low-power mode behavior, droop control via FB pin current sinking, and integrated thermal monitoring via TM pin with NTC thermistor input.
Technical Context
The ISL6373CRTZ implements Intersil's patented Enhanced Active Pulse Positioning (EAPP) modulation scheme to achieve sub-100ns load-step response without requiring external NVM or firmware. It supports SVID bus communication with conflict-free operation alongside CPU SVID, enabling dynamic VID updates, IMAX/TMAX register programming, and real-time IOUT telemetry reporting.
Current sensing is implemented via precision resistor or DCR-based differential measurement, feeding both droop control (via FB pin current sink) and channel-current balancing logic. Thermal compensation is applied internally to current sense elements using digitized NTC voltage from the TM pin, ensuring stable accuracy across temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Count | Configurable 1–4-phase operation with automatic phase shedding and diode emulation in PSI2/PSI3 modes |
| Output Accuracy | ±0.5% closed-loop system accuracy over full load, line, and temperature range - ensures tight VOUT regulation for CPU core/memory rails |
| Switching Frequency | Up to 2MHz per phase - enables use of smaller magnetics and output capacitors |
| Interface Protocol | SMBus/PMBus/I²C with SVID conflict-free design - allows coexistence with CPU SVID bus for simultaneous VID and telemetry exchange |
| Current Sensing | Differential resistor or DCR sensing with integrated programmable current sense resistors - supports accurate droop programming and per-phase current limiting |
| Thermal Monitoring | TM pin accepts NTC thermistor; internal ADC digitizes temperature for thermal compensation of current sense and thermal shutdown coordination |
| Protection Features | True Catastrophic Failure Protection (CFP), average overcurrent protection, per-phase current limit, output open-sense detection, and configurable protection disable |
Pinout & Package
ISL6373CRTZ is housed in a 48-pin QFN package (7mm × 7mm, 0.5mm pitch) with exposed thermal pad. Pin functions are defined per Intersil FN8350 Rev 0.00.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Input supply rail | Primary power input for controller bias and gate drivers; supports wide input range for buck converter front-end |
| VDD | Bias supply | Internal LDO input; powers core logic and analog blocks; requires local decoupling |
| FB | Feedback reference | Sinks current proportional to sensed load; develops precision droop voltage across feedback resistor for VR12.5/VR12 compliance |
| IMON | Current monitor output | Analog output proportional to total load current; used for external monitoring or precision OCP |
| TM | Thermal monitor input | Accepts NTC thermistor voltage; digitized internally for thermal compensation and fault reporting |
| SCL/SDA | I²C/SMBus interface | Two-wire bidirectional interface for configuration, telemetry readback, and dynamic VID updates |
| PSI# | Power state indicator input | Active-low signal from CPU indicating PSI1/PSI2/PSI3 low-power states; triggers phase shedding and diode emulation |
| EN | Enable input | Threshold-sensitive enable pin for precise power-rail sequencing coordination with other regulators |
Key Features
| Feature | Design Value |
|---|---|
| EAPP Modulation Scheme | Patented pulse positioning architecture delivering <100ns transient response while maintaining phase current balance and minimizing output capacitance requirements |
| Auto Phase Shedding | Dynamic reduction from 4→2→1 phase based on PSI# state and load level, reducing magnetic and switching losses at light load without degrading heavy-load transient performance |
| Droop Control via FB Pin | Current-sinking FB pin enables precise load-line programming directly compatible with Intel VR12.5/VR12 specifications without external op-amps or DACs |
| SVID Conflict-Free Interface | Dedicated SMBus/PMBus/I²C interface operates independently of CPU SVID bus, enabling simultaneous telemetry and VID updates without arbitration or timing conflicts |
| Integrated Thermal Compensation | Digitized NTC reading from TM pin automatically adjusts current sense gain and offset across temperature, preserving ±0.5% system accuracy |
Applications
| Server CPU Core Regulation | Desktop GPU Memory Regulation |
|---|---|
Use Scenario: High-performance dual-socket server motherboard requiring tight Vcore regulation under dynamic workloads including AI inference and virtualization. IC Role / Device Role / Timing Role: Primary 4-phase VR12.5-compliant PWM controller managing core voltage for Intel Xeon Scalable processors with SVID interface and telemetry reporting. Use Value: EAPP modulation ensures sub-100ns load-step response; auto-phase shedding maintains >90% efficiency at 10% load; ±0.5% accuracy prevents CPU throttling due to voltage deviation. | Use Scenario: Enthusiast desktop graphics card with GDDR6X memory subsystem demanding stable, low-noise VDDQ regulation during gaming and rendering. IC Role / Device Role / Timing Role: VR12/VR12.5 memory regulator controller supporting dynamic memory voltage scaling via SVID and real-time current telemetry. Use Value: Differential remote sensing eliminates ground bounce errors; DCR current sensing avoids additional shunt resistors; droop control matches JEDEC memory voltage vs. current profiles. |
| Laptop CPU Power Management | Network Processor SoC Supply |
Use Scenario: Thin-and-light notebook platform with aggressive power gating and deep sleep states (PSI2/PSI3) requiring ultra-low quiescent loss during idle. IC Role / Device Role / Timing Role: Hybrid digital controller implementing diode emulation and single-phase operation in PSI2/PSI3 modes, coordinated via SVID with Intel Core i7/i9 mobile CPUs. Use Value: Diode emulation eliminates reverse recovery losses; TM pin thermal compensation maintains accuracy across chassis temperature gradients; start-up into pre-charged load avoids inrush issues. | Use Scenario: Carrier-grade networking line card with multi-core network processor requiring tightly regulated I/O and core rails with telemetry for thermal-aware power management. IC Role / Device Role / Timing Role: Dual-rail controller (core + I/O) using one ISL6373CRTZ for core and companion device for I/O, sharing SMBus interface and coordinated PSI signaling. Use Value: True CFP and per-phase current limiting protect against short-circuit faults in dense PCB layouts; programmable slew rate on dynamic VID prevents logic upset during voltage transitions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-phase VR controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR35201MTRPBF | Full digital PMBus controller with embedded NVM; supports up to 6 phases; requires firmware update for feature changes | Targets higher-phase-count server VRs; lacks native SVID conflict-free interface; relies on PMBus for all configuration | Choose IR35201MTRPBF when 6-phase scalability or field-upgradable firmware is required; avoid if SVID coexistence or zero-firmware design is mandatory |
| TPS53689RTAT | Analog-based 4-phase controller with proprietary Auto-Track™ loop; no SVID support; uses analog VID pins and dedicated PMBus for telemetry only | Designed for cost-sensitive industrial CPU supplies where SVID is not required; limited to VR12 (not VR12.5) | Choose TPS53689RTAT for non-SVID platforms needing high transient performance without digital interface complexity; verify VR12.5 compliance is unnecessary |
Compared with IR35201MTRPBF and TPS53689RTAT, the ISL6373CRTZ uniquely combines SVID conflict-free operation, VR12.5 compliance, EAPP modulation, and zero-NVM hybrid digital architecture-making it optimal for client/server CPU core supplies where firmware simplicity, SVID integration, and light-load efficiency are critical.
Availability
ISL6373CRTZ is available at Aetrix Electronics and suitable for server CPU core regulation, desktop GPU memory regulation, laptop CPU power management, and network processor SoC supply requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ISL6373CRTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation, now part of Renesas Electronics, designs high-performance analog and power management ICs with focus on precision, efficiency, and system-level integration.
The ISL6373CRTZ belongs to Intersil's EAPP Hybrid Digital PWM Controller product line, engineered specifically for Intel VR12.5/VR12-compliant CPU and memory voltage regulation in high-density computing platforms.
FAQ
What is the primary compliance standard supported by the ISL6373CRTZ?
The ISL6373CRTZ is fully compliant with Intel VR12.5 and VR12 specifications, including SerialVID protocol, programmable IMAX/TMAX registers, and PSI#-driven phase shedding. It supports both core and memory VR applications with SVID conflict-free operation, enabling direct integration into platforms using Intel 3rd–5th generation Core and Xeon processors.
Does the ISL6373CRTZ require external NVM or firmware for configuration?
No, the ISL6373CRTZ is a hybrid digital controller that eliminates the need for external NVM or firmware. Configuration is performed dynamically via SMBus/PMBus/I²C or SVID interface, with all operational parameters-including phase count, droop slope, and PSI behavior-programmable in real time. This reduces BOM cost and simplifies qualification.
How does the ISL6373CRTZ implement droop control without external components?
The ISL6373CRTZ implements droop control through its FB pin, which sinks a current proportional to sensed load current. This current develops a precision voltage drop across the external feedback resistor, creating the required load-line characteristic. No external op-amps, DACs, or compensation networks are needed to meet VR12.5/VR12 droop specifications.
What thermal monitoring capability does the ISL6373CRTZ provide?
The ISL6373CRTZ features a dedicated TM pin that accepts an NTC thermistor voltage. An internal ADC digitizes this signal for real-time thermal monitoring and applies integrated compensation to current sense elements-ensuring ±0.5% system accuracy across temperature. It also supports thermal shutdown coordination and telemetry reporting via SMBus.
Can the ISL6373CRTZ operate with DCR-based current sensing?
Yes, the ISL6373CRTZ supports both precision resistor and DCR-based differential current sensing. Its integrated current sense amplifier accepts voltage signals from either source, enabling accurate load-line programming, channel-current balancing, and per-phase overcurrent protection without adding discrete sensing components.
ISL6373CRTZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 40-VFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Applications:
- Controller, Intel VR12, VR12.5
- Voltage - Input:
- 4.75V ~ 5.25V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.25V ~ 3.04V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-TQFN (5x5)
ISL6373CRTZ FAQ
1.How can I place an order for ISL6373CRTZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6373CRTZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6373CRTZ reliable?
The price and inventory of ISL6373CRTZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6373CRTZ is usually 5 days.
3.What payment methods are accepted for ISL6373CRTZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6373CRTZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6373CRTZ?
ISL6373CRTZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6373CRTZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6373CRTZ?
For technical support, including ISL6373CRTZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6373CRTZ requirements.
6.How does Aetrix verify that ISL6373CRTZ is sourced from the original manufacturer or authorized distributors?
All ISL6373CRTZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6373CRTZ meets industry standards.
7.What is the process for return or replacement of ISL6373CRTZ?
All ISL6373CRTZ units undergo pre-shipment inspection (PSI). If there is an issue with ISL6373CRTZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6373CRTZ part is unused and in its original packaging.
Return procedure for ISL6373CRTZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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