Renesas ISL6376CRZ-T
- Part No.:
- ISL6376CRZ-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
ISL6376CRZ-T.pdf
- Description:
- IC REG CTRLR INTEL 1OUT 48QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL6376CRZ-T from Renesas (formerly Intersil) is a hybrid digital 6-phase PWM controller designed for Intel VR12.5/VR12-compliant microprocessor core and memory voltage regulation. It delivers ±0.5% closed-loop system accuracy, supports up to 2MHz per phase, implements EAPP modulation, and enables auto phase shedding with PSI#-driven 1–2-phase low-power modes for high light-load efficiency in server and desktop CPU power delivery.
For engineers reviewing the ISL6376CRZ-T datasheet, ISL6376CRZ-T pinout, ISL6376CRZ-T application, or ISL6376CRZ-T equivalent, key selection considerations include VR12.5 SVID compliance, droop control via DCR/resistor sensing, IMON-based current telemetry, thermal compensation via TM pin, and conflict-free SMBus/PMBus/I²C interface for digital power management.
Technical Context
The ISL6376CRZ-T implements a hybrid digital architecture combining analog control loops with digital configuration-eliminating NVM and firmware while retaining full PMBus/SVID programmability. Its EAPP modulation scheme enables fast transient response with linear pulse distribution and variable frequency control during load steps to suppress beat-frequency oscillation.
It supports dual-domain operation: VR12.5 core rail (with SerialVID, IMAX/TMAX registers) and VR12/VR12.5 memory rails. Phase shedding is fully automatic and synchronized to PSI# signals; diode emulation in PSI2/PSI3 modes reduces switching and core losses without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Count | 6-phase operation with auto-shedding down to 1 phase; supports phase doubler for extended channel count. |
| Output Accuracy | ±0.5% over line, load, and temperature-enables tight CPU VDD tolerance without calibration. |
| Switching Frequency | Up to 2MHz per phase-reduces output capacitor size and improves transient response bandwidth. |
| Current Sensing | Differential DCR or precision resistor sensing with integrated programmable gain-supports accurate droop programming and channel balancing. |
| Interface Protocol | SMBus/PMBus/I²C with SVID conflict avoidance-allows coexistence with CPU's native SVID bus on same physical lines. |
| Thermal Monitoring | TM pin accepts NTC thermistor; digitized internally for real-time thermal compensation of current sense elements. |
| Protection Features | True Catastrophic Failure Protection (CFP), average OCP, per-phase current limit, open-sense detection-no external fault logic required. |
Pinout & Package
ISL6376CRZ-T is housed in a 48-pin QFN package (7mm × 7mm, 0.5mm pitch) with exposed thermal pad. Pin functions are defined per the ISL6376 datasheet Rev 0.00 (May 2013), with dedicated pins for SVID communication, current sensing (IMON, ISEN+/-), remote sensing (VSNS+/−), thermal monitoring (TM), and phase control (PH0–PH5).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Input supply rail | Power input for internal LDOs and gate drivers; must be decoupled near package. |
| VOUT | Output voltage feedback reference | Connects to regulated output node for closed-loop voltage regulation and droop generation. |
| FB | Feedback input | Develops precision droop voltage drop across external resistor using sensed load current. |
| IMON | Current monitor output | Analog current telemetry signal fed to CPU; also used for OCP and CFP detection. |
| PH0–PH5 | Phase driver outputs | 6 independent high-side/low-side gate drive outputs; each drives one buck phase. |
| TM | Thermal monitor input | Accepts NTC thermistor voltage; enables internal digitization and current-sense thermal compensation. |
| SCL/SDA | I²C/SMBus interface | Two-wire digital interface compatible with PMBus v1.2 and Intel SVID; conflict-free with CPU SVID bus. |
| PSI# | Power state indicator input | Active-low signal from CPU indicating PSI1/PSI2/PSI3 low-power states; triggers phase shedding and diode emulation. |
Key Features
| Feature | Design Value |
|---|---|
| EAPP Modulation | Proprietary Enhanced Active Pulse Positioning enables sub-100ns transient response with evenly distributed PWM pulses and reduced output capacitance requirement. |
| Auto Phase Shedding | Hardware-accelerated phase reduction based on PSI# status-no firmware or host intervention needed for optimal light-load efficiency. |
| Droop Control | Programmable load-line slope via FB/IMON loop-maintains precise VDD vs. IOUT relationship required by Intel VR12.5 specifications. |
| Diode Emulation | Enables discontinuous conduction mode in PSI2/PSI3-eliminates reverse recovery losses and improves >90% efficiency at <10% load. |
| SVID Conflict Avoidance | Dedicated hardware arbitration ensures ISL6376CRZ-T and CPU share SVID bus without timing or protocol collision. |
Applications
| Server CPU Core Regulation | Desktop VRM for High-End GPUs |
|---|---|
Use Scenario: Regulating 0.8–1.5V core voltage for dual-socket Xeon Scalable processors under dynamic 200A+ loads. IC Role / Device Role / Timing Role: Primary 6-phase PWM controller managing VID updates, phase shedding, and droop compensation via SVID. Use Value: ±0.5% accuracy and EAPP modulation ensure stable VDD during rapid DVFS transitions without excessive bulk capacitance. | Use Scenario: Powering PCIe-based discrete GPUs requiring VR12.5-compliant memory rail with fast transient response. IC Role / Device Role / Timing Role: Memory-side VR12/VR12.5 controller supporting SerialVID, TMAX, and BOOT register programming via PMBus. Use Value: Differential remote sensing and DCR current sensing eliminate ground bounce errors, improving regulation accuracy at GPU die location. |
| Workstation Motherboard VRM | Overclocking-Optimized Desktop Platform |
Use Scenario: Delivering tightly regulated 1.25V core voltage to AMD Threadripper or Intel Core i9 with multi-phase scalability. IC Role / Device Role / Timing Role: Hybrid digital controller enabling real-time IMAX/TMAX reprogramming and dynamic VID compensation (DVC) during runtime. Use Value: Programmable slew rate on fast VID steps prevents overshoot during aggressive overclocking voltage ramps. | Use Scenario: Enabling user-adjustable voltage/frequency curves in enthusiast BIOS with telemetry feedback. IC Role / Device Role / Timing Role: Telemetry hub providing IOUT register data, temperature-compensated current readings, and PSI#-synchronized phase state reporting. Use Value: IMON analog output and I²C-accessible IOUT register allow simultaneous hardware monitoring and software tuning without bus contention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 6-phase VR12.5 PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR3567BTRPBF | Full digital architecture with embedded NVM; requires firmware update for feature changes; supports up to 8 phases. | Targets higher-phase-count server VRMs; lacks native SVID conflict avoidance-requires bus isolation. | Choose when firmware configurability and >6-phase scaling outweigh hybrid simplicity and SVID coexistence needs. |
| TPS53689RTAR | Analog-digital hybrid with CSD (Current Sense Diode) option; no IMON analog output; uses proprietary TI GUI instead of PMBus. | Designed for TI ecosystem integration; limited SVID register compatibility (no TMAX/BOOT); no PSI#-driven diode emulation. | Prefer when using TI Power Designer tools and prioritizing cost over Intel specification fidelity and analog telemetry. |
Compared with IR3567BTRPBF and TPS53689RTAR, the ISL6376CRZ-T uniquely combines SVID conflict-free operation, analog IMON telemetry, and hardware-only auto phase shedding-making it optimal for Intel-platform VRMs where bus simplicity, light-load efficiency, and BIOS-transparent power state coordination are critical.
Availability
ISL6376CRZ-T is available at Aetrix Electronics and suitable for server motherboard design, high-end desktop VRM development, and workstation power delivery systems requiring stable component supply, long-lifecycle support, and Intel VR12.5 compliance.
Supply support for ISL6376CRZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation acquired Intersil in 2017 and maintains its high-performance analog and power management portfolio. Intersil was founded in 1967 and specialized in precision analog, power ICs, and interface solutions.
The ISL6376CRZ-T belongs to Intersil's EAPP Hybrid Digital PWM Controller product line, engineered specifically for Intel VR12/VR12.5-compliant CPU and memory voltage regulation with emphasis on transient performance, telemetry accuracy, and green-mode efficiency.
FAQ
What is the primary function of the ISL6376CRZ-T in a CPU voltage regulator?
The ISL6376CRZ-T serves as a 6-phase hybrid digital PWM controller that regulates microprocessor core or memory voltage per Intel VR12.5/VR12 specifications. It manages phase activation/shedding via PSI# signals, implements droop control using DCR or resistor sensing, and provides real-time current telemetry through the IMON pin and IOUT register-enabling precise, adaptive power delivery for modern CPUs. The ISL6376CRZ-T integrates all critical control, protection, and communication functions without requiring external firmware.
Does the ISL6376CRZ-T support both VR12.5 core and VR12 memory rails?
Yes, the ISL6376CRZ-T is explicitly designed to comply with both Intel VR12.5 core and VR12/VR12.5 memory specifications. It supports SerialVID programming of IMAX, TMAX, BOOT, and ADDRESS OFFSET registers, and its SVID interface operates conflict-free alongside the CPU's native SVID bus-allowing concurrent control of core and memory VRMs on shared bus infrastructure. This dual-rail capability is confirmed in the FN8298 datasheet Rev 0.00.
How does the ISL6376CRZ-T achieve high light-load efficiency?
The ISL6376CRZ-T achieves high light-load efficiency through hardware-driven auto phase shedding and diode emulation. Upon receiving PSI# signals from the CPU, it automatically reduces active phases to 1 or 2 and enables discontinuous conduction mode with diode emulation-eliminating reverse recovery losses and reducing magnetic core and switching losses. This occurs without firmware or host intervention, and the ISL6376CRZ-T resumes full 6-phase operation within microseconds when load increases.
What current sensing methods does the ISL6376CRZ-T support?
The ISL6376CRZ-T supports two precision current sensing methods: differential DCR sensing across the output inductor and dedicated current sense resistor sensing. Both methods feed into the FB pin for droop control and the IMON pin for analog telemetry. The device includes integrated programmable gain for current sense amplifiers and supports thermal compensation via the TM pin-ensuring accuracy across temperature and load conditions. These capabilities are fully documented in the ISL6376CRZ-T datasheet FN8298.
Is the ISL6376CRZ-T pin-compatible with other Intersil 6-phase controllers like the ISL6374?
No, the ISL6376CRZ-T is not pin-compatible with the ISL6374 or other members of the ISL63xx family. It uses a unique 48-pin QFN footprint with distinct pin assignments-including dedicated SVID conflict-avoidance logic, enhanced TM functionality, and expanded register mapping for VR12.5 features. Substituting the ISL6376CRZ-T requires PCB layout revision; replacement must be validated against the full FN8298 pinout and thermal pad requirements.
ISL6376CRZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Controller, Intel VR12, VR12.5
- Voltage - Input:
- 4.75V ~ 5.25V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.25V ~ 3.04V
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-QFN (6x6)
ISL6376CRZ-T FAQ
1.How can I place an order for ISL6376CRZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6376CRZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6376CRZ-T reliable?
The price and inventory of ISL6376CRZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6376CRZ-T is usually 5 days.
3.What payment methods are accepted for ISL6376CRZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6376CRZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6376CRZ-T?
ISL6376CRZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6376CRZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6376CRZ-T?
For technical support, including ISL6376CRZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6376CRZ-T requirements.
6.How does Aetrix verify that ISL6376CRZ-T is sourced from the original manufacturer or authorized distributors?
All ISL6376CRZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6376CRZ-T meets industry standards.
7.What is the process for return or replacement of ISL6376CRZ-T?
All ISL6376CRZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6376CRZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6376CRZ-T part is unused and in its original packaging.
Return procedure for ISL6376CRZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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