Renesas ISL6376IRZ
- Part No.:
- ISL6376IRZ
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
ISL6376IRZ.pdf
- Description:
- IC REG CTRLR INTEL 1OUT 48QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,746
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Product details
Overview
ISL6376IRZ from Renesas (formerly Intersil) is a hybrid digital 6-phase PWM controller designed for Intel VR12.5/VR12-compliant microprocessor core and memory voltage regulation. It delivers ±0.5% closed-loop system accuracy, supports up to 2MHz per phase, implements EAPP modulation, and enables auto phase shedding with PSI#-driven 1–2-phase low-power modes for high light-load efficiency in server and desktop CPU power delivery.
For engineers reviewing the ISL6376IRZ datasheet, ISL6376IRZ pinout, ISL6376IRZ application, or ISL6376IRZ equivalent, key selection considerations include VR12.5 SVID compliance, EAPP transient response performance, droop control via DCR/resistor sensing, thermal compensation via TM pin, and SMBus/PMBus programmability without NVM or firmware dependencies.
Technical Context
The ISL6376IRZ integrates a hybrid digital architecture combining analog control loops with digital communication (SMBus/PMBus/I²C), enabling conflict-free operation alongside CPU SVID buses. It implements proprietary Enhanced Active Pulse Positioning (EAPP) modulation for fast transient response and linear PWM pulse distribution across phases.
It supports dynamic VID slew rate control with Dynamic VID Compensation (DVC), precision current sensing via IMON pin and FB-based droop programming, and integrated thermal monitoring using an NTC thermistor on the TM pin with internal digitization and current-sense compensation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Count | Configurable 1–6-phase operation with phase doubler support for scalable CPU core/memory rail design. |
| Output Accuracy | ±0.5% closed-loop system accuracy over load, line, and temperature - ensures tight VOUT regulation under real-world operating conditions. |
| Switching Frequency | Up to 2MHz per phase - enables use of smaller magnetics and output capacitors while maintaining stability. |
| Current Sensing | Differential DCR or precision resistor sensing with integrated programmable current sense resistors - supports accurate load-line (droop) programming and channel-current balancing. |
| Interface Protocol | SMBus/PMBus/I²C with SVID bus conflict avoidance - allows coexistence with CPU serial VID without arbitration issues. |
| Thermal Monitoring | TM pin accepts NTC thermistor input with internal ADC and integrated compensation - enables real-time thermal correction of current sense gain. |
| Protection Features | True Catastrophic Failure Protection (CFP), average OCP, per-phase current limiting, and open-sense protection - provides layered fault coverage for high-reliability power systems. |
Pinout & Package
ISL6376IRZ is housed in a 48-pin QFN package (7mm × 7mm, 0.5mm pitch) with exposed thermal pad. Pin functions are defined per the official ISL6376 datasheet (FN8298), including dedicated IMON, FB, TM, and SVID-compatible bidirectional data/control pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IMON | Current monitor output | Provides analog current feedback signal to CPU; used for IOUT register reporting and PSI# triggering. |
| FB | Inverting feedback input | Senses output voltage for closed-loop regulation; develops precision droop voltage via external resistor network. |
| TM | Thermistor monitoring input | Accepts NTC voltage divider output; enables digitized thermal monitoring and current-sense gain compensation. |
| SCL/SCL_SVID | Serial clock input | Supports dual-bus operation: SMBus/PMBus clock and SVID clock - prevents bus contention during CPU VID updates. |
| SDA/SDA_SVID | Serial data I/O | Bidirectional data line shared between PMBus and SVID protocols with automatic protocol arbitration logic. |
| EN | Enable input | Threshold-sensitive logic input for precise power-rail sequencing coordination with other regulators. |
Key Features
| Feature | Design Value |
|---|---|
| EAPP Modulation | Proprietary pulse positioning scheme delivering faster transient response with fewer bulk capacitors and improved phase current balance during load steps. |
| Auto Phase Shedding | Dynamically reduces active phases (to 1–2) in PSI1/PSI2/PSI3 modes - cuts magnetic and switching losses to sustain >85% efficiency at 10% load. |
| Droop Control | Programmable load-line via FB pin current sourcing - enables precise VOUT vs. IOUT slope matching required by Intel VR12.5 specifications. |
| SVID Compatibility | Full SerialVID support with programmable IMAX, TMAX, BOOT, ADDRESS OFFSET registers - enables direct integration into Intel platform reference designs. |
| Start-up into Pre-charged Load | Safe soft-start sequence that avoids reverse current flow when output capacitor is pre-biased - eliminates risk of damage during hot-insertion or multi-rail sequencing. |
Applications
| Server CPU Core Regulation | Desktop Memory Voltage Regulation |
|---|---|
Use Scenario: Regulating 0.8–1.5V core supply for dual-socket Xeon Scalable processors under dynamic workloads. IC Role / Device Role / Timing Role: Primary 6-phase VR controller managing VID updates, phase shedding, and telemetry reporting via SVID. Use Value: EAPP modulation and auto phase shedding maintain <1% voltage deviation during 50A/µs load transients while achieving >90% peak efficiency. | Use Scenario: Delivering tightly regulated DDR4/DDR5 memory VDDQ rails in high-end gaming motherboards. IC Role / Device Role / Timing Role: VR12.5-compliant memory controller supporting dynamic VID scaling and thermal-aware current limiting. Use Value: ±0.5% system accuracy and DCR-based current sensing ensure stable memory timing margins across temperature and aging. |
| Workstation GPU Power Delivery | High-Performance Computing (HPC) Node PSU |
Use Scenario: Powering high-TDP discrete GPUs requiring fast transient response and robust overcurrent protection. IC Role / Device Role / Timing Role: Hybrid digital controller implementing True CFP and per-phase current limiting to prevent catastrophic failure during GPU boost events. Use Value: Integrated channel-current balancing and diode emulation reduce phase imbalance and improve light-load efficiency by 12% vs. fixed-phase solutions. | Use Scenario: Multi-rail power subsystem in AI accelerator nodes where thermal derating and telemetry logging are critical. IC Role / Device Role / Timing Role: PMBus-programmable controller providing real-time IOUT, VOUT, and temperature telemetry to BMC via SMBus. Use Value: TM pin digitization and thermal compensation of current sense elements maintain ±1.5% current measurement accuracy from –40°C to +125°C. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-phase VR controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR35201MTRPBF | Full digital architecture with embedded NVM and firmware; supports VR12/VR12.5 but lacks EAPP modulation and uses different phase-add/drop algorithm. | Requires firmware update infrastructure; better suited for platforms needing field-upgradable VR configurations. | Choose IR35201MTRPBF if firmware flexibility and PMBus configurability outweigh need for analog-loop speed and zero-NVM BOM simplicity. |
| TPS53679RSBT | Analog-based 6-phase controller with D-CAP+ mode; no SMBus/PMBus interface; supports VR12 but not VR12.5 SerialVID or PSI# signaling. | Limited to non-SVID platforms; relies on external DACs or GPIO for VID control; no telemetry reporting capability. | Choose TPS53679RSBT only for cost-sensitive VR12-only designs where digital telemetry and auto phase shedding are not required. |
Compared with IR35201MTRPBF and TPS53679RSBT, the ISL6376IRZ uniquely combines VR12.5 SVID compliance, EAPP transient performance, and hybrid digital programmability without NVM-making it optimal for Intel platform designs prioritizing fast response, light-load efficiency, and simplified manufacturing.
Availability
ISL6376IRZ is available at Aetrix Electronics and suitable for server CPU core regulation, desktop memory voltage regulation, and workstation GPU power delivery requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ISL6376IRZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation acquired Intersil in 2017 and maintains its high-performance analog and power management portfolio. Renesas is ISO9001-certified and focuses on reliable, automotive-grade and industrial-grade semiconductor solutions.
The ISL6376IRZ belongs to Renesas' EAPP Hybrid Digital PWM Controller product line, engineered specifically for Intel VR12.5/VR12-compliant CPU and memory voltage regulation with emphasis on transient response, efficiency across load range, and seamless SVID integration.
FAQ
What is the primary function of the ISL6376IRZ in a CPU power delivery system?
The ISL6376IRZ serves as a hybrid digital 6-phase PWM controller regulating microprocessor core or memory voltage rails per Intel VR12.5/VR12 specifications. It manages phase activation/deactivation, droop control, current sensing, thermal compensation, and telemetry reporting - all coordinated via SVID or PMBus. Its EAPP modulation and auto phase shedding make the ISL6376IRZ especially effective for maintaining tight voltage regulation during rapid load transients in modern CPUs.
Does the ISL6376IRZ require external NVM or firmware to operate?
No, the ISL6376IRZ operates without external NVM or firmware due to its hybrid digital architecture. Configuration is handled dynamically via SMBus/PMBus or SVID commands, eliminating the need for flash memory or boot code. This simplifies BOM, reduces validation overhead, and avoids firmware update dependencies - a key differentiator of the ISL6376IRZ versus full-digital alternatives.
How does the ISL6376IRZ implement droop control for VR12.5 compliance?
The ISL6376IRZ implements droop control by sourcing current from the FB pin proportional to sensed load current (via IMON or DCR), developing a precision voltage drop across an external feedback resistor. This creates the required VOUT vs. IOUT slope mandated by Intel VR12.5. The ISL6376IRZ supports both resistor- and DCR-based sensing, with programmable gain and offset to fine-tune load-line accuracy - ensuring the ISL6376IRZ meets ±0.5% closed-loop system accuracy across operating conditions.
What thermal monitoring capability does the ISL6376IRZ provide?
The ISL6376IRZ features a dedicated TM pin that interfaces with an external NTC thermistor. Internal circuitry digitizes the thermistor voltage and applies integrated compensation to current-sense elements, correcting for temperature-induced gain drift. This ensures consistent current measurement accuracy from –40°C to +125°C - a critical capability for the ISL6376IRZ in thermally demanding server and workstation environments where thermal derating directly impacts power stage reliability.
Can the ISL6376IRZ start up into a pre-charged output capacitor?
Yes, the ISL6376IRZ supports safe start-up into a pre-charged output capacitor through a controlled soft-start sequence that prevents reverse current flow. This feature protects MOSFETs and gate drivers during hot-insertion scenarios or complex multi-rail power sequencing - a verified capability documented in the ISL6376IRZ datasheet (FN8298) and essential for robust deployment of the ISL6376IRZ in enterprise and HPC platforms.
ISL6376IRZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Applications:
- Controller, Intel VR12, VR12.5
- Voltage - Input:
- 4.75V ~ 5.25V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.25V ~ 3.04V
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-QFN (6x6)
ISL6376IRZ FAQ
1.How can I place an order for ISL6376IRZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6376IRZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6376IRZ reliable?
The price and inventory of ISL6376IRZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6376IRZ is usually 5 days.
3.What payment methods are accepted for ISL6376IRZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6376IRZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6376IRZ?
ISL6376IRZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6376IRZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6376IRZ?
For technical support, including ISL6376IRZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6376IRZ requirements.
6.How does Aetrix verify that ISL6376IRZ is sourced from the original manufacturer or authorized distributors?
All ISL6376IRZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6376IRZ meets industry standards.
7.What is the process for return or replacement of ISL6376IRZ?
All ISL6376IRZ units undergo pre-shipment inspection (PSI). If there is an issue with ISL6376IRZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6376IRZ part is unused and in its original packaging.
Return procedure for ISL6376IRZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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