Renesas ISL6446IAZ-TK
- Part No.:
- ISL6446IAZ-TK
- Manufacturer:
- Renesas
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 24-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
ISL6446IAZ-TK.pdf
- Description:
- IC REG TRPL BUCK/LNR SYNC 24QSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL6446IAZ-TK from Renesas Electronics (formerly Intersil) is a triple-output power controller integrating two 180° out-of-phase voltage-mode PWM buck controllers and one linear regulator controller for broadband, DSL, and networking point-of-load applications. It delivers ±1.5% output voltage regulation down to 0.6V, supports 100kHz–2.5MHz programmable switching frequency, and reduces input ripple via interleaved operation. Designed for ATX power supplies and FPGA/DSP core logic rails.
For engineers reviewing the ISL6446IAZ-TK datasheet, ISL6446IAZ-TK pinout, ISL6446IAZ-TK application, or ISL6446IAZ-TK equivalent, key selection criteria include lossless rDS(ON)-based overcurrent protection, independent soft-start/enable per PWM channel, PGOOD with dual PWM + linear output monitoring, and QSOP-24 package compatibility with prebiased load startup capability.
Technical Context
The ISL6446IAZ-TK implements synchronous buck control using voltage-mode architecture with dedicated error amplifiers (88dB DC gain, 15MHz GBWP) and externally compensated feedback loops. Its 180° phase-shifted dual PWM outputs share a single RT-programmable oscillator (100kHz–2.5MHz), enabling reduced input RMS current and smaller bulk capacitance.
Each PWM channel features lossless high-side MOSFET rDS(ON) current sensing via OCSET pins (110µA current source), latch-off overcurrent protection, and independent SS/EN pins with 30µA pull-up for programmable soft-start. The linear controller uses a transconductance amplifier (2A/V) driving an external PNP or PMOS pass device, with LCFB threshold of 0.595V (±25mV over temperature).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5V–5.5V or 5.5V–24V - supports dual-supply configuration: direct 5V bias at VCC or wide-range VIN with internal 5V LDO |
| Output Regulation Accuracy | ±1.5% over line/temperature - ensures stable 0.6V reference tracking for precise 3.3V/5V/12V rail generation |
| Switching Frequency Range | 100kHz–2.5MHz - enables cost-optimized low-frequency ATX designs or compact high-frequency solutions |
| Overcurrent Sensing | Lossless rDS(ON) method - eliminates sense resistor, improves efficiency, and simplifies PCB layout |
| PGOOD Monitoring | Triple-output validation - asserts only when both PWM outputs are within ±10% and linear output >75% of nominal |
| Thermal Protection | 150°C shutdown with 20°C hysteresis - prevents permanent damage during sustained overload or poor heatsinking |
| Soft-Start Control | Independent 30µA current sources per SS/EN pin - allows staggered ramp timing and voltage tracking between rails |
Pinout & Package
ISL6446IAZ-TK is housed in a RoHS-compliant 24-lead QSOP package (M24.15 drawing), optimized for thermal performance (θJA = 75°C/W) and surface-mount assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BOOT1, BOOT2 | Bootstrap capacitor connection | Provides gate drive voltage for upper N-MOSFETs; tied to internal bootstrap diode cathodes |
| UGATE1, UGATE2 | High-side gate driver output | Drives gates of upper MOSFETs with 2.6Ω pull-up / 2Ω pull-down; 25ns rise/fall into 3300pF |
| PHASE1, PHASE2 | Power node junction | Connects upper MOSFET sources, lower MOSFET drains, and output inductors - critical for current sensing |
| LGATE1, LGATE2 | Low-side gate driver output | Sourced from VCC; drives lower N-MOSFET gates with same drive strength as UGATE |
| FB1, FB2 | PWM feedback input | Monitors output voltage divider; sets regulation point at 0.6V reference; used by PGOOD and OVP/UVP circuits |
| OCSET1, OCSET2 | Overcurrent trip programming | 110µA current source pulls voltage; trip level set by ROCSET resistor and rDS(ON) of upper FET |
| SS1/EN1, SS2/EN2 | Soft-start/enable control | 30µA pull-up charges external capacitor; <1V disables controller; ramp controls output voltage slew rate |
| LCFB | Linear regulator feedback | External divider sets linear output voltage; 0.595V threshold enables regulation down to sub-1V levels |
| LCDR | Linear driver output | Open-drain PNP/PFET driver; sinks ≥50mA to control external pass transistor base/gate |
| PGOOD | Power-good status indicator | Open-drain output pulled low if any monitored output violates tolerance window; delay inversely proportional to fSW |
| VIN | Main input supply | Accepts 4.5V–24V; powers internal regulators and high-current paths; decoupling required near pin |
| VCC | Bias supply input/output | Accepts 5V ±10% directly or outputs regulated 5V when VIN > 5.5V; powers gate drivers and logic |
| RT | Oscillator frequency setting | Resistor to SGND programs fSW from 100kHz (163kΩ) to 2.5MHz (4.75kΩ) |
| SGND | Signal ground reference | Common analog reference for all feedback, compensation, and control signals; must be isolated from PGND |
| PGND | Power ground return | Return path for low-side gate drivers and input capacitors; connects to lower MOSFET sources |
Key Features
| Feature | Design Value |
|---|---|
| 180° out-of-phase dual PWM | Reduces input ripple amplitude and RMS current by >30%, allowing smaller input capacitors and lower EMI |
| Lossless current sensing | Eliminates discrete current-sense resistor, saving board space, BOM cost, and conduction losses |
| Prebiased load startup | Enables seamless ramp from existing output voltage without reverse current or overshoot |
| Voltage tracking capability | Allows coordinated sequencing of multiple rails using shared or cascaded SS/EN networks |
| Triple-output PGOOD monitoring | Ensures system-level power integrity before releasing reset - critical for multi-rail DSP/FPGA applications |
| Programmable hiccup-mode OCP | Latch-off protection with automatic restart on SS/EN toggle or power cycle - prevents thermal runaway |
Applications
| ATX Power Supplies | DSP/FPGA Core Rails |
|---|---|
|
Use Scenario: Primary +5V and +3.3V regulation in desktop/server ATX PSUs with tight ripple and transient requirements. IC Role / Device Role / Timing Role: Dual PWM controller managing interleaved buck stages; linear controller provides auxiliary bias for fan control or monitoring ICs. Use Value: 180° phase shift cuts input capacitor RMS current by ~70%, reducing size/cost while maintaining 94% peak efficiency at 20A. |
Use Scenario: Independent 1.2V core and 2.5V I/O rail generation for Xilinx Spartan or Intel Cyclone FPGAs. IC Role / Device Role / Timing Role: Synchronized dual PWM regulates core and I/O voltages; linear controller supplies clean 1.8V for configuration memory. Use Value: Independent soft-start per channel enables precise power-up sequencing to meet FPGA vendor timing specs (TPU ≤ 10ms). |
| DSL Modem Power | Industrial Networking Switches |
|
Use Scenario: Compact dual-rail power for ADSL2+ line card PHY and microcontroller subsystems in space-constrained modems. IC Role / Device Role / Timing Role: High-frequency PWM (1.5MHz) minimizes inductor size; linear controller powers low-noise analog front-end circuitry. Use Value: 2.5MHz operation enables 0.9µH inductors and 680µF polymer caps, achieving 50mm² total solution area per rail. |
Use Scenario: Redundant 3.3V/5V power for PoE-powered Ethernet switches operating in extended temperature (-40°C to +85°C). IC Role / Device Role / Timing Role: Dual PWM delivers fault-tolerant outputs; thermal shutdown and latch-off OCP ensure reliability under sustained overload. Use Value: ±1.5% regulation accuracy and 150°C thermal cutoff maintain compliance with EN60950-1 safety standards across full industrial range. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP8765GQ-Z | Single-channel synchronous buck controller with integrated MOSFET drivers; no linear regulator; fixed 500kHz frequency | Lacks triple-output capability and phase-interleaving; suitable only for single-rail replacement | Select when replacing one ISL6446IAZ-TK PWM channel in cost-sensitive, non-interleaved designs |
| TPS546B24A | Dual-output digital PWM controller with PMBus interface; supports 2.2MHz max frequency; no linear controller | Requires firmware configuration; adds telemetry but increases design complexity and BOM count | Choose for systems needing real-time telemetry, adaptive voltage scaling, or dynamic margining |
Compared with MP8765GQ-Z and TPS546B24A, the ISL6446IAZ-TK uniquely integrates dual interleaved PWMs plus a linear controller in one QSOP-24 package, enabling compact, analog-controlled triple-rail solutions without external configuration or digital overhead.
Availability
ISL6446IAZ-TK is available at Aetrix Electronics and suitable for ATX power supplies, DSP/FPGA point-of-load regulation, and industrial networking applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ISL6446IAZ-TK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics acquired Intersil in 2017 and maintains its high-performance analog and power management portfolio. Renesas is a global semiconductor leader focused on embedded solutions for automotive, industrial, and infrastructure markets.
The ISL6446IAZ-TK belongs to Renesas' legacy Intersil power controller family, engineered specifically for broadband, DSL, and networking equipment requiring tightly regulated, interleaved multi-rail power with robust fault protection.
FAQ
What input voltage configurations does the ISL6446IAZ-TK support?
The ISL6446IAZ-TK supports two primary input configurations: (1) 4.5V–5.5V applied directly to VCC for 5V-biased operation, or (2) 5.5V–24V applied to VIN, where the internal LDO generates a regulated 5V VCC output. The datasheet specifies that VIN must exceed 5.6V to enable internal regulation, and VCC must always be decoupled with ≥1µF ceramic capacitance placed adjacent to the pin. This dual-input flexibility allows use in both legacy 5V systems and modern wide-input industrial designs.
How does the ISL6446IAZ-TK achieve lossless overcurrent protection?
The ISL6446IAZ-TK implements lossless overcurrent protection by using the upper MOSFET's intrinsic rDS(ON) as a current-sense element. A precision 110µA current source pulls down the OCSET pin, establishing a voltage threshold proportional to rDS(ON). During high-side conduction, the PHASE node voltage is compared to OCSET; if PHASE falls below OCSET, an overcurrent condition is detected. This eliminates the need for external sense resistors, reducing power loss, board area, and BOM cost while maintaining accurate current limiting across temperature.
Can the ISL6446IAZ-TK start up into a prebiased output voltage?
Yes, the ISL6446IAZ-TK supports soft-start into prebiased loads. When the SS/EN pin voltage ramp exceeds the existing output voltage, the upper and lower FETs begin switching seamlessly from that point - avoiding reverse current flow or output overshoot. If the prebias voltage exceeds the final regulated value but remains below the OVP threshold (116% of nominal), the output is pulled down after soft-start completion. This capability is confirmed in Figure 14 of the FN7944 datasheet and is essential for hot-swap and redundant power applications where rails may already be energized.
What is the function of the PGOOD signal on the ISL6446IAZ-TK?
The PGOOD signal on the ISL6446IAZ-TK is an open-drain output that indicates valid regulation across all three outputs: both PWM channels must be within ±10% of their target voltages, and the linear regulator output must exceed 75% of its nominal value. After soft-start completion, a delay timer (tPGOOD = 0.065/fSW) begins; only upon expiration does PGOOD go high (via external pull-up). If any monitored output violates its window, PGOOD immediately pulls low. This behavior is explicitly defined in the "PROTECTION AND OUTPUT MONITOR" section of the FN7944 datasheet.
How is switching frequency programmed on the ISL6446IAZ-TK?
Switching frequency on the ISL6446IAZ-TK is programmed by connecting a resistor (RT) between the RT pin and SGND. The relationship follows Equation 4 in the FN7944 datasheet: fSW ≈ 11290/(RT)1.093. Typical values include 163kΩ for 100kHz and 4.75kΩ for 2.5MHz. The RT pin operates with a 100µA current source, and frequency tolerance is ±10% over temperature. Layout best practice requires routing the RT resistor close to the IC with minimal parasitic capacitance to avoid jitter or frequency drift.
ISL6446IAZ-TK Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 24-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) Synchronous (2), Linear (LDO) (1)
- Number of Outputs:
- 3
- Frequency - Switching:
- 100kHz ~ 2.6MHz
- Voltage/Current - Output 1:
- Controller
- Voltage/Current - Output 2:
- Controller
- Voltage/Current - Output 3:
- Controller
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QSOP
ISL6446IAZ-TK FAQ
1.How can I place an order for ISL6446IAZ-TK through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6446IAZ-TK on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6446IAZ-TK reliable?
The price and inventory of ISL6446IAZ-TK are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6446IAZ-TK is usually 5 days.
3.What payment methods are accepted for ISL6446IAZ-TK?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6446IAZ-TK transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6446IAZ-TK?
ISL6446IAZ-TK orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6446IAZ-TK order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6446IAZ-TK?
For technical support, including ISL6446IAZ-TK datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6446IAZ-TK requirements.
6.How does Aetrix verify that ISL6446IAZ-TK is sourced from the original manufacturer or authorized distributors?
All ISL6446IAZ-TK products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6446IAZ-TK meets industry standards.
7.What is the process for return or replacement of ISL6446IAZ-TK?
All ISL6446IAZ-TK units undergo pre-shipment inspection (PSI). If there is an issue with ISL6446IAZ-TK, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6446IAZ-TK part is unused and in its original packaging.
Return procedure for ISL6446IAZ-TK:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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