Renesas ISL6455AIRZ-TK
- Part No.:
- ISL6455AIRZ-TK
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
ISL6455AIRZ-TK.pdf
- Description:
- IC REG CONV FPGA 3OUT 24QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL6455AIRZ-TK from Renesas (formerly Intersil) is a triple-output power management IC integrating one synchronous buck regulator and two adjustable ultra-low-noise LDOs in a single 24-lead QFN package. It delivers 600mA PWM output (0.8V–3.3V), dual 300mA LDOs with <30µVRMS noise on LDO2, and integrated RESET/PGOOD monitoring - designed specifically for powering WLAN chipsets, FPGAs, and mini-PCI/PCMCIA wireless cards.
For engineers reviewing the ISL6455AIRZ-TK datasheet, ISL6455AIRZ-TK pinout, ISL6455AIRZ-TK application, or ISL6455AIRZ-TK equivalent, key selection criteria include its 750kHz fixed-frequency PWM with external sync capability, dual LDO dropout of 150mV at 300mA, integrated thermal shutdown and overcurrent protection, and compatibility with ceramic output capacitors down to 3.3µF per LDO.
Technical Context
The ISL6455AIRZ-TK implements peak current-mode control in its synchronous buck stage, using integrated P-Channel and N-Channel MOSFETs with internal slope compensation and 750kHz typical switching frequency (500kHz–1MHz sync range). Its dual LDOs employ internal PMOS pass devices with 1.184V reference and external resistor feedback (FB_LDO1/FB_LDO2), each stabilized by 33nF compensation capacitors (CC1/CC2).
RESET functionality is programmable via CT capacitor (25ms minimum timeout), with separate rising/falling thresholds (4.19V/4.16V for ISL6455A), while PG_PWM and PG_LDO provide independent regulation status monitoring. All three outputs feature overcurrent protection, thermal shutdown at +150°C (20°C hysteresis), and UVLO thresholds tailored for 5V input operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PWM Output Voltage Range | 0.8V to 3.3V - supports core voltage scaling for 5V-input FPGA and baseband processors. |
| PWM Max Output Current | 600mA - sufficient for I/O or auxiliary rail in compact wireless modules. |
| LDO1/LDO2 Output Current | 300mA each - enables independent analog and RF supply rails (e.g., VCO, ADC, PLL). |
| LDO2 Output Noise | <30µVRMS (10Hz–100kHz) - critical for low-phase-noise VCO stability in WLAN transceivers. |
| Switching Frequency | 750kHz typical, 500kHz–1MHz syncable - allows use of small 8.2µH inductors and reduces EMI filtering burden. |
| Dropout Voltage | 150mV typical at 300mA - minimizes power loss and heat generation under full load. |
| RESET Timeout | 25ms minimum (CT = 10nF) - meets JEDEC JESD78 requirement for microprocessor reset assertion duration. |
Pinout & Package
ISL6455AIRZ-TK is housed in a 24-lead, 4mm × 4mm, 0.5mm pitch, RoHS-compliant QFN package (JEDEC MO-220) with exposed thermal pad. The package supports high-density PCB layouts and efficient thermal dissipation when the pad is soldered to GND_LDO/PGND planes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN | PWM enable control | CMOS-level input referenced to VIN; pulls PWM into shutdown when low. |
| EN_LDO | Dual LDO enable control | CMOS-level input referenced to VIN; disables both LDO1 and LDO2 when low. |
| FB_PWM | PWM output voltage feedback | Connects to resistor divider (Re/Rf) to set output voltage with 0.45V internal reference. |
| FB_LDO1 / FB_LDO2 | LDO output voltage feedback | Each connects to dedicated resistor divider (Rc/Rd for LDO1; Ra/Rb for LDO2) referencing 1.184V bandgap. |
| PG_PWM / PG_LDO | Power-good status outputs | Open-drain NMOS outputs indicating regulation status of PWM and combined LDOs respectively. |
| RESET | Supervisory reset output | Push-pull active-low output asserting for ≥25ms after VIN rises above 4.19V threshold. |
| CT | Reset timeout timing | Connects to capacitor (e.g., 10nF) to set minimum RESET pulse width (25ms typical). |
| VIN_LDO | LDO input supply | Shared 3.0V–5.5V input for both LDO regulators; decoupled externally with ≥1µF ceramic cap. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated triple-output architecture | Single-chip solution replaces discrete buck + dual-LDO + RESET IC, reducing BOM count and board area by >40%. |
| Synchronous buck with internal MOSFETs | Eliminates external high-side/low-side switches; achieves >93% efficiency at 200mA/1.8V out from 3.3V input. |
| Ultra-low-noise LDO2 | <30µVRMS noise enables direct powering of sensitive VCOs without additional filtering or LDO post-regulation. |
| Programmable RESET with CT pin | Allows precise timeout tuning (2.5ms/nF) to match host processor requirements without external timer ICs. |
| Thermal and overcurrent protection | Auto-recovery thermal shutdown (+150°C trip, +20°C hysteresis) and cycle-by-cycle current limiting prevent damage during fault conditions. |
Applications
| WLAN Mini-PCI Card Power | FPGA Core & I/O Supply |
|---|---|
Use Scenario: Compact 802.11a/b/g/n mini-PCI wireless card requiring isolated, low-noise, and sequenced power rails. IC Role / Device Role / Timing Role: ISL6455AIRZ-TK provides primary 1.8V/3.3V core logic (PWM), 2.5V analog (LDO1), and ultra-clean 2.8V VCO supply (LDO2) with coordinated RESET assertion. Use Value: Eliminates need for three separate regulators and external reset supervisor, enabling sub-25mm² power section footprint. |
Use Scenario: Low-power Spartan or Cyclone FPGA in portable instrumentation needing tightly regulated, low-ripple supplies. IC Role / Device Role / Timing Role: ISL6455AIRZ-TK delivers configurable core voltage (PWM), I/O bank voltage (LDO1), and configuration/PLL supply (LDO2), all with independent enable control. Use Value: Enables dynamic voltage scaling and selective rail shutdown to reduce system standby current below 15µA. |
| PCMCIA Wireless Module | Handheld Test Instrument |
Use Scenario: Legacy PCMCIA-form-factor WLAN module operating from 5V host bus with strict EMI and size constraints. IC Role / Device Role / Timing Role: ISL6455AIRZ-TK acts as main power hub: 3.3V digital rail (PWM), 2.5V interface (LDO1), and 2.8V RF synthesizer supply (LDO2), synchronized to host clock via SYNC pin. Use Value: 750kHz switching frequency and QFN package meet PCMCIA mechanical envelope and conducted emission limits. |
Use Scenario: Battery-powered handheld oscilloscope or spectrum analyzer requiring stable analog supplies amid varying load transients. IC Role / Device Role / Timing Role: ISL6455AIRZ-TK supplies precision ADC reference (LDO1), low-jitter clock generator (LDO2), and digital controller (PWM), with PG_LDO/PG_PWM enabling real-time health monitoring. Use Value: Dual LDOs' 150mV dropout and <30µVRMS noise preserve signal integrity and measurement accuracy across temperature. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65283-1RGER | Two synchronous buck + one LDO; no integrated RESET; 2.5V–5.5V input; 3mm × 3mm QFN-16 | Lacks dedicated ultra-low-noise LDO for VCO; requires external reset IC for processor supervision | Preferred when higher PWM current (2A per channel) and smaller footprint outweigh need for integrated RESET and LDO2 noise performance. |
| MAX8646ETE+ | One buck + two LDOs; 1.8V–5.5V input; 16-pin TQFN; no SYNC or CT pins; RESET not programmable | Fixed 25ms RESET timeout; no external clock sync; LDO2 noise not specified below 50µVRMS | Valid alternative where board space is constrained and design does not require adjustable RESET timing or sub-30µVRMS LDO2 noise. |
Compared with TPS65283-1RGER and MAX8646ETE+, the ISL6455AIRZ-TK uniquely combines programmable RESET timing, 500kHz–1MHz synchronization, and guaranteed <30µVRMS LDO2 noise - making it the only option qualified for VCO-sensitive WLAN mini-PCI designs requiring single-chip integration and JEDEC-compliant reset behavior.
Availability
ISL6455AIRZ-TK is available at Aetrix Electronics and suitable for WLAN mini-PCI cards, FPGA-based portable instruments, and handheld test equipment requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ISL6455AIRZ-TK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation acquired Intersil in 2017 and maintains full technical and manufacturing continuity for legacy Intersil power management products including the ISL6455 family.
The ISL6455AIRZ-TK belongs to Renesas' high-integration wireless power management product line, engineered specifically for space-constrained, noise-sensitive RF applications such as IEEE 802.11 WLAN, Bluetooth, and Zigbee modules.
FAQ
What input voltage range does the ISL6455AIRZ-TK support for its PWM section?
The ISL6455AIRZ-TK PWM section is designed for 5V nominal input: its VIN_PWM UVLO rising threshold is 4.19V and falling threshold is 4.16V, with recommended operating range of 4.2V to 5.5V. This distinguishes it from the ISL6455IRZ (3.3V-input variant) and ensures stable operation when powered directly from standard 5V system rails.
How is the RESET timeout duration set for the ISL6455AIRZ-TK?
The RESET timeout for ISL6455AIRZ-TK is set by an external capacitor on the CT pin, with a linear relationship of 2.5ms per nanofarad. A 10nF capacitor yields the minimum 25ms assertion time, meeting JEDEC JESD78 requirements. The ISL6455AIRZ-TK's RESET block is fully integrated - no external supervisor IC is needed.
Can the ISL6455AIRZ-TK synchronize its PWM switching frequency to an external clock?
Yes, the ISL6455AIRZ-TK accepts an external clock signal on the SYNC pin across 500kHz to 1MHz. It automatically detects the first rising edge and locks to the external frequency without interruption. If the clock stops, it seamlessly reverts to its internal 750kHz oscillator - a key feature for EMI reduction in dense RF layouts.
What is the maximum allowable output noise for LDO2 in the ISL6455AIRZ-TK, and why does it matter?
LDO2 in the ISL6455AIRZ-TK delivers <30µVRMS output noise (10Hz–100kHz, 10µF output cap), verified in production testing. This ultra-low noise is essential for powering voltage-controlled oscillators (VCOs) in WLAN transceivers - minimizing phase jitter and preserving EVM performance in 802.11n/ac OFDM signals.
Does the ISL6455AIRZ-TK require external compensation components for its LDO regulators?
Yes, the ISL6455AIRZ-TK requires two 33nF ceramic capacitors: one from CC1 to GND_LDO for LDO1, and another from CC2 to GND_LDO for LDO2. These are mandatory for stability, load regulation, and achieving the specified <30µVRMS noise on LDO2 - omitting them risks oscillation or degraded transient response.
ISL6455AIRZ-TK Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Converter, FPGA
- Voltage - Input:
- 4.2V ~ 5.5V
- Number of Outputs:
- 3
- Voltage - Output:
- 0.8V ~ 3.3V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (4x4)
ISL6455AIRZ-TK FAQ
1.How can I place an order for ISL6455AIRZ-TK through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6455AIRZ-TK on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6455AIRZ-TK reliable?
The price and inventory of ISL6455AIRZ-TK are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6455AIRZ-TK is usually 5 days.
3.What payment methods are accepted for ISL6455AIRZ-TK?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6455AIRZ-TK transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6455AIRZ-TK?
ISL6455AIRZ-TK orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6455AIRZ-TK order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6455AIRZ-TK?
For technical support, including ISL6455AIRZ-TK datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6455AIRZ-TK requirements.
6.How does Aetrix verify that ISL6455AIRZ-TK is sourced from the original manufacturer or authorized distributors?
All ISL6455AIRZ-TK products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6455AIRZ-TK meets industry standards.
7.What is the process for return or replacement of ISL6455AIRZ-TK?
All ISL6455AIRZ-TK units undergo pre-shipment inspection (PSI). If there is an issue with ISL6455AIRZ-TK, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6455AIRZ-TK part is unused and in its original packaging.
Return procedure for ISL6455AIRZ-TK:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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