My Inquiry
My Account
Renesas ISL6524CB-T
- Part No.:
- ISL6524CB-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
ISL6524CB-T.pdf
- Description:
- IC REG CTRLR PWM 4OUT 28SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:4,165
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL6524CB-T from Renesas Electronics (formerly Intersil) is a VRM8.5-compliant quad-output power system controller integrating one voltage-mode PWM controller for microprocessor core voltage and three linear controllers for AGTL+ 1.2V, AGP 1.5V, and chipset core 1.8V rails. It features a 5-bit TTL DAC (1.050V–1.825V in 25mV steps), ±1% core regulation, ±3% linear regulation, 200kHz fixed-frequency operation, and MOSFET rDS(ON)-based overcurrent sensing - deployed in ATX motherboard power delivery.
For engineers reviewing the ISL6524CB-T datasheet, ISL6524CB-T pinout, ISL6524CB-T application, or ISL6524CB-T equivalent, key selection considerations include VRM8.5 DAC compatibility, synchronous buck gate drive capability (UGATE/LGATE), triple linear regulator drive (DRIVE2/3/4), soft-start sequencing (SS13/SS24), and integrated fault logic with VTTPG/PGOOD signaling.
Technical Context
The ISL6524CB-T implements a single-loop voltage-mode PWM control architecture with high-bandwidth error amplifier (88dB DC gain, 15MHz GBWP) and full 0–100% duty cycle support. Its internal 200kHz oscillator (±15% variation with RT resistor) drives synchronous rectification via UGATE (1A source/1.7Ω sink) and LGATE (1A source/1.4Ω sink) outputs.
Three independent linear regulators use external N-channel MOSFETs or NPN transistors driven by DRIVE2 (1.2V rail), DRIVE3 (1.5V rail), and DRIVE4 (1.8V rail), each with dedicated VSEN inputs (VSEN2/VSEN3/VSEN4) and undervoltage monitoring (75% threshold, 7mV hysteresis). Fault response includes latched shutdown on VOUT1 overvoltage or VOUT4 undervoltage, and counter-based restart on VOUT1 overcurrent or VOUT2/VOUT3 undervoltage.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PWM Output Voltage Range | 1.050V to 1.825V in 25mV steps via 5-bit VID DAC - matches Intel VRM8.5 specification for Pentium III/Xeon core voltage programming. |
| Core Regulation Accuracy | ±1% over temperature - ensures stable microprocessor core supply under thermal stress without external trimming. |
| Linear Output Tolerance | ±3% for VOUT2 (1.2V), VOUT3 (1.5V), VOUT4 (1.8V) - meets AGTL+, AGP, and chipset core voltage requirements. |
| Switching Frequency | 200kHz nominal (185–215kHz range) - balances efficiency, EMI, and inductor size for desktop motherboard applications. |
| Overcurrent Sensing | rDS(ON)-based, no sense resistor required - reduces BOM cost and PCB area while enabling accurate peak current limiting. |
| Soft-Start Control | Two independent soft-start circuits (SS13 for VOUT1/VOUT3; SS24 for VOUT2) - enforces precise power-up sequencing to meet ATX timing and voltage margin requirements. |
| Power-Good Signals | VTTPG (delayed VOUT2 OK) and PGOOD (system-wide OK) open-collector outputs - provide hardware handshaking for CPU reset and system enable logic. |
Pinout & Package
ISL6524CB-T is housed in a 28-pin SOIC package (M28.3 drawing, 300mil width) with exposed pad not present. Pin functions are validated per FN9015 Rev 3.00 datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DRIVE2 (Pin 1) | Linear regulator gate/base driver | Drives external N-MOSFET or NPN for 1.2V AGTL+ bus - supports both FET and bipolar pass devices. |
| FIX (Pin 2) | Linear output voltage configuration | Grounding enables adjustable 1.5V/1.8V outputs via external resistor divider; open = fixed 1.26V/1.5V/1.8V. |
| VID3–VID0, VID25 (Pins 3–7) | DAC input interface | TTL-compatible 5-bit bus setting DACOUT reference - directly programs microprocessor core voltage and OVP/PGOOD thresholds. |
| VSEN2 (Pin 11) | 1.2V output voltage feedback | Monitors AGTL+ rail for regulation (1.2V ±3%) and undervoltage detection (1.08V threshold). |
| SS24 (Pin 12) | Soft-start timing for VOUT2 | 28µA current source charges external capacitor - controls ramp rate of 1.2V rail and triggers VTTPG assertion. |
| SS13 (Pin 13) | Soft-start timing for VOUT1/VOUT3 | 28µA current source charges external capacitor - sequences core and AGP rail startup and enables PHASE switching. |
| VSEN4 (Pin 14) | 1.8V output voltage feedback | Monitors chipset core rail for regulation (1.8V ±3%) and undervoltage detection (1.35V threshold). |
| DRIVE4 (Pin 15) | 1.8V linear regulator driver | Optimized for bipolar NPN pass transistor base drive - delivers up to 40mA sink/source for MCH core supply. |
| VAUX (Pin 16) | Auxiliary bias and sequencing reference | Connected to ATX 3.3V rail - powers VID pull-ups, enables POR, and provides base bias for NPN pass transistors. |
| GND (Pin 17) | Signal ground reference | Low-noise analog/digital common return - separate from PGND to avoid noise coupling into sensitive error amplifiers. |
| DRIVE3 (Pin 18) | 1.5V linear regulator driver | Drives external N-MOSFET or NPN for AGP 1.5V bus - shares same architecture as DRIVE2/DRIVE4. |
| VSEN3 (Pin 19) | 1.5V output voltage feedback | Monitors AGP rail for regulation (1.5V ±3%) and undervoltage detection (1.125V threshold). |
| COMP (Pin 20) | PWM error amplifier output | External compensation node for voltage-mode loop stability - connects to RC network between COMP and FB. |
| FB (Pin 21) | PWM error amplifier inverting input | Connects to VSEN1 - forms feedback path for core voltage regulation loop with COMP. |
| VSEN1 (Pin 22) | PWM output voltage feedback | Direct connection to VOUT1 - sets PGOOD (±10% of DACOUT) and OVP (115% of DACOUT) thresholds. |
| OCSET (Pin 23) | Overcurrent trip level programming | 200µA current source develops VSET across ROCSET - determines IPEAK trip point using Q1's rDS(ON). |
| PGND (Pin 24) | Power ground return | High-current return path for synchronous buck lower MOSFET - isolated from signal GND to minimize noise injection. |
| LGATE (Pin 25) | Lower MOSFET gate driver | 1A source / 1.4Ω sink capability - drives synchronous rectifier with fast turn-on/turn-off for high efficiency. |
| PHASE (Pin 26) | Switch node sensing | Connects to source of upper MOSFET - used for rDS(ON) current sensing and gate drive return path. |
| UGATE (Pin 27) | Upper MOSFET gate driver | 1A source / 1.7Ω sink - delivers high peak current for fast Q1 turn-on, minimizing conduction losses. |
| VCC (Pin 28) | Main bias supply input | +12V ±10% input - powers internal circuitry and provides gate charge for all drivers; monitored for POR at 10.4V rising threshold. |
Key Features
| Feature | Design Value |
|---|---|
| Quad-output integration | Single IC replaces four discrete controllers - reduces component count, layout complexity, and board space on ATX motherboards. |
| VRM8.5 DAC compliance | 5-bit VID interface with 25mV step resolution - ensures drop-in compatibility with Intel Pentium III and Xeon processors requiring VRM8.5 voltage scaling. |
| rDS(ON)-based overcurrent protection | Eliminates need for external current-sense resistor - lowers BOM cost, improves thermal performance, and avoids parasitic inductance errors. |
| Independent soft-start sequencing | SS13 and SS24 pins enable staggered ramp-up of VOUT1/VOUT3 and VOUT2 - satisfies ATX power-good timing and prevents VTT-VCC violation. |
| Dual Power-Good signaling | VTTPG (delayed) and PGOOD (system-wide) open-collector outputs - provide hardware-level coordination with CPU reset and chipset enable logic. |
| Linear regulator flexibility | DRIVE2/3/4 support both N-MOSFET and NPN pass transistors - allows optimization for cost (bipolar) or efficiency (FET) in different rail implementations. |
Applications
| Desktop Motherboard Core Power | AGTL+ Bus Regulation |
|---|---|
Use Scenario: Regulating CPU core voltage on Intel Pentium III/Xeon-based ATX motherboards with dynamic VID adjustment. IC Role / Device Role / Timing Role: Primary VRM controller providing PWM-regulated VOUT1 (1.05–1.825V) with real-time DAC programming and ±1% regulation. Use Value: Enables processor voltage scaling during speed transitions while maintaining tight tolerance and fast transient response. | Use Scenario: Generating stable 1.2V ±3% AGTL+ termination voltage for front-side bus signaling on desktop platforms. IC Role / Device Role / Timing Role: Linear regulator controller (EA2 + DRIVE2) delivering fixed 1.2V output with delayed VTTPG assertion. Use Value: Ensures clean, low-noise VTT supply synchronized to core rail startup - critical for signal integrity on high-speed parallel buses. |
| AGP Graphics Power | Chipset Core Supply |
Use Scenario: Providing regulated 1.5V ±3% power to AGP 4x graphics cards in legacy desktop systems. IC Role / Device Role / Timing Role: Linear regulator controller (EA3 + DRIVE3) with VSEN3 feedback and soft-start clamping via SS13. Use Value: Guarantees controlled ramp-up aligned with CPU core voltage - prevents GPU initialization faults during cold boot. | Use Scenario: Supplying 1.8V ±3% core voltage to northbridge/southbridge chipsets in pre-PCIe era motherboards. IC Role / Device Role / Timing Role: Linear regulator controller (EA4 + DRIVE4) optimized for bipolar NPN pass devices and early-rising VOUT4. Use Value: Meets strict 2V max differential requirement vs. ATX 3.3V rail - avoids latch-up in legacy chipset I/O interfaces. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-output VRM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6522CB-T | VRM8.2 compliant; 4-bit VID (1.10–1.85V); no FIX pin; single SS pin; lacks VTTPG output | Designed for earlier Pentium II platforms; does not support VRM8.5 DAC steps or AGTL+ sequencing | Select ISL6522CB-T only for legacy VRM8.2 designs where VID range and sequencing requirements are relaxed. |
| RT9238GQW | VRM9.0/10.0 compliant; 6-bit VID (0.7–1.75V); integrated MOSFET drivers; no linear regulator outputs | Targets newer Pentium 4/Core platforms; requires external linear regulators for auxiliary rails | Choose RT9238GQW when upgrading to VRM9.0+ and external linear stages are acceptable for AGP/AGTL+ rails. |
Compared with ISL6522CB-T and RT9238GQW, the ISL6524CB-T uniquely integrates VRM8.5 DAC, triple linear regulators, and dual Power-Good signaling - making it the only solution that fully satisfies ATX motherboard requirements for Pentium III/Xeon with AGTL+/AGP/Chipset rail co-regulation.
Availability
ISL6524CB-T is available at Aetrix Electronics and suitable for desktop motherboard design, legacy server power management, and industrial embedded computing applications requiring stable component supply and long-term lifecycle support.
Supply support for ISL6524CB-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader formed through the merger of Renesas Technology and NEC Electronics, specializing in microcontrollers, analog, and power management ICs.
The ISL6524CB-T belongs to Renesas' legacy Intersil VRM controller product line, engineered specifically for Intel-compatible desktop motherboard power delivery with integrated multi-rail regulation and VRM protocol compliance.
FAQ
What is the function of the FIX pin on the ISL6524CB-T?
The FIX pin on the ISL6524CB-T configures the output voltage mode of the 1.5V and 1.8V linear regulators. When grounded, it disables internal resistor dividers and enables external resistor programming of VOUT3 and VOUT4 from 1.26V up to the input voltage (e.g., +3.3V or +5V). When left open, the pin is pulled high internally, selecting fixed 1.5V and 1.8V outputs - a key flexibility feature for chipset power customization in the ISL6524CB-T.
How does the ISL6524CB-T implement overcurrent protection without a sense resistor?
The ISL6524CB-T uses the upper MOSFET's rDS(ON) as a current-sense element. An internal 200µA current source (IOCSET) develops a voltage (VSET) across an external resistor (ROCSET); when the voltage drop across Q1 (iD × rDS(ON)) exceeds VSET, the overcurrent comparator trips. This rDS(ON)-based method eliminates the need for a discrete sense resistor - a defining characteristic of the ISL6524CB-T's cost-optimized power stage design.
What are the voltage thresholds for the PGOOD and VTTPG signals on the ISL6524CB-T?
The ISL6524CB-T asserts PGOOD when VOUT1 is within ±10% of the DACOUT-set voltage and all other outputs exceed their undervoltage thresholds (e.g., VSEN2 > 1.08V). VTTPG is asserted after VOUT2 reaches 90% of its target and remains high until VSEN2 falls below 1.08V or SS13 drops below 1.25V. These precise, independently timed thresholds are hard-coded into the ISL6524CB-T's fault logic and cannot be adjusted externally.
Can the ISL6524CB-T support both MOSFET and bipolar pass transistors in its linear regulator outputs?
Yes, the ISL6524CB-T's DRIVE2, DRIVE3, and DRIVE4 outputs are explicitly designed to drive either N-channel MOSFETs or NPN bipolar transistors. DRIVE2 and DRIVE3 support both types with 20–40mA drive capability, while DRIVE4 is optimized for NPN base drive - confirmed in the datasheet's "Linear Regulator Drives Compatible with both MOSFET and Bipolar Series Pass Transistors" feature list and functional pin descriptions. This dual compatibility is a core architectural feature of the ISL6524CB-T.
What is the purpose of the SS13 and SS24 pins on the ISL6524CB-T?
The SS13 and SS24 pins on the ISL6524CB-T control independent soft-start intervals: SS13 governs the ramp-up of VOUT1 (CPU core) and VOUT3 (AGP 1.5V), while SS24 controls VOUT2 (AGTL+ 1.2V) and triggers VTTPG assertion. Each pin sources a 28µA current to charge an external capacitor, generating a linear voltage ramp that clamps error amplifier references - ensuring controlled, sequenced power delivery required by ATX specifications. This dual-soft-start architecture is fundamental to the ISL6524CB-T's system-level timing compliance.
ISL6524CB-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel VRM8.5
- Voltage - Input:
- 10.8V ~ 13.2V
- Number of Outputs:
- 4
- Voltage - Output:
- Multiple
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
ISL6524CB-T FAQ
1.How can I place an order for ISL6524CB-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6524CB-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6524CB-T reliable?
The price and inventory of ISL6524CB-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6524CB-T is usually 5 days.
3.What payment methods are accepted for ISL6524CB-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6524CB-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6524CB-T?
ISL6524CB-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6524CB-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6524CB-T?
For technical support, including ISL6524CB-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6524CB-T requirements.
6.How does Aetrix verify that ISL6524CB-T is sourced from the original manufacturer or authorized distributors?
All ISL6524CB-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6524CB-T meets industry standards.
7.What is the process for return or replacement of ISL6524CB-T?
All ISL6524CB-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6524CB-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6524CB-T part is unused and in its original packaging.
Return procedure for ISL6524CB-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL6524CB-T Tags
-
TPS51206DSQR
Texas Instruments
-
TPS51200DRCR
Texas Instruments
-
TPS51200DRCT
Texas Instruments
-
TPS62740DSSR
Texas Instruments
-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi
-
RT9026GSP
Richtek USA Inc.
-
LP2998MRX/NOPB
Texas Instruments
-
TPS51200QDRCRQ1
Texas Instruments
-
DPA423GN-TL
Power Integrations
-
LM10011SD/NOPB
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
