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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Special Purpose Regulators

Renesas ISL6524CBZ-T

Name: ISL6524CBZ-T
Brand: Renesas
SKU: ISL6524CBZ-T
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ISL6524CBZ-T

Manufacturer:: Renesas

Category:: Special Purpose Regulators

Package:: 28-SOIC (0.295", 7.50mm Width)

Datasheet:: ISL6524CBZ-T.pdf

Description:: IC REG CTRLR PWM 4OUT 28SOIC

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Product details

Overview

ISL6524CBZ-T from Renesas (formerly Intersil) is a VRM8.5-compliant quad-output power system controller integrating one voltage-mode PWM controller for microprocessor core voltage and three linear controllers for AGTL+ 1.2V, AGP 1.5V, and chipset core 1.8V rails. It features a 5-bit TTL DAC (1.050–1.825V in 25mV steps), ±1% core regulation, ±3% linear output tolerance, and MOSFET r_DS(ON)-based overcurrent sensing - deployed in ATX motherboard power delivery.

For engineers reviewing the ISL6524CBZ-T datasheet, ISL6524CBZ-T pinout, ISL6524CBZ-T application, or ISL6524CBZ-T equivalent, key selection considerations include VRM8.5 DAC compatibility, dual soft-start timing (SS13/SS24), open-collector PGOOD/VTTPG signaling, 200kHz fixed-frequency operation, and support for both N-channel MOSFETs and NPN pass transistors across all linear outputs.

Technical Context

The ISL6524CBZ-T implements a single-loop voltage-mode PWM control architecture with high-bandwidth error amplifier (88dB DC gain, 15MHz GBWP) and full 0–100% duty cycle capability. Its VRM8.5 DAC directly sets the core reference (DACOUT), which also defines PGOOD (±10%) and OVP (115%) thresholds.

All three linear regulators use external N-channel MOSFETs or NPN transistors with fixed setpoints: VSEN2 = 1.2V ±3%, VSEN3 = 1.5V ±3% (FIX open), VSEN4 = 1.8V ±3% (FIX open); undervoltage monitoring occurs at 75% of setpoint with hysteresis. Fault logic includes independent UV/OV latching, triple fault counters, and POR-initiated sequencing tied to VCC, VAUX, and OCSET voltage thresholds.

Key Specifications

Parameter	Value and Actual Design Meaning
PWM Output Range	1.050V–1.825V in 25mV steps via 5-bit VID interface - matches Intel VRM8.5 microprocessor core voltage requirements
Core Regulation Accuracy	±1% over temperature - ensures stable CPU V_DD under thermal stress without external trimming
Linear Output Tolerance	±3% for VOUT2 (1.2V), VOUT3 (1.5V), VOUT4 (1.8V) - meets AGTL+, AGP, and chipset core supply specs
Switching Frequency	200kHz nominal (185–215kHz range) - enables compact magnetics while limiting EMI in dense motherboard layouts
Overcurrent Sensing	r_DS(ON)-based, no sense resistor required - reduces BOM cost and PCB area for high-current core rail
Soft-Start Control	Dual independent timers: SS13 controls VOUT1/VOUT3 ramp; SS24 controls VOUT2 ramp - enforces strict power-up sequencing per ATX spec
Power-Good Signals	PGOOD (system-wide), VTTPG (VOUT2-only, delayed) - provides discrete enable sequencing for memory and chipset subsystems

Pinout & Package

ISL6524CBZ-T is housed in a 28-pin SOIC package (M28.3 drawing), RoHS-compliant with matte tin termination. Thermal resistance θ_JA = 70°C/W enables operation up to 125°C junction temperature in standard motherboard airflow.

Pin/Terminal	Circuit Role	Design Meaning
DRIVE2 (Pin 1)	Linear regulator gate/base driver	Drives N-MOSFET or NPN for 1.2V AGTL+ bus (VOUT2); supports bipolar/MOSFET pass devices
FIX (Pin 2)	Linear regulator voltage select	Grounding enables adjustable 1.5V/1.8V outputs; open configures fixed 1.5V (VSEN3) and 1.8V (VSEN4)
VID3–VID0, VID25 (Pins 3–7)	DAC digital inputs	TTL-compatible 5-bit interface setting DACOUT reference - determines core voltage, PGOOD, and OVP thresholds
FAULT/RT (Pin 10)	Oscillator frequency adjust / fault reporting	Resistor-to-GND sets f_SW; pulled to VCC during OV/OC faults - enables programmable switching frequency and fault flagging
VSEN2 (Pin 11)	1.2V linear regulator feedback	Monitored at 1.2V ±3%; undervoltage detection triggers shutdown if <1.08V - protects AGTL+ bus integrity
SS24 (Pin 12)	Soft-start capacitor node	Charged by 28μA current source to control VOUT2 ramp time; <0.8V forces chip reset - enforces safe 1.2V sequencing
SS13 (Pin 13)	Soft-start capacitor node	Charged by 28μA current source to control VOUT1/VOUT3 ramp; clamps EA references - prevents inrush on core/AGP rails
VSEN4 (Pin 14)	1.8V linear regulator feedback	Monitored at 1.8V ±3%; undervoltage latches IC off - ensures chipset core power stability before boot
DRIVE4 (Pin 15)	1.8V linear regulator driver	Optimized for NPN base drive (not MOSFET gate) - matches bipolar pass transistor requirement for MCH 1.8V rail
VAUX (Pin 16)	Auxiliary bias & sequencing reference	Connected to ATX 3.3V; powers VID pull-ups and provides POR reference - enables ATX-compatible startup behavior
GND (Pin 17)	Signal ground	Reference for all analog circuitry and logic thresholds - must be isolated from PGND to avoid noise coupling into error amps
DRIVE3 (Pin 18)	1.5V linear regulator driver	Drives N-MOSFET or NPN for AGP 1.5V rail (VOUT3); shares same architecture as DRIVE2 - simplifies layout reuse
VSEN3 (Pin 19)	1.5V linear regulator feedback	Monitored at 1.5V ±3%; undervoltage disables VOUT1/VOUT2/VOUT3 - prevents AGP bus instability from propagating
COMP (Pin 20)	PWM error amplifier output	External compensation node for voltage-mode loop - allows tuning of transient response and phase margin
FB (Pin 21)	PWM error amplifier inverting input	Connects to VSEN1 for core voltage feedback - forms closed-loop regulation with COMP and external RC network
VSEN1 (Pin 22)	PWM output voltage sense	Direct connection to VOUT1; used for PGOOD (±10%), OVP (115%), and regulation - requires Kelvin sense for accuracy
OCSET (Pin 23)	Overcurrent threshold programming	200μA current source + external R sets I_PEAK trip point using Q1 r_DS(ON) - eliminates sense resistor, saves board space
PGND (Pin 24)	Power ground	Return path for synchronous rectifier lower MOSFET - must tie directly to Q2 source to maintain accurate r_DS(ON) sensing
LGATE (Pin 25)	Lower MOSFET gate driver	1A sink/source capability; drives Q2 in synchronous buck - enables high-efficiency core conversion with low-side FET control
PHASE (Pin 26)	Switch node sense	Connects to Q1 source; used for r_DS(ON) current sensing and gate drive return - critical for accurate OC detection
UGATE (Pin 27)	Upper MOSFET gate driver	1A sink/source capability; drives Q1 gate - supports fast turn-on/off of high-side FET in 12V-input buck stage
VCC (Pin 28)	Bias supply input	+12V ±10% input; powers internal circuitry and provides gate charge for all drivers - monitored for POR at 8.2V/10.4V thresholds

Key Features

Feature	Design Value
VRM8.5 DAC Interface	5-bit TTL VID pins (VID3–VID0, VID25) program core voltage from 1.050V to 1.825V in precise 25mV increments - ensures drop-in compatibility with Intel Pentium III/IV platforms
Dual Independent Soft-Start	SS13 controls VOUT1/VOUT3 ramp; SS24 controls VOUT2 ramp - enforces ATX-mandated sequencing where VTT must stabilize before core voltage rise
r_DS(ON)-Based Overcurrent Protection	Eliminates external current-sense resistor by using upper MOSFET's on-resistance - reduces component count, PCB area, and power loss in high-current core rail
Separate VTTPG Signal	Open-collector VTTPG asserts only after VOUT2 reaches 90% and remains stable - provides dedicated enable signal for DDR memory termination circuits
Triple Linear Regulator Flexibility	DRIVE2/DRIVE3 support N-MOSFET or NPN; DRIVE4 optimized for NPN - accommodates legacy bipolar designs and modern MOSFET-based layouts

Applications

Desktop Motherboard Power Delivery	Intel Pentium III/IV Core Voltage Regulation
Use Scenario: Primary power controller on ATX desktop motherboards delivering regulated voltages to CPU, AGTL+ bus, AGP slot, and chipset. IC Role / Device Role / Timing Role: Quad-output system controller managing synchronized startup, real-time regulation, and fault isolation across four critical rails. Use Value: Integrates PWM + three linear controllers in one SOIC, reducing solution size vs. discrete controllers while ensuring VRM8.5 compliance and sequencing accuracy.	Use Scenario: Regulating dynamic core voltage for Intel Pentium III and early Pentium IV processors requiring VID-programmable 1.05–1.825V supplies. IC Role / Device Role / Timing Role: VRM8.5-compliant PWM controller with DACOUT-referenced PGOOD and OVP - directly interfaces with processor VID pins and reports status to southbridge. Use Value: ±1% static regulation and 25mV DAC steps meet Intel's tight core voltage tolerances, enabling stable overclocking headroom and thermal throttling response.
AGTL+ Bus Termination Supply	Chipset Core (MCH) 1.8V Regulation
Use Scenario: Generating clean, well-regulated 1.2V ±3% for AGTL+ signaling on Pentium III-era front-side buses and memory controllers. IC Role / Device Role / Timing Role: Linear regulator (EA2 + DRIVE2) with dedicated VTTPG output and SS24-controlled soft-start - ensures VTT stabilizes before CPU core ramp. Use Value: VTTPG delay prevents premature memory initialization; ±3% tolerance maintains signal integrity across wide temperature ranges.	Use Scenario: Providing tightly regulated 1.8V ±3% to memory controller hub (MCH) core logic in dual-processor and high-bandwidth desktop platforms. IC Role / Device Role / Timing Role: Linear regulator (EA4 + DRIVE4) with NPN-optimized drive and independent UV latch - guarantees MCH power stability prior to boot ROM execution. Use Value: Undervoltage latching on VSEN4 prevents corrupted PCIe/AGP enumeration; DRIVE4's bipolar biasing supports legacy MCH designs.

Desktop Motherboard Power Delivery

Intel Pentium III/IV Core Voltage Regulation

Use Scenario: Primary power controller on ATX desktop motherboards delivering regulated voltages to CPU, AGTL+ bus, AGP slot, and chipset.

IC Role / Device Role / Timing Role: Quad-output system controller managing synchronized startup, real-time regulation, and fault isolation across four critical rails.

Use Value: Integrates PWM + three linear controllers in one SOIC, reducing solution size vs. discrete controllers while ensuring VRM8.5 compliance and sequencing accuracy.

Use Scenario: Regulating dynamic core voltage for Intel Pentium III and early Pentium IV processors requiring VID-programmable 1.05–1.825V supplies.

IC Role / Device Role / Timing Role: VRM8.5-compliant PWM controller with DACOUT-referenced PGOOD and OVP - directly interfaces with processor VID pins and reports status to southbridge.

Use Value: ±1% static regulation and 25mV DAC steps meet Intel's tight core voltage tolerances, enabling stable overclocking headroom and thermal throttling response.

AGTL+ Bus Termination Supply

Chipset Core (MCH) 1.8V Regulation

Use Scenario: Generating clean, well-regulated 1.2V ±3% for AGTL+ signaling on Pentium III-era front-side buses and memory controllers.

IC Role / Device Role / Timing Role: Linear regulator (EA2 + DRIVE2) with dedicated VTTPG output and SS24-controlled soft-start - ensures VTT stabilizes before CPU core ramp.

Use Value: VTTPG delay prevents premature memory initialization; ±3% tolerance maintains signal integrity across wide temperature ranges.

Use Scenario: Providing tightly regulated 1.8V ±3% to memory controller hub (MCH) core logic in dual-processor and high-bandwidth desktop platforms.

IC Role / Device Role / Timing Role: Linear regulator (EA4 + DRIVE4) with NPN-optimized drive and independent UV latch - guarantees MCH power stability prior to boot ROM execution.

Use Value: Undervoltage latching on VSEN4 prevents corrupted PCIe/AGP enumeration; DRIVE4's bipolar biasing supports legacy MCH designs.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output VRM power controller applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ISL6522CBZ-T	Single PWM + dual linear (3 outputs total); lacks VOUT4 1.8V regulator and DRIVE4 pin; identical VID DAC, SS13/SS24, and protection logic	Suitable only for systems omitting chipset core 1.8V rail - e.g., older Socket 370 boards without MCH voltage regulation	Select ISL6522CBZ-T when 3-rail control suffices and board space/cost optimization is prioritized over future-proofing for 1.8V MCH.
RT8802AZQW	Single PWM + triple linear; supports VRM9.0/10.x VID codes; adds integrated MOSFET drivers with higher peak current (1.5A UGATE/LGATE); no FIX pin for linear adjustment	Targets newer Pentium 4 and Core 2 platforms requiring wider VID range (0.7–1.6V) and faster transient response - not backward compatible with VRM8.5 timing	Choose RT8802AZQW for VRM9.0+ designs needing enhanced gate drive and updated VID mapping; avoid for legacy VRM8.5 validation.

Compared with ISL6524CBZ-T, ISL6522CBZ-T omits the 1.8V MCH regulator and DRIVE4 functionality, making it unsuitable for platforms requiring chipset core power; RT8802AZQW extends VID support and gate drive strength but abandons VRM8.5 compatibility and FIX-based linear flexibility - neither is pin-compatible, and both require PCB redesign.

Availability

ISL6524CBZ-T is available at Aetrix Electronics and suitable for desktop motherboard design, Intel Pentium III/IV platform validation, and legacy chipset power supply replacement requiring stable component supply and long-term lifecycle support.

Supply support for ISL6524CBZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation (formerly Intersil) is a global semiconductor leader specializing in analog, power management, and embedded processing solutions for computing, industrial, and automotive markets.

The ISL6524CBZ-T belongs to Renesas' VRM/IMVP power controller product line, engineered specifically for Intel-compatible desktop and server motherboard power delivery with strict sequencing, multi-rail integration, and VRM specification compliance.

FAQ

What is the core voltage range supported by the ISL6524CBZ-T?

The ISL6524CBZ-T supports a core voltage range of 1.050V to 1.825V in precise 25mV steps via its 5-bit VRM8.5-compatible DAC (VID3–VID0, VID25). This range is explicitly designed for Intel Pentium III and early Pentium IV microprocessors. The DACOUT reference voltage directly sets the PWM output target, PGOOD window (±10%), and overvoltage protection threshold (115% of DACOUT), ensuring coordinated regulation and fault response across the core rail. Each VID code maps to a specific DACOUT value documented in Table 1 of the FN9015 datasheet.

How does the ISL6524CBZ-T implement overcurrent protection without a sense resistor?

The ISL6524CBZ-T implements overcurrent protection by measuring the voltage drop across the upper MOSFET's r_DS(ON) using the PHASE and OCSET pins. An internal 200μA current source (IOCSET) develops a reference voltage (VSET) across an external resistor (ROCSET); when the instantaneous V_DS of the upper MOSFET exceeds VSET, the overcurrent comparator trips. This method eliminates the need for a discrete current-sense resistor, reducing BOM cost and PCB footprint. The trip point I_PEAK is calculated as IOCSET × ROCSET / r_DS(ON), requiring selection of ROCSET based on the MOSFET's maximum r_DS(ON) at operating temperature.

What is the purpose of the FIX pin on the ISL6524CBZ-T?

On the ISL6524CBZ-T, the FIX pin (Pin 2) selects between fixed and adjustable output voltage modes for the 1.5V (VOUT3) and 1.8V (VOUT4) linear regulators. When left open, internal pull-up enables fixed 1.5V (VSEN3) and 1.8V (VSEN4) outputs. When grounded, the internal resistor dividers are bypassed, allowing external resistor networks on VSEN3/VSEN4 to set custom voltages - e.g., VOUT4 can be adjusted from 1.7V up to the input rail (typically +3.3V or +5V). This flexibility supports non-standard chipset or graphics core voltages while retaining the same ISL6524CBZ-T footprint.

Does the ISL6524CBZ-T support both MOSFET and bipolar pass transistors for its linear regulators?

Yes, the ISL6524CBZ-T supports both N-channel MOSFETs and NPN bipolar transistors across its linear regulator outputs. DRIVE2 and DRIVE3 are designed for either device type, providing sufficient gate/base drive current (20–40mA) and compatible voltage swing. DRIVE4, however, is specifically optimized for NPN bipolar transistors - its output stage and biasing are tailored for base-drive requirements rather than MOSFET gate charging. This hybrid support allows designers to retain legacy bipolar designs or adopt more efficient MOSFET-based linear stages without changing the ISL6524CBZ-T controller.

What are the key differences between the PGOOD and VTTPG signals on the ISL6524CBZ-T?

The ISL6524CBZ-T provides two distinct open-collector power-good signals: PGOOD (Pin 8) and VTTPG (Pin 9). PGOOD asserts high only when the core PWM output (VOUT1) is within ±10% of its DAC-set voltage AND all other outputs (VOUT2–VOUT4) exceed their respective undervoltage thresholds - serving as the system-wide "all-rails-good" indicator. VTTPG, in contrast, monitors only VOUT2 (1.2V AGTL+ bus) and asserts after a deliberate delay controlled by SS24 charging, ensuring VTT stabilizes before core voltage ramp-up begins - this dedicated signal enables precise DDR memory termination sequencing independent of the main PGOOD logic.

ISL6524CBZ-T Specifications

Product attributes: Attribute value

Manufacturer:: Renesas

Series:: -

Package/Case:: 28-SOIC (0.295", 7.50mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Applications:: Controller, Intel VRM8.5

Voltage - Input:: 10.8V ~ 13.2V

Number of Outputs:: 4

Voltage - Output:: Multiple

Operating Temperature:: 0°C ~ 70°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 28-SOIC

ISL6524CBZ-T FAQ

1.How can I place an order for ISL6524CBZ-T through Aetrix?

Please submit a Request for Quotation (RFQ) for ISL6524CBZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ISL6524CBZ-T reliable?

The price and inventory of ISL6524CBZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6524CBZ-T is usually 5 days.

3.What payment methods are accepted for ISL6524CBZ-T?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6524CBZ-T transactions.

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4.How is shipping managed for ISL6524CBZ-T?

ISL6524CBZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ISL6524CBZ-T order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ISL6524CBZ-T?

For technical support, including ISL6524CBZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6524CBZ-T requirements.

6.How does Aetrix verify that ISL6524CBZ-T is sourced from the original manufacturer or authorized distributors?

All ISL6524CBZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6524CBZ-T meets industry standards.

7.What is the process for return or replacement of ISL6524CBZ-T?

All ISL6524CBZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6524CBZ-T, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ISL6524CBZ-T part is unused and in its original packaging.

Return procedure for ISL6524CBZ-T:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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