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Renesas ISL65426HRZ-T
- Part No.:
- ISL65426HRZ-T
- Manufacturer:
- Renesas
- Package:
- 50-VFQFN Exposed Pad
- Datasheet:
-
ISL65426HRZ-T.pdf
- Description:
- IC REG BUCK ADJ 6A DL 50QFN
- Quantity:
- Payment:
- Shipping:
Inventory:1,354
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Product details
Overview
ISL65426HRZ-T from Renesas (formerly Intersil) is a monolithic dual synchronous buck regulator with integrated MOSFETs, delivering up to 6A total output current across two independently controlled channels. It operates from 3V–5.5V input, supports 1V–4.0V adjustable or VID-programmable outputs, and switches at fixed 1MHz frequency with 180° out-of-phase PWMs to reduce input ripple. It powers FPGA core/I/O rails in compact embedded systems.
For engineers reviewing the ISL65426HRZ-T datasheet, ISL65426HRZ-T pinout, ISL65426HRZ-T application, or ISL65426HRZ-T equivalent, key selection criteria include its user-partitionable 6×1A power blocks, independent soft-start sequencing via EN1/EN2/EN, ±1% reference accuracy, thermal/overcurrent/undervoltage protection, and compatibility with all-ceramic output filters.
Technical Context
The ISL65426HRZ-T implements current-mode control with integrated compensation and a fixed 1MHz oscillator (±20% tolerance), enabling stable all-ceramic designs and excellent transient response. Its unique architecture partitions six 1A power blocks-two master (LX1/LX2 assigned to Channel 1/2) and four floating (LX3–LX6)-into four valid configurations (e.g., 3A:3A, 4A:2A) verified internally before soft-start.
Each channel features independent feedback (FB1/FB2), programmable 2-bit VID inputs (V1SET1/V1SET2, V2SET1/V2SET2), and dedicated power-good outputs (PG1/PG2) with 115% rising threshold and 85% falling threshold relative to 0.6V reference. Protection includes cycle-by-cycle overcurrent, undervoltage lockout (75% VREF trip), and thermal shutdown at 150°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3V to 5.5V - supports single-supply operation from common bias rails like 3.3V or 5V without external LDO pre-regulation. |
| Output Current Capability | Up to 6A total (configurable per channel: e.g., 4A+2A, 5A+1A) - enables flexible load partitioning for asymmetric FPGA core/I/O demands. |
| Switching Frequency | Fixed 1MHz - allows small external inductors (e.g., 0.47µH–1.0µH) and ceramic capacitors while maintaining low EMI. |
| Reference Voltage Accuracy | ±1% (0.594V–0.606V at TJ = –40°C to +100°C) - ensures tight output regulation critical for low-voltage digital ICs (e.g., 1.2V FPGA cores). |
| Thermal Shutdown Threshold | 150°C - protects against sustained overload or poor PCB thermal design without requiring external thermal sensors. |
| Power-Good Threshold Hysteresis | 7% (rising) / 7% (falling) of VREF - prevents oscillation during marginal output conditions and ensures reliable system power sequencing. |
| Soft-Start Time | 4ms - limits inrush current during startup, reducing stress on input capacitors and upstream supplies. |
Pinout & Package
ISL65426HRZ-T is housed in a 50-lead, 5mm × 10mm thin Quad Flat No-lead (QFN) package with exposed thermal pad (EPAD) soldered to PGND for optimal thermal performance. The package supports high-density PCB layouts and meets RoHS compliance with matte tin (e3) termination.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Bias supply input | Provides power to internal analog/digital circuitry; must be connected to highest available supply (3V–5.5V) and locally decoupled with ≥1µF ceramic + 10Ω resistor. |
| PVIN1–PVIN6 | Power supply pins for six power blocks | Grouped by channel (PVIN1–PVIN3 for Ch1, PVIN4–PVIN6 for Ch2); each group must tie to same input rail; defines maximum voltage stress on internal MOSFETs. |
| LX1–LX6 | Switch node outputs | Connect to external inductors; average voltage equals regulated output; LX1/LX2 are master nodes; LX3–LX6 are configurable slave nodes. |
| FB1, FB2 | Feedback inputs | Monitor output voltage via resistor divider or direct connection; set internal error amplifier reference to 0.6V × (1 + R1/R2) for adjustable outputs. |
| EN1, EN2, EN | Enable inputs | EN1/EN2 control individual channels (1V rising threshold); EN provides system-level sequencing (0.6V rising threshold with programmable hysteresis). |
| ISET1, ISET2 | Power block configuration | Set one of four valid channel current allocations (e.g., 11 = 3A:3A) - controller verifies physical LX connectivity before soft-start. |
| V1SET1/V1SET2, V2SET1/V2SET2 | Output voltage selection | 2-bit VID inputs selecting discrete outputs (e.g., 1.2V, 1.5V, 1.8V, 3.3V); grounded by 10µA internal pull-downs to prevent floating faults. |
| PG1, PG2 | Power-good indicators | Open-drain outputs pulled low when respective output is outside ±15% regulation window; used for downstream power sequencing or fault signaling. |
Key Features
| Feature | Design Value |
|---|---|
| 180° out-of-phase PWM synchronization | Reduces RMS input current by ~30% and cuts input capacitor ripple voltage vs. in-phase operation - lowers required input capacitance and improves EMI profile. |
| User-partitionable 6×1A power blocks | Enables four hardware-configurable output current splits (e.g., 4A:2A) without changing IC - eliminates need for multiple part numbers or redesign when load requirements evolve. |
| Stable all-ceramic solution support | Integrated current-mode loop compensation eliminates need for external Type-II/III compensation networks - reduces BOM count and layout sensitivity to capacitor ESR variations. |
| Dual independent digital soft-start | Prevents inrush current surges on both outputs simultaneously or sequentially - avoids brownout on shared input rails and enables safe powering of voltage-sensitive loads like FPGAs. |
| Comprehensive fault protection | Includes cycle-by-cycle overcurrent detection per power block, undervoltage lockout (75% VREF), and thermal shutdown (150°C) - eliminates need for external monitoring circuits in industrial or telecom applications. |
Applications
| FPGA Core & I/O Power | Multi-Rail Point-of-Load |
|---|---|
Use Scenario: Powering Xilinx Virtex-4 or Altera Stratix II FPGA with separate 1.2V core and 3.3V I/O supplies. IC Role / Device Role / Timing Role: Dual-channel synchronous buck regulator providing tightly regulated, sequenced, and protected DC outputs directly from 5V or 3.3V input. Use Value: Eliminates need for two discrete regulators and external sequencing ICs; 180° phase shift reduces input ripple by 50%, allowing smaller bulk capacitors. | Use Scenario: Generating 1.5V and 2.5V rails for DSP + memory subsystem in set-top box mainboard. IC Role / Device Role / Timing Role: Monolithic dual-output DC/DC converter with independent enable (EN1/EN2) and power-good (PG1/PG2) signals for precise power-up ordering. Use Value: Reduces board area by >40% vs. discrete solutions; all-ceramic compatibility simplifies layout and improves reliability in thermally constrained enclosures. |
| Configurable ASIC Supply | Dense Distributed Power System |
Use Scenario: Supplying variable core voltages (1.2V/1.5V/1.8V) to Actel Fusion mixed-signal FPGA based on configuration pins. IC Role / Device Role / Timing Role: VID-programmable dual buck regulator using V1SET1/V1SET2 and V2SET1/V2SET2 pins to select discrete output levels without external resistors. Use Value: Enables firmware-driven voltage scaling; ±1% reference ensures <±12mV error at 1.2V - within FPGA core tolerance limits. | Use Scenario: Providing 3A @ 1.8V and 2A @ 3.3V from a shared 5V backplane in network switch line card. IC Role / Device Role / Timing Role: High-efficiency (95% typical) dual buck with 50-lead QFN package optimized for thermal dissipation in multi-layer PCBs with internal ground planes. Use Value: EPAD-connected PGND provides <2.5°C/W junction-to-case thermal resistance - sustains full load at +100°C ambient without derating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP8765GQ-Z | Fixed 2.5A/2.5A dual output; no user-configurable power blocks; 500kHz switching; requires external compensation. | Best for fixed-ratio, cost-sensitive applications where 5A+ output per rail is not required. | Select MP8765GQ-Z only if output current symmetry and lower switching frequency are acceptable trade-offs for reduced BOM count. |
| TPS546B24RVFT | Single-channel, 6A, PMBus-enabled; supports dynamic voltage scaling and telemetry; 3mm × 4mm QFN. | Suitable for systems requiring digital control, margining, or real-time efficiency optimization - not for dual-rail simplicity. | Choose TPS546B24RVFT when telemetry, remote configuration, or tighter thermal management (0.9°C/W θJC) outweighs need for dual independent outputs. |
Compared with MP8765GQ-Z and TPS546B24RVFT, the ISL65426HRZ-T uniquely balances configurability (6×1A blocks), analog simplicity (no PMBus overhead), and dual-rail autonomy - making it optimal for FPGA/CPLD power where hardware-defined current splits and deterministic sequencing are critical.
Availability
ISL65426HRZ-T is available at Aetrix Electronics and suitable for FPGA power delivery, point-of-load regulation, and multi-rail embedded systems requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ISL65426HRZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics acquired Intersil in 2017 and maintains full technical and supply chain continuity for legacy Intersil power management products.
The ISL65426HRZ-T belongs to Intersil's high-integration monolithic buck regulator family, designed specifically to replace multi-chip DC/DC solutions in space-constrained digital IC power applications such as FPGAs, CPLDs, and ASICs.
FAQ
What is the operating temperature range for the ISL65426HRZ-T?
The ISL65426HRZ-T is rated for an ambient temperature range of –10°C to +100°C, with an operating junction temperature range of –10°C to +125°C. This specification is validated per the ISL65426HRZ ordering option in the FN6340 datasheet and supports industrial-grade deployment in thermally demanding environments without forced air cooling.
How does the ISL65426HRZ-T achieve 180° out-of-phase PWM operation?
The ISL65426HRZ-T uses internal timing logic to offset the clock edges of its two PWM controllers by half a cycle, ensuring complementary switching of LX1/LX2 and their associated power blocks. This phase relationship reduces input capacitor RMS current by approximately 30%, directly lowering input ripple voltage and enabling smaller, more reliable ceramic input capacitors in the ISL65426HRZ-T design.
Can the ISL65426HRZ-T support output voltages below 1V or above 4.0V?
No - the ISL65426HRZ-T supports adjustable outputs from 1V to 4.0V when using external resistor dividers, and discrete VID-programmed outputs from 1.2V to 3.3V. Voltages below 1V violate the minimum feedback reference headroom, and outputs above 4.0V exceed the 80% of input limit (e.g., 4.4V max from 5.5V input), making them unsupported and potentially unsafe for the ISL65426HRZ-T.
What happens if the power block configuration check fails on the ISL65426HRZ-T?
If the ISL65426HRZ-T detects mismatched LX pin connectivity versus the ISET1/ISET2 programmed configuration, it halts soft-start and repeats the configuration check every 100µs until valid alignment is confirmed or power is cycled. No outputs activate during this state, and PG1/PG2 remain low - preventing erroneous power delivery to sensitive loads like FPGAs.
Is the ISL65426HRZ-T pin-compatible with other members of the ISL654xx family?
No - the ISL65426HRZ-T has a unique 50-pin QFN footprint and power block architecture not shared with ISL65425 or ISL65427. Pinouts differ significantly (e.g., number of PVIN/LX pins, ISET/VID pin assignments), and register maps or configuration logic are not interchangeable. Migration requires full schematic and layout revision for the ISL65426HRZ-T.
ISL65426HRZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 50-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 3V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1V
- Voltage - Output (Max):
- 4V
- Current - Output:
- 6A
- Frequency - Switching:
- 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -10°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 50-QFN (5x10)
ISL65426HRZ-T FAQ
1.How can I place an order for ISL65426HRZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL65426HRZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL65426HRZ-T reliable?
The price and inventory of ISL65426HRZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL65426HRZ-T is usually 5 days.
3.What payment methods are accepted for ISL65426HRZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL65426HRZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL65426HRZ-T?
ISL65426HRZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL65426HRZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL65426HRZ-T?
For technical support, including ISL65426HRZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL65426HRZ-T requirements.
6.How does Aetrix verify that ISL65426HRZ-T is sourced from the original manufacturer or authorized distributors?
All ISL65426HRZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL65426HRZ-T meets industry standards.
7.What is the process for return or replacement of ISL65426HRZ-T?
All ISL65426HRZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL65426HRZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL65426HRZ-T part is unused and in its original packaging.
Return procedure for ISL65426HRZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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