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Renesas ISL65426IRZA
- Part No.:
- ISL65426IRZA
- Manufacturer:
- Renesas
- Package:
- 50-VFQFN Exposed Pad
- Datasheet:
-
ISL65426IRZA.pdf
- Description:
- IC REG BUCK ADJ 6A DL 50QFN
- Quantity:
- Payment:
- Shipping:
Inventory:275
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Product details
Overview
ISL65426IRZA from Renesas (formerly Intersil) is a monolithic dual synchronous buck regulator with integrated MOSFETs, delivering up to 6A total output current across two independently controlled channels. It operates from 3V–5.5V input, supports 1V–4.0V adjustable or VID-programmable outputs, and features 1MHz fixed-frequency current-mode control for FPGA core/I/O power delivery in compact embedded systems.
For engineers reviewing the ISL65426IRZA datasheet, ISL65426IRZA pinout, ISL65426IRZA application, or ISL65426IRZA equivalent, this page provides verified thermal range (–40°C to +85°C), QFN-50 package mapping, power-block partitioning logic, soft-start sequencing behavior, and real-world efficiency data at 1.2V/1.5V/1.8V/2.5V/3.3V outputs under load.
Technical Context
The ISL65426IRZA implements dual independent current-mode PWM controllers synchronized 180° out-of-phase to reduce input RMS current and ripple. Each channel uses internal high-side and low-side MOSFETs with rDS(ON) of 60–140 mΩ (upper) and 30–85 mΩ (lower) per 1A power block, enabling up to 95% peak efficiency at 5VIN/2.5VOUT.
Its unique six-block architecture allows user-configurable assignment of LX1–LX6 and PVIN1–PVIN6 pins into four valid configurations (e.g., 3A:3A, 4A:2A, 5A:1A, 2A:4A), validated internally before soft-start via ISET1/ISET2 logic decoding and LX node pulsing. Output voltage is set either by 2-bit VID inputs (V1SET1/V1SET2/V2SET1/V2SET2) or external resistor divider referencing the ±1% 0.6V internal reference.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3V to 5.5V - Supports single-supply operation from common system rails (3.3V, 5V) without external bias generation. |
| Output Current Capability | Up to 6A total (configurable per channel: e.g., 4A+2A, 5A+1A) - Enables flexible power partitioning for asymmetric FPGA core/I/O loads. |
| Switching Frequency | Fixed 1MHz ±20% - Enables use of small ceramic output capacitors and compact inductors while maintaining stable transient response. |
| Reference Voltage | 0.6V ±1% over –40°C to +125°C - Ensures tight output regulation accuracy across industrial temperature range. |
| Thermal Shutdown | 150°C junction - Protects device during overload or poor PCB thermal design; recovery occurs after cooldown. |
| Ambient Temperature Range | –40°C to +85°C - Qualified for industrial and extended commercial applications requiring robust thermal margin. |
| Package | 50-lead 5mm × 10mm QFN with exposed thermal pad - Provides low θJA = 23°C/W for efficient heat dissipation in space-constrained layouts. |
Pinout & Package
ISL65426IRZA is housed in a 50-lead, 5mm × 10mm thin Quad Flat No-lead (QFN) package with an exposed thermal pad (EPAD) that must be soldered to PGND for optimal thermal performance and electrical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Bias supply input | Provides power to internal analog/digital circuitry; must be connected to highest available supply (≤5.5V) and locally decoupled with ≥1µF ceramic + 10Ω RC filter. |
| PVIN1–PVIN6 | Power input for six MOSFET blocks | Each powers one 1A synchronous block; PVINx pins for same channel must be tied together and sourced from same rail (3V–5.5V). |
| LX1–LX6 | Switch node outputs | Connect to external inductors; average voltage equals regulated output; grouped per channel (e.g., LX1/LX2/LX3 → Channel 1) based on ISET configuration. |
| FB1 / FB2 | Feedback inputs | Monitor output voltage; accept 0.6V reference-based divider for adjustable outputs or direct VID programming via VxSET pins. |
| EN1 / EN2 / EN | Enable inputs | EN1/EN2 control individual channels (1V rising threshold); EN provides system-level sequencing (0.6V threshold) for multi-rail bias designs. |
| ISET1 / ISET2 | Power block configuration | Set one of four valid channel current allocations (e.g., 4A:2A) by logic level; invalid states prevent soft-start initialization. |
| V1SET1/V1SET2/V2SET1/V2SET2 | Output voltage selection | 2-bit VID inputs selecting discrete outputs (1.2V/1.5V/1.8V for VOUT1; 1.8V/2.5V/3.3V for VOUT2) or enabling external resistor programming. |
| PG1 / PG2 | Power-good indicators | Open-drain outputs pulled low when respective output deviates >±5% from target; used for system sequencing and fault reporting. |
| GND / PGND | Signal and power ground | GND connects small-signal references; PGND ties all LX-source nodes and EPAD - must connect at single point to avoid noise coupling. |
Key Features
| Feature | Design Value |
|---|---|
| 180° out-of-phase PWM synchronization | Reduces input capacitor RMS current by ~30% and minimizes input voltage ripple in dual-output configurations. |
| User-partitionable 6×1A power blocks | Enables four configurable output current splits (e.g., 5A+1A) without changing BOM or layout-only re-routing LX/PVIN connections. |
| Independent digital soft-start per channel | Prevents inrush current damage during power-up; soft-start time fixed at 4ms, programmable via external capacitor if needed. |
| All-ceramic output capacitor support | Stable with low-ESR ceramic caps only-eliminates need for bulk electrolytics and reduces board area and height. |
| Integrated thermal, overcurrent, and undervoltage protection | Detects faults at block level (2A peak limit per block), shuts down affected channel, and asserts PGx low-no external monitoring required. |
Applications
| FPGA Core & I/O Power | Low-Voltage Point-of-Load Regulation |
|---|---|
Use Scenario: Powering Xilinx Virtex-4 or Altera Stratix II FPGA with separate 1.2V core and 3.3V I/O rails from a single 5V input. IC Role / Device Role / Timing Role: Dual-channel synchronous buck regulator providing tightly regulated, sequenced, and monitored DC supplies. Use Value: Eliminates need for two discrete regulators; 180° phase shift cuts input ripple by 50%, reducing EMI filter size and cost. |
Use Scenario: Delivering 1.5V @ 4A and 2.5V @ 2A to ASIC subsystems in network switch line cards. IC Role / Device Role / Timing Role: Monolithic dual-output DC/DC converter with independent enable and power-good signaling for system-level power sequencing. Use Value: Configurable 4A:2A power block allocation matches asymmetric load demands; 1MHz switching enables <3mm² inductor footprint. |
| Industrial Embedded Control | Set-Top Box Power Management |
Use Scenario: Supplying 1.8V @ 3A and 3.3V @ 3A to ARM Cortex-A9 processor and peripheral interfaces in factory automation PLCs. IC Role / Device Role / Timing Role: High-efficiency dual buck regulator operating across –40°C to +85°C ambient with thermal shutdown and PG monitoring. Use Value: 95% peak efficiency at 5VIN/2.5VOUT reduces thermal load in sealed enclosures; QFN-50 package fits tight 12mm × 12mm board areas. |
Use Scenario: Generating 1.2V core and 1.8V memory rails for MPEG-4 decoder SoC in consumer STB designs. IC Role / Device Role / Timing Role: Compact dual-output regulator supporting VID-programmed outputs and pre-biased start-up. Use Value: External resistor divider option extends output range to 1V–4.0V; soft-start prevents bus droop during cold boot from 3.3V supply. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP8765GQ-Z | Single-chip dual 6A solution with 500kHz–2.2MHz programmable frequency; no power-block reconfiguration; smaller 4×4mm QFN-28 package. | Targets space-constrained apps needing fixed 3A+3A split; lacks VID inputs and independent soft-start per channel. | Select MP8765GQ-Z when board area is critical and output current ratio is fixed; ISL65426IRZA preferred for flexible current allocation and industrial temp range. |
| TPS546D24ARVFT | 6A dual-output PMBus-enabled regulator with telemetry, loop compensation tuning, and 0.5% reference accuracy; requires external MOSFETs. | Suitable for server/telecom where digital monitoring, margining, and dynamic voltage scaling are required. | Choose TPS546D24ARVFT for closed-loop telemetry and remote configuration; ISL65426IRZA offers lower BOM count and simpler analog design for cost-sensitive industrial use. |
Compared with MP8765GQ-Z and TPS546D24ARVFT, the ISL65426IRZA delivers unique field-programmable power block partitioning, VID-based voltage selection, and integrated MOSFETs in a thermally optimized QFN-50 package-making it ideal for FPGA/ASIC power where flexibility, integration, and industrial reliability are prioritized over digital control or ultra-small footprint.
Availability
ISL65426IRZA is available at Aetrix Electronics and suitable for FPGA power delivery, industrial embedded control, and set-top box point-of-load regulation requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for ISL65426IRZA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics acquired Intersil in 2017 and maintains full technical and manufacturing continuity for legacy Intersil power management ICs including the ISL65426 series.
The ISL65426 product line was designed specifically for high-density digital IC power delivery-targeting FPGAs, CPLDs, and ASICs requiring dual, independently regulated, and thermally robust DC/DC conversion in minimal board space.
FAQ
What is the maximum total output current supported by the ISL65426IRZA?
The ISL65426IRZA supports up to 6A total output current, distributed across its two channels via user-configurable power block allocation. Valid configurations include 3A:3A, 4A:2A, 5A:1A, and 2A:4A - determined by logic states on ISET1 and ISET2 pins. Each of the six internal 1A blocks contributes to one channel's output, with peak per-block current limited to 2.0A for safety. The ISL65426IRZA achieves this within its specified –40°C to +85°C ambient range.
Does the ISL65426IRZA require external MOSFETs?
No, the ISL65426IRZA integrates all six high-side and low-side synchronous MOSFETs required for dual-output operation - eliminating the need for external power switches. Its six 1A power blocks (each with matched upper/lower devices) are fully contained within the QFN-50 package. This integration reduces BOM count, simplifies layout, and ensures optimal gate drive timing and thermal coupling between paired MOSFETs - a key advantage over controller-only solutions like the ISL65426IRZA's alternatives.
How does the ISL65426IRZA handle power sequencing between its two output channels?
The ISL65426IRZA supports precise power sequencing via three independent enable inputs: EN1 and EN2 control each channel individually, while EN provides system-level sequencing for multi-input bias designs. Rising thresholds are 1.0–1.45V (EN1/EN2) and 0.57–0.63V (EN), with built-in hysteresis. Sequencing is implemented through independent digital soft-start intervals - each channel ramps its output voltage separately once its enable condition is met. The ISL65426IRZA also provides dedicated open-drain PG1 and PG2 signals to coordinate downstream logic reset timing.
Can the ISL65426IRZA operate with ceramic output capacitors only?
Yes, the ISL65426IRZA is explicitly designed for stable all-ceramic output capacitor solutions. Its current-mode control architecture and integrated compensation eliminate the need for bulk electrolytic or tantalum capacitors. The datasheet confirms stability with typical 10–47µF X5R/X7R ceramics per channel, significantly reducing board area, height, and aging-related failure modes. This capability is validated across all four power block configurations and output voltages (1.2V–3.3V) in the ISL65426IRZA's recommended operating conditions.
What thermal protection mechanisms does the ISL65426IRZA include?
The ISL65426IRZA incorporates a junction temperature monitor that triggers thermal shutdown at 150°C, halting switching and pulling PG1/PG2 low to signal fault. Recovery occurs automatically once die temperature falls below the hysteresis threshold (typically ~140°C). Additionally, per-block overcurrent protection limits peak current to 2.0A, and undervoltage lockout disables operation if FBx falls below 70–80% of the 0.6V reference. These protections are fully integrated - no external components are required to implement them in the ISL65426IRZA design.
ISL65426IRZA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 50-VFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 3V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1V
- Voltage - Output (Max):
- 4V
- Current - Output:
- 6A
- Frequency - Switching:
- 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -10°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 50-QFN (5x10)
ISL65426IRZA FAQ
1.How can I place an order for ISL65426IRZA through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL65426IRZA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL65426IRZA reliable?
The price and inventory of ISL65426IRZA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL65426IRZA is usually 5 days.
3.What payment methods are accepted for ISL65426IRZA?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL65426IRZA transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL65426IRZA?
ISL65426IRZA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL65426IRZA order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL65426IRZA?
For technical support, including ISL65426IRZA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL65426IRZA requirements.
6.How does Aetrix verify that ISL65426IRZA is sourced from the original manufacturer or authorized distributors?
All ISL65426IRZA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL65426IRZA meets industry standards.
7.What is the process for return or replacement of ISL65426IRZA?
All ISL65426IRZA units undergo pre-shipment inspection (PSI). If there is an issue with ISL65426IRZA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL65426IRZA part is unused and in its original packaging.
Return procedure for ISL65426IRZA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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