Renesas ISL6556BCRZ-T
- Part No.:
- ISL6556BCRZ-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
ISL6556BCRZ-T.pdf
- Description:
- IC REG CTRLR INTEL 4OUT 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,682
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL6556BCRZ-T from Intersil is a multi-phase PWM controller for VR10.x microprocessor core voltage regulation, driving up to 4 synchronous-rectified buck channels with rDS(ON) current sensing, 6-bit VID input (0.8375V–1.600V in 12.5mV steps), programmable internal temperature compensation, and differential remote voltage sensing. It operates in 2/3/4-phase modes up to 1.5MHz per phase and targets high-efficiency CPU power delivery in server and workstation motherboards.
For engineers reviewing the ISL6556BCRZ-T datasheet, ISL6556BCRZ-T pinout, ISL6556BCRZ-T application, or ISL6556BCRZ-T equivalent, key selection considerations include phase configuration flexibility (via PWM3/PWM4 strap), ±0.5% system accuracy over temperature and life, integrated shunt regulator for 12V bias support, ENLL logic-level enable (QFN-only), and OFSOUT-driven offset programming - all critical for stable VR10.x compliance and thermal-aware droop control.
Technical Context
The ISL6556BCRZ-T implements interleaved multi-phase timing with programmable switching frequency (0.08–1.5MHz via FS resistor), using a sawtooth-based PWM generator synchronized across up to four channels. Its error amplifier features 80dB open-loop gain and 18MHz bandwidth, with COMP output compensated via external R-C network to stabilize the voltage loop.
Current sensing relies on rDS(ON) sampling during forced-off time, with ISEN pins held at virtual ground; sampled currents feed channel balancing, load-line regulation (via FB droop resistor), and overcurrent protection. Temperature compensation is applied through TCOMP pin scaling, adjusting droop current to counteract MOSFET rDS(ON) drift across 0°C–105°C junction range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Voltage Range (VID) | 0.8375V to 1.600V in 12.5mV steps - enables precise microprocessor core voltage selection per VR10.x spec. |
| System Accuracy | ±0.5% over temp/life (VID = 1.2V–1.6V) - ensures tight regulation without external calibration. |
| Switching Frequency | 0.08–1.5MHz per phase (set by FS resistor) - supports high-frequency, low-inductance designs for compact VRMs. |
| Phase Support | 2-, 3-, or 4-phase operation - configured via PWM3/PWM4 strapping, enabling scalable power delivery. |
| Temperature Compensation | Programmable via TCOMP pin (1μA/V/°C transconductance) - actively corrects rDS(ON)-based droop errors across operating temperature. |
| Remote Sensing | Differential VSEN/RGND inputs with 20MHz bandwidth - eliminates PCB IR drop errors for accurate load-point voltage regulation. |
| Supply Options | 5V direct or 12V via internal shunt regulator (6.2V max, 25mA sink) - simplifies bias supply design in mixed-rail systems. |
Pinout & Package
ISL6556BCRZ-T is housed in a 32-lead, 5mm × 5mm QFN package (JEDEC MO-220 QFN-32) with exposed thermal pad, offering improved PCB efficiency and lower thermal resistance (θJA = 32°C/W, θJC = 3.5°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Power supply input | Accepts 5V direct or 12V via internal shunt regulator; POR threshold 4.31V rising ensures clean startup. |
| ENLL | Logic-level enable | QFN-exclusive active-high enable (0.8V min high, 0.4V max low); clears faults and primes soft-start when deasserted. |
| ISEN1–ISEN4 | Channel current sense inputs | Virtual-ground inputs for rDS(ON) sensing; each samples lower-MOSFET conduction voltage to derive proportional channel current. |
| PWM1–PWM4 | Phase PWM outputs | Open-drain outputs driving external MOSFET drivers; phase count set by PWM3/PWM4 strapping (VCC = enabled). |
| OFSOUT | Offset current output | QFN-exclusive output delivering programmable DC current to FB for load-line offset independent of VID setting. |
| TCOMP | Temp compensation scaling | Resistor-to-ground sets temperature coefficient (10–20μA @ 40°C) to nullify rDS(ON) thermal drift in droop calculation. |
Key Features
| Feature | Design Value |
|---|---|
| Differential remote sensing (VSEN/RGND) | Eliminates PCB trace IR drop error, enabling ±0.5% system accuracy at the microprocessor die. |
| rDS(ON) current sensing with temp compensation | Removes need for lossy sense resistors while maintaining <±5% channel-current balance across temperature. |
| Dynamic VID™ technology | Supports seamless on-the-fly voltage changes during processor P-state transitions without output disturbance. |
| Integrated shunt regulator | Enables single 12V rail biasing with only a 300Ω series resistor - reduces BOM count and layout complexity. |
| ENLL logic enable + precision threshold EN | Provides dual sequencing paths: EN for analog threshold coordination with driver ICs, ENLL for digital control in QFN packages. |
Applications
| Server CPU Voltage Regulator Modules | Workstation Motherboard Power Delivery |
|---|---|
Use Scenario: High-current, thermally constrained VRM supplying Intel Pentium 4 or Xeon processors requiring VR10.x compliance. IC Role / Device Role / Timing Role: Primary multi-phase PWM controller managing 4-channel interleaved buck conversion, droop programming, and dynamic VID updates. Use Value: Achieves <1.5% total output voltage deviation under transient load steps up to 100A/μs while maintaining thermal stability via rDS(ON) sensing and TCOMP correction. |
Use Scenario: Dual-processor workstation board needing independent, sequenced core voltage rails with tight accuracy and low noise. IC Role / Device Role / Timing Role: Core voltage controller coordinating with HIP6601B gate drivers and remote-sense feedback from CPU socket. Use Value: Enables differential remote sensing to reject ground bounce and deliver ±0.5% regulation at the CPU VCCIO pin despite 50mΩ PCB trace impedance. |
| VR10.x-Compliant Desktop Platforms | High-Density Embedded Computing Systems |
Use Scenario: ATX motherboard supporting Pentium D or Core 2 Duo with adaptive voltage positioning and thermal-aware load-line control. IC Role / Device Role / Timing Role: Multi-phase controller implementing AVP via FB droop resistor and OFSOUT-driven offset to meet VR10.x load-line slope requirements. Use Value: Delivers programmable load-line (droop) with ±2% tolerance across 0–100°C ambient, ensuring stable CPU operation during turbo boost events. |
Use Scenario: Compact embedded server blade with space-constrained power stage requiring minimal external components. IC Role / Device Role / Timing Role: Integrated controller providing 4-phase drive, internal shunt regulation, and OVP crowbar interface in 5×5mm QFN footprint. Use Value: Reduces solution size by 35% vs SOIC variant and eliminates external LDO/bias IC, lowering component count and thermal footprint. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-phase PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6556BCBZ-T | 28-lead SOIC package; lacks ENLL and OFSOUT pins; no TCOMP pin - uses fixed internal temperature compensation. | Targeted at cost-sensitive, lower-density layouts where QFN thermal performance and logic-level enable are not required. | Select ISL6556BCBZ-T only if board space allows SOIC footprint and ENLL/OFSOUT functionality is unused. |
| HIP6301CBZ-T | 3-phase-only controller; no VID DAC; uses external reference; no integrated shunt regulator or TCOMP. | Suitable for fixed-voltage, non-VRM applications like ASIC core supplies where dynamic VID and thermal compensation are unnecessary. | Choose HIP6301CBZ-T only for legacy 3-phase designs without VR10.x compliance needs or temperature-aware droop. |
Compared with ISL6556BCRZ-T, the ISL6556BCBZ-T sacrifices QFN thermal efficiency and ENLL/OFSOUT flexibility for SOIC manufacturability, while HIP6301CBZ-T omits VR10.x-specific features entirely - making ISL6556BCRZ-T the sole option for thermally optimized, fully compliant VR10.x 4-phase designs.
Availability
ISL6556BCRZ-T is available at Aetrix Electronics and suitable for server CPU VRMs, workstation motherboard power delivery, and VR10.x-compliant desktop platforms requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for ISL6556BCRZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil (now part of Renesas Electronics) is a semiconductor company specializing in high-performance analog and power management ICs for computing, industrial, and communications markets.
The ISL6556B product line was designed specifically for VR10.x-compliant multi-phase CPU voltage regulators, integrating rDS(ON) sensing, dynamic VID, and temperature-compensated droop to replace discrete solutions in high-current microprocessor power delivery.
FAQ
What is the primary function of the ISL6556BCRZ-T in a CPU power delivery system?
The ISL6556BCRZ-T serves as a multi-phase PWM controller that regulates microprocessor core voltage by driving up to four synchronous-rectified buck converters in interleaved operation. It implements adaptive voltage positioning (AVP) via rDS(ON) current sensing, supports VR10.x-compliant 6-bit VID programming (0.8375V–1.600V), and provides differential remote sensing to ensure ±0.5% system accuracy at the CPU die. The ISL6556BCRZ-T is essential for stable, thermally aware CPU power delivery in servers and workstations.
How does the ISL6556BCRZ-T achieve temperature compensation for rDS(ON) current sensing?
The ISL6556BCRZ-T achieves temperature compensation via the TCOMP pin, which accepts an external resistor to ground to set a programmable current-scaling factor (1μA/V/°C). This current adjusts the droop current injected into the FB pin, dynamically correcting for MOSFET rDS(ON) variation across 0°C–105°C junction temperature. The ISL6556BCRZ-T's internal circuitry uses this scaled current to maintain accurate load-line regulation without external calibration or lookup tables.
What distinguishes the ISL6556BCRZ-T from the SOIC-packaged ISL6556BCBZ-T?
The ISL6556BCRZ-T uses a 32-lead QFN package with enhanced thermal performance (θJA = 32°C/W), includes ENLL (logic-level enable) and OFSOUT (offset current output) pins, and provides the TCOMP pin for programmable temperature compensation. In contrast, the ISL6556BCBZ-T uses a 28-lead SOIC package, lacks ENLL/OFSOUT/TCOMP, and relies on fixed internal compensation. These differences make the ISL6556BCRZ-T mandatory for thermally demanding, VR10.x-compliant 4-phase designs requiring full feature set.
Can the ISL6556BCRZ-T operate with a 12V bias supply, and how is it implemented?
Yes, the ISL6556BCRZ-T can operate with a 12V bias supply using its integrated shunt regulator. A 300Ω resistor connects the 12V source to the VCC pin, and the internal regulator clamps VCC to 5.9V (typical) with up to 25mA sink capability. This eliminates the need for an external LDO or DC-DC converter, simplifying power architecture. The ISL6556BCRZ-T maintains full functionality-including POR, EN/ENLL enable, and PWM operation-under this 12V-biased condition.
What role does the OFSOUT pin play in the ISL6556BCRZ-T's voltage regulation scheme?
The OFSOUT pin delivers a programmable DC current (±50μA) to the FB pin, generating a precise offset voltage across the droop-setting resistor. This allows independent adjustment of the load-line intercept point without affecting the VID-set nominal voltage - critical for meeting VR10.x-defined AVP slopes. The ISL6556BCRZ-T's OFSOUT is exclusive to the QFN package and works in conjunction with the OFS pin's reference to GND or VCC to set offset polarity and magnitude.
ISL6556BCRZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel VR10X
- Voltage - Input:
- 3V ~ 12V
- Number of Outputs:
- 4
- Voltage - Output:
- 0.84V ~ 1.6V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
ISL6556BCRZ-T FAQ
1.How can I place an order for ISL6556BCRZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6556BCRZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6556BCRZ-T reliable?
The price and inventory of ISL6556BCRZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6556BCRZ-T is usually 5 days.
3.What payment methods are accepted for ISL6556BCRZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6556BCRZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6556BCRZ-T?
ISL6556BCRZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6556BCRZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6556BCRZ-T?
For technical support, including ISL6556BCRZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6556BCRZ-T requirements.
6.How does Aetrix verify that ISL6556BCRZ-T is sourced from the original manufacturer or authorized distributors?
All ISL6556BCRZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6556BCRZ-T meets industry standards.
7.What is the process for return or replacement of ISL6556BCRZ-T?
All ISL6556BCRZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6556BCRZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6556BCRZ-T part is unused and in its original packaging.
Return procedure for ISL6556BCRZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL6556BCRZ-T Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

