Renesas ISL6563CR-T
- Part No.:
- ISL6563CR-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
ISL6563CR-T.pdf
- Description:
- IC REG CTRLR INTEL 1OUT 24QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,546
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL6563CR-T from Intersil is a two-phase multiphase buck PWM controller with integrated MOSFET drivers, designed for precision voltage regulation of advanced microprocessors. It supports Intel VRM9/VRM10 and AMD Hammer VID protocols, delivers ±1% system accuracy over temperature, and operates at 189–255 kHz per phase. Its rDS(ON)-based current sensing enables automatic channel current balancing in high-current CPU power delivery applications.
For engineers reviewing the ISL6563CR-T datasheet, ISL6563CR-T pinout, ISL6563CR-T application, or ISL6563CR-T equivalent, this page provides verified technical context, validated pin functions, confirmed VID protocol compatibility, real-world droop programming method, and two rigorously cross-checked alternative controllers for microprocessor VRM designs.
Technical Context
The ISL6563CR-T implements interleaved two-phase PWM control using an internal oscillator (189–255 kHz) and dual independent gate drivers with non-overlap timing (8 ns UGATE/LGATE turn-on delay). It integrates a 6-bit VID DAC with selectable Intel VRM9, VRM10, or AMD Hammer encoding, and uses time-multiplexed rDS(ON) sampling across PHASE1/PHASE2 to feed ISEN for current balancing and droop generation.
Its protection architecture includes multi-tiered overvoltage detection (VID + 200 mV trip, 100 mV hysteresis), programmable overcurrent threshold (95 µA reference), and hiccup-mode recovery (4096-cycle wait + soft-start retry). The controller supports start-up into pre-charged outputs and features dedicated ENLL enable (0.61 V threshold) and SSEND soft-start end indicator.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Topology | Two-phase interleaved synchronous buck PWM controller with integrated high- and low-side MOSFET drivers |
| VID Compatibility | Programmable support for Intel VRM9 (5-bit), VRM10 (6-bit), and AMD Hammer (5-bit) DAC codes via DACSEL/VID5 and VRM10 pins |
| System Accuracy | ±1% over temperature (0°C to +70°C), enabling tight regulation for modern microprocessor core voltages |
| Switching Frequency | 189–255 kHz per phase (TJ = +25°C to +85°C); enables optimized trade-off between efficiency, ripple, and component size |
| Current Sensing | rDS(ON)-based lossless sensing with time-multiplexed ISEN input; eliminates external sense resistors and supports automatic channel balancing |
| Overcurrent Threshold | 95 µA internal reference; triggers hiccup-mode shutdown if both channels exceed threshold simultaneously or one channel exceeds it for 7 consecutive cycles |
| Droop Programming | Resistor-programmable output voltage droop (load-line regulation) via ISEN resistor; improves transient response and enables accurate current sharing |
Pinout & Package
ISL6563CR-T is housed in a 24-lead QFN package (4 mm × 4 mm, JEDEC MO-220 compliant) with exposed thermal pad. The package supports high-density PCB layouts and improved thermal performance versus SOIC alternatives.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VID0–VID4 (Pins 2,1,24–22) | Microprocessor voltage identification inputs | Accept TTL-level logic to set output voltage per VRM9/VRM10/Hammer tables; internally pulled up to ~1.2 V |
| DACSEL/VID5 (Pin 3) | VID standard selection or 6th-bit input | Ground for AMD Hammer mode; open/high for VRM9; used as VID5 when VRM10 pin grounded |
| VRM10 (Pin 4) | VRM10 compliance enable | Grounded to activate VRM10 6-bit decoding; open for VRM9/Hammer selection via DACSEL |
| ENLL (Pin 21) | Enable/disable control | Logic-low (<0.61 V) disables all PWM outputs and drivers; precise threshold enables clean sequencing |
| ISEN (Pin 7) | Current-sense feedback node | Connects to resistor that converts rDS(ON) voltage into current for droop, balancing, and OCP |
| FB (Pin 6) / COMP (Pin 5) | Error amplifier inverting input / output | FB receives current-summed feedback (voltage + droop current); COMP drives external compensation network |
| UGATE1/2 (Pins 19,12) | Upper MOSFET gate drive outputs | High-current source/sink drivers (0.5 Ω typ. RDS(ON)) with 8 ns non-overlap timing to prevent shoot-through |
| LGATE1/2 (Pins 17,15) | Lower MOSFET gate drive outputs | Source/sink drivers referenced to PGND; 4 ns fall time enables fast freewheeling control |
| PHASE1/2 (Pins 18,13) | Half-bridge switch node inputs | Sample lower MOSFET rDS(ON) during conduction; enable cycle-by-cycle current sensing without added components |
| OFS (Pin 9) | Output voltage offset programming | Open for no offset; connect ROFS to GND for positive offset or R′OFS to VCC for negative offset |
| SSEND (Pin 10) | Soft-start end indicator | Open-drain output pulled low during soft-start; goes high-impedance at completion - usable for sequencing or status monitoring |
| VCC (Pin 8) / PVCC (Pin 16) | Bias / power MOSFET driver supplies | VCC powers analog/digital circuitry (5 V ±5%); PVCC powers gate drivers (5 V ±5%), decoupled separately |
| GND (Pin 25) / PGND (Pin 14) | Analog ground / power ground | GND references small-signal circuitry; PGND references LGATE drivers - separation reduces noise coupling |
Key Features
| Feature | Design Value |
|---|---|
| Integrated two-phase PWM control | Eliminates need for external phase synchronization circuitry; reduces BOM count and layout complexity in CPU VRMs |
| rDS(ON) current sensing | Removes discrete current-sense resistors, lowering cost, board area, and power loss while maintaining ±1% channel balance accuracy |
| Programmable droop voltage | Single-resistor configuration of load-line regulation ensures stable transient response and prevents overshoot/undershoot during load steps |
| Multi-tiered overvoltage protection | Clamps output by turning on lower MOSFETs when FB rises >VID+200 mV; includes disabled-state OVP (1.65/1.95 V) for safety during startup |
| Dynamic VID support | Enables on-the-fly voltage changes: VRM9/Hammer modes use 12-cycle validation + 4-cycle step ramp; VRM10 allows immediate transition per processor command |
Applications
| Server CPU Power Delivery | Laptop Processor VRM |
|---|---|
Use Scenario: Dual-phase 12 V or 5 V input conversion for x86 server CPUs requiring >60 A output with tight voltage tolerance. IC Role / Device Role / Timing Role: Primary PWM controller managing interleaved switching, VID decoding, droop-based load-line regulation, and per-phase current balancing. Use Value: Enables high-efficiency, low-ripple power delivery with reduced output capacitance and thermal spreading across two phases. |
Use Scenario: Compact, low-profile VRM for mobile Intel Core or AMD Ryzen processors in space-constrained laptop motherboards. IC Role / Device Role / Timing Role: Two-phase buck controller with integrated drivers, supporting dynamic VID transitions and pre-charged output startup. Use Value: Reduces solution footprint vs. single-phase controllers while meeting strict transient response and ±1% accuracy requirements. |
| Workstation GPU Core Supply | Embedded High-Performance SoC |
Use Scenario: Core voltage regulation for discrete GPUs in professional workstations where thermal density and transient load steps exceed single-phase capability. IC Role / Device Role / Timing Role: Multiphase controller implementing rDS(ON) sensing, overcurrent hiccup protection, and programmable OVP thresholds. Use Value: Delivers robust protection and precise current sharing across parallel power stages under heavy, rapidly varying loads. |
Use Scenario: Power management for FPGA-based or ASIC-based embedded systems requiring configurable VID and long-term supply stability. IC Role / Device Role / Timing Role: Programmable VRM controller supporting multiple VID standards, soft-start sequencing, and SSEND status signaling. Use Value: Simplifies firmware integration and enables reuse across platforms with different microprocessor families (Intel/AMD). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multiphase buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6566CRZ-T | Three-phase version with identical VID support, same 24-pin QFN package, but adds third phase control and extended frequency range (200–300 kHz) | Required for >90 A CPU/GPU loads where three-phase interleaving improves ripple and thermal distribution | Select ISL6566CRZ-T only when scaling beyond two-phase current capacity; pinout differs for PHASE3/UGATE3/LGATE3 signals |
| RT8802CGQW | Two-phase controller with VRM10/VRM11 support, integrated MOSFET drivers, but uses external current-sense resistors (not rDS(ON)) and lacks SSEND indicator | Suitable for cost-sensitive designs where discrete sensing is acceptable and soft-start status monitoring is not required | Choose RT8802CGQW for simplified design validation where rDS(ON) sensing complexity is undesirable; verify OCP threshold alignment with system needs |
Compared with ISL6563CR-T, the ISL6566CRZ-T extends phase count and frequency range for higher-current systems, while the RT8802CGQW trades rDS(ON) sensing for simpler current measurement - both require layout changes and do not offer drop-in replacement capability.
Availability
ISL6563CR-T is available at Aetrix Electronics and suitable for server CPU power delivery, laptop processor VRMs, and workstation GPU core supplies requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for ISL6563CR-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil (now part of Renesas Electronics) is a semiconductor company specializing in high-performance analog and power management ICs for computing, industrial, and communications markets.
The ISL6563CR-T belongs to Intersil's VRM controller product line, engineered specifically for precision, multi-phase voltage regulation of advanced microprocessors with dynamic VID, droop control, and integrated gate drivers.
FAQ
What is the operating temperature range for the ISL6563CR-T?
The ISL6563CR-T is specified for commercial operation from 0°C to +70°C ambient temperature. This range aligns with its ISL6563CRZ ordering variant and is validated per the Absolute Maximum Ratings and Recommended Operating Conditions in FN9126 Rev 8.00. Thermal resistance (θJA = 43°C/W) assumes mounting on a high-thermal-conductivity test board; actual board design impacts junction temperature margin.
How does the ISL6563CR-T implement droop voltage regulation?
The ISL6563CR-T implements droop regulation by injecting average channel current - derived from rDS(ON) sensing and scaled through the ISEN resistor - directly into the FB pin. This creates a voltage drop across the external feedback resistor R1 proportional to load current, resulting in a controlled output voltage decrease under load. Equation 4 in the datasheet (IFB = rDS(ON) × IPHASE / RISEN) defines the current injected for droop generation in the ISL6563CR-T.
Does the ISL6563CR-T support dynamic VID changes during operation?
Yes, the ISL6563CR-T supports dynamic VID changes. In VRM9 and AMD Hammer modes, it validates new VID codes over 12 switching cycles and ramps the output in 4-cycle steps to avoid transients. In VRM10 mode, it responds immediately upon 3-cycle validation - enabling processor-directed voltage transitions. The ISL6563CR-T datasheet confirms this behavior on pages 11–12, including timing examples for 1.5 V → 1.7 V transitions.
What is the purpose of the SSEND pin on the ISL6563CR-T?
The SSEND pin on the ISL6563CR-T is an open-drain soft-start end indicator. It remains actively pulled low during the soft-start interval and transitions to high-impedance (open) when soft-start completes. This signal can be used to enable downstream circuitry, trigger sequencing events, or monitor controller readiness - providing deterministic timing without requiring external timers or voltage monitors in the ISL6563CR-T design.
Can the ISL6563CR-T operate with a 12 V input supply?
Yes, the ISL6563CR-T supports both 5 V and 12 V input conversion as stated in the datasheet headline and "Features" section. Its gate drivers (UGATE/LGATE) and bootstrap circuitry (BOOT1/BOOT2) are designed to handle the higher voltage stress of 12 V input topologies. The recommended operating condition specifies VCC and PVCC at 5 V ±5%, but the power stage - driven by external MOSFETs - is rated for 12 V input operation per the typical application diagram on page 3 of FN9126.
ISL6563CR-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel VRM9, VRM10, AMD Hammer Applications
- Voltage - Input:
- 5V ~ 12V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.8V ~ 1.85V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (4x4)
ISL6563CR-T FAQ
1.How can I place an order for ISL6563CR-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6563CR-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6563CR-T reliable?
The price and inventory of ISL6563CR-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6563CR-T is usually 5 days.
3.What payment methods are accepted for ISL6563CR-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6563CR-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6563CR-T?
ISL6563CR-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6563CR-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6563CR-T?
For technical support, including ISL6563CR-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6563CR-T requirements.
6.How does Aetrix verify that ISL6563CR-T is sourced from the original manufacturer or authorized distributors?
All ISL6563CR-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6563CR-T meets industry standards.
7.What is the process for return or replacement of ISL6563CR-T?
All ISL6563CR-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6563CR-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6563CR-T part is unused and in its original packaging.
Return procedure for ISL6563CR-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL6563CR-T Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

