Renesas ISL6563CRZ-T
- Part No.:
- ISL6563CRZ-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
ISL6563CRZ-T.pdf
- Description:
- IC REG CTRLR INTEL 1OUT 24QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,094
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL6563CRZ-T from Renesas (formerly Intersil) is a two-phase multiphase buck PWM controller with integrated MOSFET drivers, designed for precision voltage regulation of advanced microprocessors. It supports Intel VRM9/VRM10 and AMD Hammer VID protocols, delivers ±1% system accuracy over temperature, and operates across 0°C to +70°C ambient range in a 24-lead QFN package. It enables high-current CPU power delivery with rDS(ON)-based current sensing and droop programming.
For engineers reviewing the ISL6563CRZ-T datasheet, ISL6563CRZ-T pinout, ISL6563CRZ-T application, or ISL6563CRZ-T equivalent, this page provides verified technical context, validated pin functions, confirmed multiphase control parameters, and real-world microprocessor power design implications - including dynamic VID transitions, interleaved ripple reduction, and channel-current balancing architecture.
Technical Context
The ISL6563CRZ-T implements a dual-channel, phase-interleaved buck topology with independent gate drivers (UGATE1/LGATE1 and UGATE2/LGATE2), synchronized by an internal oscillator operating at 189–255 kHz per phase. Its control loop integrates voltage regulation via FB/COMP feedback and current regulation via time-multiplexed rDS(ON) sampling on PHASE1/PHASE2 pins feeding ISEN.
It features programmable droop using a single external resistor, multi-tiered overvoltage protection (OVP) triggered at VID+200 mV with 100 mV hysteresis, and overcurrent detection at 95 µA threshold per channel. The device supports start-up into pre-charged outputs and executes dynamic VID changes - in VRM9/AMD mode with 12-cycle validation and 4-cycle step increments, or VRM10 mode with immediate reference update upon validated 3-cycle code lock.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Topology | Two-phase interleaved synchronous buck controller with integrated high- and low-side MOSFET drivers |
| Input Voltage Range | 5 V ±5% bias supply (VCC/PVCC); supports both 5 V and 12 V input conversion rails |
| Output Accuracy | ±1% system regulation accuracy over 0°C to +70°C ambient - ensures stable core voltage under thermal stress |
| Switching Frequency | 189–255 kHz per phase (TJ = +25°C to +85°C); enables optimized trade-off between efficiency and component size |
| VID Compatibility | 6-bit DAC supporting Intel VRM9, VRM10, and AMD Hammer microprocessor voltage identification protocols |
| Current Sensing | rDS(ON)-based lossless channel current sensing with automatic balancing - eliminates sense resistors and reduces BOM cost |
| OCP Threshold | 95 µA detection level per channel - triggers hiccup-mode shutdown after 7 consecutive cycles or simultaneous dual-channel exceedance |
Pinout & Package
ISL6563CRZ-T is housed in a Pb-free, RoHS-compliant 24-lead QFN package (4 mm × 4 mm, JEDEC MO-220 L24.4x4B), featuring an exposed thermal pad for enhanced heat dissipation and near chip-scale footprint for PCB area efficiency.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (8) | Bias supply input | 5 V ±5% supply for internal logic and error amplifier; requires local 0.1 µF ceramic decoupling |
| PVCC (16) | Power gate driver supply | 5 V supply for high-current UGATE/LGATE drivers; requires local 1 µF ceramic decoupling |
| GND (25) / PGND (14) | Analog and power ground references | GND references small-signal circuitry; PGND references LGATE drivers - must be short, low-inductance paths |
| VID0–VID4 (2,1,24–22) | Digital voltage ID inputs | TTL-compatible inputs decoded into output voltage setpoint; internally pulled up to ~1.2 V at 45 µA |
| DACSEL/VID5 (3) & VRM10 (4) | DAC standard selection | Configures VID protocol: VRM10 (pin grounded), VRM9 (DACSEL open/high), or AMD Hammer (DACSEL grounded, VRM10 open) |
| FB (6) / COMP (5) | Feedback and compensation nodes | FB is inverting input of error amplifier; COMP is its output - forms Type II/III compensation network with external R/C |
| ISEN (7) | Current-sense scaling input | Accepts current derived from rDS(ON) sampling; sets OCP threshold and feeds FB for droop generation |
| UGATE1/2 (19,12) / LGATE1/2 (17,15) | Gate drive outputs | Drive upper/lower MOSFET gates with <0.5 Ω source/sink resistance - supports fast switching with minimal dead-time risk |
| BOOT1/2 (20,11) / PHASE1/2 (18,13) | Bootstrap and half-bridge return | BOOT supplies floating bias for UGATE drivers; PHASE connects to upper MOSFET source - defines high-side switching node |
| ENLL (21) | Enable/disable control | Logic-level enable with ~0.61 V threshold and 60 mV hysteresis - allows precise sequencing control |
Key Features
| Feature | Design Value |
|---|---|
| Integrated two-phase power conversion | Reduces output ripple frequency by 2× and peak-to-peak amplitude by ~50% versus single-phase - lowers required output capacitance |
| Lossless rDS(ON) current sensing | Eliminates discrete current-sense resistors while enabling accurate channel-current balancing and OCP without added power loss |
| Programmable droop characteristic | Single-resistor adjustment of load-line slope - improves transient response and prevents overshoot/undershoot during load steps |
| Multi-tiered overvoltage protection | Clamps output by turning on lower MOSFETs when FB exceeds VID+200 mV - protects CPU during fault conditions |
| Dynamic VID support | Enables on-the-fly voltage scaling: VRM9/AMD mode uses 4-cycle sampling and 12-cycle validation; VRM10 mode updates immediately after 3-cycle lock |
Applications
| Desktop CPU Power Delivery | Laptop Core Voltage Regulation |
|---|---|
|
Use Scenario: Regulating core voltage for dual-core or quad-core Intel/AMD desktop processors requiring >60 A total output current. IC Role / Device Role / Timing Role: Two-phase PWM controller managing interleaved buck stages with integrated gate drivers and VID decoding. Use Value: Achieves ±1% regulation accuracy and reduced output ripple through phase interleaving - minimizes capacitor count and improves thermal distribution across PCB. |
Use Scenario: Providing dynamically scalable core voltage to mobile CPUs in space-constrained laptop motherboards. IC Role / Device Role / Timing Role: Multiphase controller executing VID-on-the-fly transitions (e.g., 1.3 V → 1.1 V) during CPU P-state changes. Use Value: Supports VRM10's immediate VID update or VRM9's controlled 4-cycle stepping - prevents overvoltage events during rapid frequency scaling. |
| Server Processor VRM Module | Embedded x86 Computing Platform |
|
Use Scenario: Building compact, high-efficiency VRM modules for dual-socket server motherboards with tight thermal budgets. IC Role / Device Role / Timing Role: Primary two-phase controller implementing rDS(ON) current sharing and droop-based load-line regulation. Use Value: Enables automatic channel-current balance without external op-amps - simplifies layout and improves long-term reliability under asymmetric loading. |
Use Scenario: Powering fanless embedded systems with x86 processors where EMI and thermal performance are critical. IC Role / Device Role / Timing Role: Synchronous buck controller with start-up into pre-charged output and hiccup-mode OCP for robust field operation. Use Value: Prevents inrush damage during hot-plug scenarios and recovers autonomously from overcurrent faults - reduces need for system-level reset intervention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multiphase buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6564CRZ-T | Four-phase version with identical VID compatibility, same 24-lead QFN package, but higher channel count and 150–220 kHz frequency range | Required for >100 A CPU loads; not drop-in compatible due to different pin mapping and phase-control logic | Select ISL6564CRZ-T only when scaling beyond two-phase current capability - verify PCB layout and firmware VID timing alignment |
| RT8802AGQW | Two-phase controller with integrated drivers, supports VRM10/VRM11, but uses external current-sense resistors and lacks rDS(ON) sensing | Suitable for designs prioritizing flexibility over BOM cost; requires additional sense resistors and compensation components | Choose RT8802AGQW if legacy board reuse mandates resistor-based current sensing or if VRM11 compliance is mandatory |
Compared with ISL6563CRZ-T, ISL6564CRZ-T scales phase count but demands layout revision, while RT8802AGQW trades rDS(ON) integration for broader VRM version support - making ISL6563CRZ-T optimal for cost-sensitive, thermally constrained two-phase CPU VRMs.
Availability
ISL6563CRZ-T is available at Aetrix Electronics and suitable for desktop CPU power delivery, laptop core voltage regulation, server VRM modules, and embedded x86 computing platforms requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for ISL6563CRZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation acquired Intersil in 2017 and maintains full product support, documentation, and manufacturing continuity for the ISL6563 family.
The ISL6563 belongs to Renesas' high-performance analog power management portfolio, engineered specifically for precision, multi-phase DC-DC conversion in advanced microprocessor voltage regulator modules.
FAQ
What is the operating temperature range for the ISL6563CRZ-T?
The ISL6563CRZ-T is rated for commercial temperature operation from 0°C to +70°C ambient. This range is explicitly defined in the ordering information table of the FN9126 datasheet and applies to all electrical specifications unless otherwise noted. The device's thermal resistance (θJA = 43°C/W) and maximum junction temperature (+150°C) ensure reliable operation within this envelope when properly mounted on a thermally optimized PCB with adequate copper pour under the exposed pad.
Does the ISL6563CRZ-T support dynamic VID changes, and how does it behave across different DAC modes?
Yes, the ISL6563CRZ-T supports dynamic VID changes. In VRM9 and AMD Hammer modes, it validates new VID codes over 12 switching cycles and updates the reference in 4-cycle increments - e.g., a 1.5 V to 1.7 V transition takes ~196 µs at 222 kHz. In VRM10 mode, it locks to new codes after 3 cycles and updates the reference immediately, enabling faster processor P-state transitions but requiring careful system-level coordination to avoid overvoltage events.
How does the ISL6563CRZ-T implement current balancing without external components?
The ISL6563CRZ-T achieves automatic channel-current balancing using internal rDS(ON) sensing on PHASE1 and PHASE2 pins. It time-multiplexes the sampled lower-MOSFET voltage across the ISEN resistor, generating a current proportional to average phase current. This current is fed to the FB pin for droop and compared against individual channel currents in the correction summing network - adjusting PWM duty cycle per channel to force current equality without external op-amps or sense resistors.
What protection features are built into the ISL6563CRZ-T, and how do they respond to faults?
The ISL6563CRZ-T includes overvoltage protection (OVP) that clamps the output by turning on lower MOSFETs when FB exceeds VID+200 mV, and overcurrent protection (OCP) that triggers hiccup-mode shutdown if either channel exceeds 95 µA for 7 consecutive cycles or both channels exceed simultaneously. After triggering, it waits 4096 cycles, attempts soft-start, and repeats in 2048-cycle intervals until the fault clears - providing robust, self-recovering protection for microprocessor power rails.
Can the ISL6563CRZ-T start up into a pre-charged output, and what design considerations enable this?
Yes, the ISL6563CRZ-T supports start-up into a pre-charged output - a key feature for hot-swap and redundant power applications. This capability is enabled by its dedicated ENLL enable pin with precise 0.61 V threshold and hysteresis, combined with internal logic that inhibits gate drive until soft-start completes. Designers must ensure proper sequencing of VCC/PVCC ramp-up and ENLL assertion, and avoid premature FB voltage injection before regulation establishes.
ISL6563CRZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel VRM9, VRM10, AMD Hammer Applications
- Voltage - Input:
- 5V ~ 12V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.8V ~ 1.85V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (4x4)
ISL6563CRZ-T FAQ
1.How can I place an order for ISL6563CRZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6563CRZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6563CRZ-T reliable?
The price and inventory of ISL6563CRZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6563CRZ-T is usually 5 days.
3.What payment methods are accepted for ISL6563CRZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6563CRZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6563CRZ-T?
ISL6563CRZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6563CRZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6563CRZ-T?
For technical support, including ISL6563CRZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6563CRZ-T requirements.
6.How does Aetrix verify that ISL6563CRZ-T is sourced from the original manufacturer or authorized distributors?
All ISL6563CRZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6563CRZ-T meets industry standards.
7.What is the process for return or replacement of ISL6563CRZ-T?
All ISL6563CRZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6563CRZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6563CRZ-T part is unused and in its original packaging.
Return procedure for ISL6563CRZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL6563CRZ-T Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

