Renesas ISL6566IRZA-T
- Part No.:
- ISL6566IRZA-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 40-VFQFN Exposed Pad
- Datasheet:
-
ISL6566IRZA-T.pdf
- Description:
- IC REG CTRLR INTEL 1OUT 40QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,728
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL6566IRZA-T from Renesas (formerly Intersil) is a three-phase buck PWM controller with integrated high- and low-side MOSFET drivers, designed for precision core voltage regulation in Intel VRM9/VRM10 and AMD Hammer microprocessor power delivery systems. It supports 1–3-phase operation, delivers ±0.5% system accuracy over temperature, uses dual DCR/rDS(ON) current sensing for load-line droop and channel-current balance, and operates up to 1.5 MHz per phase.
For engineers reviewing the ISL6566IRZA-T datasheet, ISL6566IRZA-T pinout, ISL6566IRZA-T application, or ISL6566IRZA-T equivalent, this device is selected for high-efficiency, space-constrained server CPU and high-performance computing power supplies requiring remote sensing, dynamic VID support, and multi-tier overvoltage/overcurrent protection.
Technical Context
The ISL6566IRZA-T implements interleaved three-phase PWM control with adaptive non-overlap timing, programmable switching frequency (via FS pin resistor), and independent per-channel gate drive bias (5–12 V on PVCC pins). Its error amplifier features 96 dB DC gain and 20 MHz gain-bandwidth product for tight transient response.
It integrates a 6-bit VID DAC with selectable Intel VRM9/VRM10 or AMD Hammer encoding, differential remote-sense amplifier (VDIFF output), and dual-path current sensing: lossless inductor DCR sampling (for load line and OCP) and rDS(ON) sampling (for channel-current balancing across all active phases).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Temp Range | –40°C to +85°C - qualified for industrial-grade CPU power supply environments. |
| System Accuracy | ±0.5% over temp (VID = 1.0–1.85 V) - ensures stable core voltage under thermal stress. |
| Max Switching Freq | 1.5 MHz per phase - enables compact magnetics and high transient response. |
| Current Sensing | DCR + rDS(ON) dual method - separates droop programming (DCR) from channel balance (rDS(ON)). |
| VID Compatibility | Intel VRM9/VRM10 & AMD Hammer - supports legacy and contemporary CPU voltage ID protocols. |
| Gate Drive Voltage | 5–12 V (adjustable via PVCC) - optimizes RDS(ON) and switching loss trade-off for discrete MOSFETs. |
| OCP Threshold | 100 µA at OCSET pin - sets overcurrent trip level with ±7% accuracy using single external resistor. |
Pinout & Package
ISL6566IRZA-T is housed in a 40-lead, 6 mm × 6 mm QFN package (Pb-free, RoHS-compliant) with exposed thermal pad. Pin count and layout match the ISL6566 family's standard L40.6x6 drawing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VID0–VID4, VID12.5 | Voltage ID input bits | Encode target output voltage per VRM9/VRM10/AMD Hammer tables; internally pulled up to 1.2 V. |
| UGATE1–3, LGATE1–3 | High-/low-side gate drivers | Direct drive outputs for external N-channel MOSFETs; include shoot-through protection logic. |
| ISEN1–3 | rDS(ON) current sense inputs | Sample lower-FET conduction current for per-phase current balancing; require external RISEN. |
| ISUM, IREF, ICOMP | DCR current sense interface | Form summing node (ISUM), reference point (IREF), and droop amplifier output (ICOMP) for load-line programming. |
| VSEN, RGND | Remote voltage sense inputs | Differential pair connected to CPU VSENSE pins; reject PCB IR drop between regulator and load. |
| ENLL | Enable input | Logic-threshold enable (0.66 V rising); internal 1 µA pull-up to 5 V. |
| FS | Frequency set input | Resistor-to-ground sets oscillator frequency (225–275 kHz base, scalable to 1.5 MHz with multiplier). |
| PGOOD | Power-good indicator | Open-drain output asserted high only when output is within ±5% UV/OV limits post-soft-start. |
Key Features
| Feature | Design Value |
|---|---|
| Dual current sensing | Simultaneous DCR (droop/OCP) and rDS(ON) (channel balance) eliminates need for separate current-sense resistors. |
| Dynamic VID support | Real-time VID code updates during operation enable CPU frequency/voltage scaling without reset. |
| Adjustable voltage offset | OFS pin sinks or sources 50 µA to generate precise positive/negative DC offset (±mV-level) on FB loop. |
| Multi-tier overvoltage protection | Two OV thresholds: fast clamp (125–175 mV above VID) and disable-level (1.62–2.02 V) for layered CPU safety. |
| Phase-count auto-detection | Number of active phases (1/2/3) determined by PVCC2/PVCC3 connection state - no configuration registers required. |
Applications
| Server CPU Power Delivery | Workstation GPU Core Supply |
|---|---|
|
Use Scenario: Regulating 1.0–1.55 V core voltage for dual-socket Xeon or EPYC processors under dynamic 30–120 A loads. IC Role / Device Role / Timing Role: Three-phase PWM controller with integrated drivers, remote sensing, and VID decoding - manages full VRM stage timing and current sharing. Use Value: ±0.5% accuracy and DCR-based droop ensure CPU voltage stays within Intel/AMD spec margins during rapid load transients. |
Use Scenario: Delivering tightly regulated 0.8–1.2 V to high-end GPU cores in professional workstations with thermal throttling requirements. IC Role / Device Role / Timing Role: Multi-phase buck controller implementing interleaved switching and rDS(ON)-based current balancing across three channels. Use Value: Channel-current balance reduces per-MOSFET thermal stress and extends reliability in fanless or low-airflow enclosures. |
| High-Performance Computing Node | Network Processor Power System |
|
Use Scenario: Powering ASIC/FPGA-based compute accelerators requiring <1% voltage deviation under 10–50 A step loads. IC Role / Device Role / Timing Role: Precision voltage regulation IC with differential remote sensing and digital soft-start - maintains stability across long PCB traces. Use Value: VDIFF output combines remote-sense error and DCR droop, enabling accurate closed-loop control without local feedback errors. |
Use Scenario: Providing 1.1–1.35 V core supply to multi-core network processors in telecom line cards with strict EMI and efficiency targets. IC Role / Device Role / Timing Role: Three-phase PWM controller with selectable 225–275 kHz base frequency and up to 1.5 MHz operation - balances efficiency vs. size. Use Value: Programmable FS resistor allows optimization of switching loss vs. inductor/capacitor size for constrained board area. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar three-phase buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6568IRZ-T | Pin-compatible upgrade with enhanced thermal shutdown (155°C), improved gate drive strength, and extended VID range (0.6–1.85 V). | Supports newer CPU generations requiring tighter accuracy (±0.3%) and higher current density (>150 A). | Select ISL6568IRZ-T for new designs targeting longer product lifecycle and higher power density. |
| RT8803GQW | Three-phase controller with integrated drivers but no DCR sensing - relies on external current-sense resistors for OCP and droop. | Lacks native rDS(ON) channel balancing; requires additional components for equivalent current-sharing performance. | Choose RT8803GQW only if BOM cost reduction outweighs PCB area increase from added sense resistors and op-amps. |
Compared with ISL6566IRZA-T, ISL6568IRZ-T offers higher integration and tighter specs for next-gen CPUs, while RT8803GQW trades integrated sensing for lower unit cost but increases design complexity and component count.
Availability
ISL6566IRZA-T is available at Aetrix Electronics and suitable for server motherboard development, high-performance computing power supplies, and industrial embedded CPU platforms requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ISL6566IRZA-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics acquired Intersil in 2017 and maintains full technical and supply chain continuity for the ISL6566 family. Renesas is a global semiconductor leader specializing in analog, power, and embedded processing solutions.
The ISL6566 belongs to Renesas' high-performance power management IC portfolio, engineered specifically for advanced microprocessor VRM applications demanding precision regulation, multi-phase efficiency, and robust fault protection.
FAQ
What is the operating temperature range for the ISL6566IRZA-T?
The ISL6566IRZA-T is rated for –40°C to +85°C ambient operation, qualifying it for industrial-grade CPU power delivery applications. This range is confirmed in the "Recommended Operating Conditions" table on page 6 of FN9178 Rev 4.00, and aligns with its "IR" grade designation in the Ordering Information table.
Does the ISL6566IRZA-T support both Intel and AMD microprocessor voltage ID protocols?
Yes, the ISL6566IRZA-T supports Intel VRM9.0, VRM10.0, and AMD Hammer VID protocols. Selection is controlled by the logic states of the VRM10 and VID12.5 pins, as defined in Table 1 on page 12 of FN9178 Rev 4.00. The device decodes up to 6-bit VID codes into precise reference voltages.
How does the ISL6566IRZA-T achieve channel-current balance across three phases?
The ISL6566IRZA-T achieves channel-current balance using rDS(ON) current sensing on each lower MOSFET via ISEN1–3 pins. It samples conduction current every cycle, computes a cycle-average current (IAVG), and adjusts individual PWM pulse widths to minimize error between per-channel current and IAVG - a patented method detailed on pages 11–12 of FN9178 Rev 4.00.
What package type and lead finish does the ISL6566IRZA-T use?
The ISL6566IRZA-T uses a 40-lead, 6 mm × 6 mm QFN package (drawing L40.6x6) with Pb-free (RoHS-compliant) matte tin plating and annealed termination finish. This is explicitly stated in the "Ordering Information" table on page 2 of FN9178 Rev 4.00, where "IRZA-T" denotes the Pb-free tape-and-reel variant.
Can the ISL6566IRZA-T operate in single- or two-phase mode?
Yes, the ISL6566IRZA-T supports 1-, 2-, or 3-phase operation. Phase count is auto-detected: leave PVCC2 and PVCC3 unconnected or grounded for 1-phase; ground only PVCC3 for 2-phase; connect all three PVCC pins for 3-phase. This behavior is documented in the "Functional Pin Description" section on page 8 of FN9178 Rev 4.00.
ISL6566IRZA-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 40-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel VRM9, VRM10, AMD Hammer Applications
- Voltage - Input:
- 3V ~ 12V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.8V ~ 1.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-QFN (6x6)
ISL6566IRZA-T FAQ
1.How can I place an order for ISL6566IRZA-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6566IRZA-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6566IRZA-T reliable?
The price and inventory of ISL6566IRZA-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6566IRZA-T is usually 5 days.
3.What payment methods are accepted for ISL6566IRZA-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6566IRZA-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6566IRZA-T?
ISL6566IRZA-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6566IRZA-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6566IRZA-T?
For technical support, including ISL6566IRZA-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6566IRZA-T requirements.
6.How does Aetrix verify that ISL6566IRZA-T is sourced from the original manufacturer or authorized distributors?
All ISL6566IRZA-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6566IRZA-T meets industry standards.
7.What is the process for return or replacement of ISL6566IRZA-T?
All ISL6566IRZA-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6566IRZA-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6566IRZA-T part is unused and in its original packaging.
Return procedure for ISL6566IRZA-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL6566IRZA-T Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

