Renesas ISL6566IRZ-T
- Part No.:
- ISL6566IRZ-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 40-VFQFN Exposed Pad
- Datasheet:
-
ISL6566IRZ-T.pdf
- Description:
- IC REG CTRLR INTEL 1OUT 40QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL6566IRZ-T from Renesas (formerly Intersil) is a three-phase buck PWM controller with integrated high- and low-side MOSFET drivers, designed for precision core voltage regulation in Intel VRM9/VRM10 and AMD Hammer microprocessor power delivery. It supports 1–3-phase operation, delivers ±0.5% system accuracy over temperature, uses dual DCR/rDS(ON) current sensing for droop control and channel balancing, and operates up to 1.5 MHz per phase in server and workstation CPU VRMs.
For engineers reviewing the ISL6566IRZ-T datasheet, ISL6566IRZ-T pinout, ISL6566IRZ-T application, or ISL6566IRZ-T equivalent, key selection criteria include its integrated gate drivers, programmable VID decoding (VRM9/VRM10/AMD), differential remote sensing, lossless DCR-based load-line programming, and triple-channel current balance architecture optimized for high-current, low-voltage CPU core supplies.
Technical Context
The ISL6566IRZ-T implements interleaved three-phase PWM control using a shared oscillator with 120° phase-shifted channel timing, enabling ripple cancellation and reduced output capacitance. Its error amplifier features 96 dB DC gain and 20 MHz gain-bandwidth product, supporting stable compensation across wide load transients.
Current sensing combines two independent paths: continuous inductor DCR sampling (via ISUM/IREF/ICOMP) for load-line droop and overcurrent protection, and per-phase rDS(ON) sampling (via ISEN1–ISEN3) for real-time channel-current balancing - both validated for simultaneous use in the same design.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Temp Range | –40°C to +85°C - qualified for industrial-grade CPU VRM deployment in servers and embedded computing. |
| Supply Voltage (VCC) | +5 V ±5% - powers internal logic and error amplifier; requires local 1.0 µF ceramic decoupling. |
| Gate Drive Bias (PVCC) | +5 V to +12 V - configurable per-phase driver voltage to optimize MOSFET switching speed and losses. |
| System Accuracy | ±0.5% (VID = 1.0–1.85 V) - ensures tight core voltage regulation under thermal and load variation. |
| Switching Frequency | Up to 1.5 MHz per phase - enables compact magnetics and fast transient response in space-constrained VRMs. |
| VID Compatibility | Intel VRM9, VRM10, and AMD Hammer - selectable via VRM10/VID12.5 pins; supports dynamic VID updates. |
| Overcurrent Threshold | 100 µA at OCSET pin - sets precise, resistor-programmable OCP level independent of DCR tolerance. |
Pinout & Package
ISL6566IRZ-T is housed in a 40-lead 6 mm × 6 mm QFN package (Pb-free, RoHS-compliant) with exposed thermal pad. Pin count and layout match the ISL6566 family's standardized footprint for drop-in compatibility across temperature grades.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VID0–VID4, VID12.5 | DAC input bits | Encode microprocessor core voltage setpoint per VRM9/VRM10/AMD Hammer tables; internally pulled up to 1.2 V. |
| UGATE1–3, LGATE1–3 | MOSFET gate drivers | Integrated high- and low-side drivers with <26 ns rise time; support adaptive non-overlap to prevent shoot-through. |
| ISEN1–3 | rDS(ON) current sense inputs | Sample lower-FET conduction current for per-phase channel balancing; require external RISEN resistors. |
| ISUM, IREF, ICOMP | DCR current sense interface | Implement lossless inductor DCR sensing for load-line droop and overcurrent protection; require external RC feedback. |
| VSEN, RGND | Differential remote sense inputs | Measure true load voltage at CPU pads; reject PCB IR drop via unity-gain differential amplifier. |
| ENLL | Enable threshold input | Active-high enable with 0.66 V threshold and 100 mV hysteresis; internal 1 µA pull-up to VCC. |
Key Features
| Feature | Design Value |
|---|---|
| Triple-phase interleaved PWM | Reduces output ripple frequency by 3× and peak-to-peak amplitude by ~67% vs single-phase, lowering required output capacitance. |
| Dual-path current sensing | DCR sensing provides accurate load-line droop and OCP; rDS(ON) sensing enables real-time per-channel current matching without added resistive loss. |
| Programmable VID decoding | Hardware-selectable support for VRM9, VRM10, and AMD Hammer DAC codes eliminates firmware dependency for voltage scaling. |
| Digital soft-start | Controls ramp rate of output voltage during power-up to limit inrush current and prevent PGOOD false trips. |
| Multi-tier overvoltage protection | Clamps rising output by turning on lower MOSFETs; includes fast OVP (125–175 mV above VID) and disabled-state OVP (1.62–2.02 V absolute). |
Applications
| Server CPU Power Delivery | Workstation VRM Design |
|---|---|
Use Scenario: Regulating 1.0–1.55 V core supply for dual-socket Xeon or EPYC processors under dynamic 30–60 A loads. IC Role / Device Role / Timing Role: Three-phase PWM controller with integrated drivers, managing phase interleaving, droop compensation, and channel-current balance. Use Value: Enables <1% voltage deviation during 10 A/µs load steps while reducing output capacitor count by 40% versus single-phase solutions. | Use Scenario: High-reliability power stage for professional GPU/CPU workstations requiring stable 1.2 V @ 45 A with thermal derating margin. IC Role / Device Role / Timing Role: Precision voltage regulator IC with differential remote sensing and thermal shutdown (160°C trip). Use Value: Maintains ±0.5% system accuracy across –40°C to +85°C ambient, eliminating need for external calibration in field-deployed systems. |
| AMD Platform Reference Designs | Intel VRM10 Compliant Systems |
Use Scenario: Reference power solution for AMD Hammer-family CPUs (e.g., Opteron) requiring VID code compatibility and NTC thermal compensation. IC Role / Device Role / Timing Role: VRM controller with AMD-specific VID decoding and OFS pin for negative offset adjustment. Use Value: Supports direct integration of NTC thermistors into IREF/ISUM loop for temperature-compensated load-line slope. | Use Scenario: VRM10.0-compliant motherboard design for Pentium 4 and later Intel CPUs demanding dynamic VID and fast transient response. IC Role / Device Role / Timing Role: Multi-phase controller with VRM10-selectable DAC, digital soft-start, and PGOOD sequencing. Use Value: Meets Intel VRM10 specification for ±0.5% accuracy, <50 µs transient recovery, and coordinated power-good assertion. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-phase buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6566IR-T | Same silicon, SnPb finish (non-Pb-free); identical electrical specs and pinout. | Not RoHS-compliant; restricted for new designs in EU/China markets. | Select ISL6566IRZ-T when Pb-free compliance and JEDEC MSL3 reflow compatibility are required. |
| RT8803AZSP | Three-phase controller with integrated drivers; supports VRM10/AMD but lacks DCR sensing - relies on external current-sense resistors. | Higher BOM cost due to sense resistors; no lossless droop implementation. | Choose RT8803AZSP only if legacy board reuse mandates identical package and pinout without DCR sensing requirement. |
Compared with ISL6566IR-T, the ISL6566IRZ-T adds Pb-free anneal processing for RoHS compliance and higher MSL rating, while RT8803AZSP offers similar topology but trades DCR-based efficiency for external sensing flexibility - making ISL6566IRZ-T optimal for high-efficiency, low-component-count CPU VRMs.
Availability
ISL6566IRZ-T is available at Aetrix Electronics and suitable for server motherboard design, workstation power subsystems, and AMD/Intel CPU reference platforms requiring stable component supply, long-lifecycle support, and RoHS-compliant manufacturing.
Supply support for ISL6566IRZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics acquired Intersil in 2017 and maintains full technical and supply chain ownership of the ISL6566 product line. Renesas is a global semiconductor leader specializing in analog, power, and embedded processing solutions.
The ISL6566 belongs to Renesas' high-performance power management IC portfolio, engineered specifically for multi-phase CPU/GPU core voltage regulation in datacenter, enterprise, and high-end computing applications where precision, density, and reliability are critical.
FAQ
What is the maximum operating junction temperature for the ISL6566IRZ-T?
The ISL6566IRZ-T has a maximum junction temperature of 150°C, with thermal shutdown activating at 160°C and recovery occurring at 100°C. This thermal protection ensures safe operation during sustained high-load conditions in server VRMs. The device's QFN package delivers θJA = 32°C/W and θJC = 3.5°C/W, enabling effective heat dissipation when mounted on thermally enhanced PCBs. ISL6566IRZ-T must be operated within its –40°C to +85°C ambient range to maintain reliability and parameter guarantees.
How does the ISL6566IRZ-T implement channel-current balancing across three phases?
The ISL6566IRZ-T achieves channel-current balancing using per-phase rDS(ON) current sensing via ISEN1–ISEN3 pins, sampling lower-MOSFET conduction current during forced-off time. Each sampled current is compared to the cycle-averaged sum (IAVG), and pulse-width correction is applied in real time to drive error toward zero. This patented method ensures <5% inter-channel current mismatch across 10–100% load, critical for thermal uniformity in high-power CPU VRMs. ISL6566IRZ-T does not require external current-sense resistors for this function.
Can the ISL6566IRZ-T support both Intel VRM10 and AMD Hammer VID codes on the same board?
Yes - the ISL6566IRZ-T supports Intel VRM10, VRM9, and AMD Hammer VID decoding through hardware configuration of the VRM10 and VID12.5 pins. Pulling VRM10 high selects VRM10.0 mode; grounding VRM10 and leaving VID12.5 open selects VRM9.0; grounding both selects AMD Hammer. This allows one ISL6566IRZ-T design to serve multiple processor families without firmware changes. All VID tables are implemented in hard logic, ensuring deterministic voltage setting at power-on. ISL6566IRZ-T retains full accuracy (±0.5%) across all three modes.
What is the purpose of the OFS pin on the ISL6566IRZ-T, and how is it configured?
The OFS pin on the ISL6566IRZ-T generates a precision 50 µA current source/sink to create a programmable DC offset voltage between FB and VDIFF. Connecting an external resistor from OFS to GND produces a positive offset; connecting to VCC yields a negative offset. Typical values are 10 kΩ (positive) or 30 kΩ (negative), yielding ±10–15 mV offsets. This allows fine-tuning of load-line droop or compensating for board-level tolerances. Leaving OFS unconnected disables offset. ISL6566IRZ-T's OFS circuitry is trimmed to ±5% accuracy and operates independently of VID settings.
Does the ISL6566IRZ-T require external bootstrap components for high-side gate drive?
Yes - the ISL6566IRZ-T requires external bootstrap capacitors connected to BOOT1–BOOT3 pins, with typical values of 0.1 µF ceramic placed close to each BOOT pin. Internal bootstrap diodes charge these capacitors from the corresponding PVCC rail during low-side conduction. No external diodes are needed. Bootstrap capacitor selection must account for gate charge (Qg) of the upper MOSFET and switching frequency; undersized capacitors cause UGATE undervoltage and erratic operation. ISL6566IRZ-T supports PVCC from +5 V to +12 V, enabling optimization of bootstrap voltage headroom.
ISL6566IRZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 40-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel VRM9, VRM10, AMD Hammer Applications
- Voltage - Input:
- 3V ~ 12V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.8V ~ 1.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-QFN (6x6)
ISL6566IRZ-T FAQ
1.How can I place an order for ISL6566IRZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6566IRZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6566IRZ-T reliable?
The price and inventory of ISL6566IRZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6566IRZ-T is usually 5 days.
3.What payment methods are accepted for ISL6566IRZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6566IRZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6566IRZ-T?
ISL6566IRZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6566IRZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6566IRZ-T?
For technical support, including ISL6566IRZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6566IRZ-T requirements.
6.How does Aetrix verify that ISL6566IRZ-T is sourced from the original manufacturer or authorized distributors?
All ISL6566IRZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6566IRZ-T meets industry standards.
7.What is the process for return or replacement of ISL6566IRZ-T?
All ISL6566IRZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6566IRZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6566IRZ-T part is unused and in its original packaging.
Return procedure for ISL6566IRZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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