Renesas ISL6752EVAL1Z

Overview

ISL6752EVAL1Z from Intersil is an evaluation board implementing a zero-voltage switching (ZVS) full-bridge DC/DC converter with synchronous rectification, rated for 400VDC input and 12V/50A output. It integrates the ISL6752 ZVS controller, N-channel FETs as secondary-side synchronous rectifiers (Q107–Q114), current-doubler output stage, and primary-side current sensing using dual transformers. Designed for high-efficiency telecom and server power supplies.

For engineers reviewing the ISL6752EVAL1Z datasheet, ISL6752EVAL1Z pinout, ISL6752EVAL1Z application, or ISL6752EVAL1Z equivalent, this page provides verified specifications, measured performance data (efficiency up to 92%, load regulation ±0.09V), ZVS timing waveforms, current-doubler inductor current balance validation, and SR drive delay circuit implementation details.

Technical Context

The ISL6752EVAL1Z implements primary-side control using the ISL6752 ZVS controller (U1), eliminating AC-line-isolated gate drive transformers for low-side FETs (Q3/Q4) while using a single operational-insulation transformer (T3) for high-side FETs (Q1/Q2). Synchronous rectifier drive signals (OUTLLN/OUTLRN) cross isolation via pulse transformer T6, which also generates secondary-side bias voltage.

It employs dual current-sensing transformers (T2/T4) on each low-side FET drain leg to avoid negative-current-induced sensing errors common with single-CT topologies. The current-doubler output uses two parallel inductor banks (L102/L103) and four SR pairs (Q107–Q114) to share output current and eliminate center-tapped secondary windings.

Key Specifications

Availability

ISL6752EVAL1Z is available at Aetrix Electronics and suitable for telecom rectifier evaluation, server PSU reference design validation, and high-efficiency DC/DC converter development requiring stable component supply and documented ZVS waveform characterization.

Supply support for ISL6752EVAL1Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Intersil (now part of Renesas Electronics) is a semiconductor company specializing in high-performance analog and power management ICs for industrial, computing, and communications applications.

The ISL6752EVAL1Z belongs to Intersil's ZVS full-bridge evaluation platform family, designed to accelerate adoption of zero-voltage switching topologies in high-power, high-efficiency isolated DC/DC converters for telecom and datacenter power systems.

FAQ

What is the primary function of the ISL6752EVAL1Z evaluation board?

The ISL6752EVAL1Z evaluation board demonstrates a complete zero-voltage switching (ZVS) full-bridge DC/DC converter with synchronous rectification. It implements the ISL6752 controller, dual current-sensing transformers, current-doubler output stage, and SR drive timing circuits to validate efficiency, regulation, and ZVS performance under real load conditions. The ISL6752EVAL1Z enables engineers to characterize waveforms, verify thermal behavior, and evaluate layout techniques for high-efficiency 400V-input power supplies.

How does the ISL6752EVAL1Z achieve zero-voltage switching?

The ISL6752EVAL1Z achieves ZVS through resonant turn-on of the primary-side bridge FETs (Q1–Q4) using leakage inductance and FET output capacitance. Measured waveforms (AN1341 Fig.20) show a resonance valley of ~160V before turn-on, recovering ~85% of switching losses. The ISL6752EVAL1Z uses complementary gate drive (U4/U5 + T3) and precise dead-time control to ensure FETs switch only when drain-source voltage crosses zero, minimizing hard-switching losses.

What synchronous rectifier drive method does the ISL6752EVAL1Z use?

The ISL6752EVAL1Z uses isolated, delayed gate drive for its eight synchronous rectifiers (Q107–Q114). ISL6752-generated OUTLLN/OUTLRN signals cross isolation via pulse transformer T6, then pass through RCD networks (R140/C125 etc.) to introduce controlled turn-on delays-preventing shoot-through during primary-side voltage transitions. This ensures SRs emulate diode conduction timing while avoiding reverse-current shorting, as validated in AN1341 Fig.9 and Fig.10.

What are the key measured performance metrics for the ISL6752EVAL1Z?

Per AN1341 test data, the ISL6752EVAL1Z delivers 92% peak efficiency at 400V_IN/50A_OUT, output voltage regulation within ±0.09V from no-load to full-load, and load transient response from 0A→12A with <100mV undershoot (Fig.28). Current sharing between L102/L103 is balanced to within 5% at all loads, and ZVS is confirmed via V_DS-V_GS overlap waveforms (Fig.20).

Can the ISL6752EVAL1Z be used for paralleling multiple units?

No-the ISL6752EVAL1Z does not implement paralleling features. AN1341 explicitly states that "Paralleling features are not implemented on the ISL6752EVAL1Z board" due to risks of reverse current flow through synchronous rectifiers causing primary-side voltage runaway. For redundancy, external OR-ing diodes or active OR-ing controllers must be added; the ISL6752EVAL1Z serves solely as a single-unit topology validation platform.