Renesas ISL84053IVZ
- Part No.:
- ISL84053IVZ
- Manufacturer:
- Renesas
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
ISL84053IVZ.pdf
- Description:
- IC SWITCH SPDTX3 100OHM 16TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,977
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL84053IVZ from Intersil is a triple single-pole/double-throw (SPDT) analog switch configured for 2-to-1 multiplexing, operating from single +2V to +12V or dual ±2V to ±6V supplies. It delivers 60Ω ON-resistance at ±5V, 90ns/60ns tON/tOFF switching at +5V, and 5nA max off-leakage at +85°C, enabling precision signal routing in portable medical ultrasound front-ends and telecom infrastructure channel selection.
For engineers reviewing the ISL84053IVZ datasheet, ISL84053IVZ pinout, ISL84053IVZ application, or ISL84053IVZ equivalent, key selection criteria include its rail-to-rail analog signal handling, break-before-make timing (30ns max at +5V), TTL/CMOS logic compatibility across 3.3V/5V supplies, and triple SPDT topology optimized for redundant signal path switching.
Technical Context
The ISL84053IVZ implements three independent SPDT switches with shared digital control logic, each featuring CMOS transmission gates driven by level-shifted address inputs (ADDA, ADDB, ADDC) and a global inhibit (INH) pin that forces all paths open simultaneously. Its architecture supports both unipolar and bipolar supply configurations without internal GND reference in the analog path.
Switch operation follows strict break-before-make timing (≤30ns at +5V) to prevent momentary shorting between NC and NO terminals. Charge injection is limited to 2pC, and off-capacitance is 9pF per COM terminal - critical for maintaining signal integrity in high-frequency multiplexed ADC/DAC interfaces up to 100MHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Configuration | Triple SPDT analog switch for 2:1 signal path selection per channel |
| ON-resistance (rON) | 60Ω max at ±5V supply - ensures minimal signal attenuation in precision sensor interfaces |
| Switching time (tON/tOFF) | 90ns/60ns max at +5V - enables high-speed channel scanning in ATE systems |
| Off-leakage current | 5nA max at +85°C with ±5V supply - preserves accuracy in low-current sample-and-hold circuits |
| Analog signal range | Rail-to-rail (0V to V+ or V− to V+) - supports full-scale input in single-supply data acquisition |
| Logic compatibility | 0.8V–2.4V thresholds at 2.7V–10V V+ - interoperable with 3.3V and 5V microcontrollers without level shifters |
| Charge injection | 2pC typical - minimizes voltage glitch in integrator reset and switched-capacitor applications |
Pinout & Package
ISL84053IVZ is housed in a 16-lead TSSOP package (Pb-free, RoHS compliant) with 0.65mm lead pitch and exposed thermal pad. The package supports reflow soldering per Intersil's Pb-Free Reflow Profile and has θJA = 110°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| V+ | Positive power supply | Drives analog switch gates and internal logic; sets upper analog signal limit |
| V− | Negative power supply | Required for dual-supply operation; sets lower analog signal limit; connect to GND for single-supply use |
| GND | Ground reference | Reference for digital inputs only; no connection to analog signal path |
| INH | Inhibit control | Active-high global disable: drives all switches open when pulled to V+ |
| ADDA, ADDB, ADDC | Address select inputs | Binary-encoded control of NC/NO selection per SPDT channel (e.g., ADDA=0 selects NCA) |
| COMA, COMB, COMC | Common terminals | Three independent analog inputs/outputs - each connects to selected NC or NO path |
| NOA, NOB, NOC | Normally-open terminals | Signal paths closed when corresponding address bit = 1 |
| NCA, NCB, NCC | Normally-closed terminals | Signal paths closed when corresponding address bit = 0; provides default path during power-up or INH assertion |
Key Features
| Feature | Design Value |
|---|---|
| Triple SPDT topology | Enables simultaneous 2:1 selection across three independent signal chains - ideal for redundant sensor inputs or dual-path audio routing |
| Break-before-make timing | Guaranteed ≤30ns at +5V prevents cross-conduction during switching - essential for protecting downstream amplifiers in medical imaging front-ends |
| rON matching | <12Ω max mismatch between channels at ±5V - ensures consistent gain and phase response in multi-channel instrumentation |
| Low charge injection | 2pC typical - eliminates measurable settling error in high-impedance integrator reset circuits used in CT scanner signal conditioning |
| Single/dual supply flexibility | +2V to +12V or ±2V to ±6V operation - simplifies power architecture in mixed-signal systems with legacy ±5V rails and modern 3.3V logic |
Applications
| Portable Medical Ultrasound | Telecom Channel Selection |
|---|---|
Use Scenario: Multiplexing echo return signals from multiple transducer elements into a shared ADC chain. IC Role / Device Role / Timing Role: Triple SPDT switch providing fast, low-distortion 2:1 selection per receive channel under FPGA control. Use Value: 60Ω rON and 9pF COM OFF-capacitance preserve wideband pulse fidelity up to 10MHz; 5nA leakage avoids baseline drift in low-current preamp outputs. | Use Scenario: Routing differential analog voice/data signals between line interface units and codec channels in ADSL/VDSL modems. IC Role / Device Role / Timing Role: Signal path selector enabling dynamic reconfiguration of transmit/receive paths without mechanical relays. Use Value: Rail-to-rail operation supports ±2.5V signaling; break-before-make timing prevents transient shorts during hot-swappable line card insertion. |
| Automated Test Equipment (ATE) | Operational Amplifier Gain Switching |
Use Scenario: Connecting DUT analog pins to measurement resources (DMM, SMU) via programmable signal matrix. IC Role / Device Role / Timing Role: High-speed channel selector controlled by test controller to route signals with minimal path variation. Use Value: 90ns tON enables sub-microsecond channel changes; rON matching <12Ω ensures consistent test accuracy across 100+ channels. | Use Scenario: Dynamically configuring feedback networks to change op-amp gain in programmable gain instrumentation amplifiers. IC Role / Device Role / Timing Role: Low-leakage SPDT switch selecting between precision resistor values in feedback loop. Use Value: 5nA max leakage prevents DC offset errors in µV-level biomedical measurements; 2pC charge injection avoids step-induced settling errors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4053ESE+ | Pin-compatible, same triple SPDT function, but 125Ω rON at +5V vs ISL84053IVZ's 125Ω (typical 125Ω, max 225Ω); 100ns tON at +5V | Suitable for lower-speed industrial I/O where 100ns switching suffices; less optimal for >1MHz multiplexed ADC sampling | Select MAX4053ESE+ when legacy design reuse or second-source qualification is required, accepting higher rON and slower switching |
| 74HC4053PW | Pin-compatible CMOS analog switch; 120Ω rON at +5V, 200ns tON, no dual-supply support - operates +2V to +10V only | Limited to single-supply systems; unsuitable for ±5V signal conditioning or rail-to-rail bipolar inputs | Choose 74HC4053PW for cost-sensitive consumer electronics with 3.3V/5V-only signal chains and relaxed speed requirements |
Compared with MAX4053ESE+ and 74HC4053PW, ISL84053IVZ offers superior dual-supply capability, faster switching (90ns vs ≥100ns), and guaranteed low leakage (5nA vs 10nA) - making it the preferred choice for precision medical and telecom signal routing where supply flexibility and signal integrity are critical.
Availability
ISL84053IVZ is available at Aetrix Electronics and suitable for portable medical ultrasound, telecom infrastructure, automated test equipment, and operational amplifier gain switching applications requiring stable component supply and long-term lifecycle support.
Supply support for ISL84053IVZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation is a designer and manufacturer of high-performance analog semiconductors for flat panel displays, mobile devices, and notebooks, with expertise in power management and signal processing.
The ISL84053IVZ belongs to Intersil's precision analog switch product line, engineered for low-voltage, low-leakage, high-speed signal routing in battery-powered and mixed-signal systems where rail-to-rail performance and supply flexibility are essential.
FAQ
What supply voltage ranges does the ISL84053IVZ support?
The ISL84053IVZ operates from a single +2V to +12V supply or dual ±2V to ±6V supplies. When using single-supply mode, V− must be connected to GND. Absolute maximum ratings allow V+ to V− up to 15V, providing margin for 12V supply tolerance and noise spikes. Performance specifications such as rON and switching times are characterized across these ranges.
How does the INH pin function on the ISL84053IVZ?
The INH (inhibit) pin on the ISL84053IVZ is an active-high global control that forces all three SPDT switches into the open state regardless of address input states. When INH is pulled to V+, all COM-to-NO and COM-to-NC paths disconnect. During normal operation, INH must be tied to GND. This feature enables system-level fault protection and synchronized channel disabling in safety-critical applications like medical imaging.
What is the maximum allowable analog signal voltage range for ISL84053IVZ?
The ISL84053IVZ supports rail-to-rail analog signals: from V− to V+ in dual-supply mode, or from GND to V+ in single-supply mode. Input voltages exceeding these limits forward-bias internal ESD diodes, so signals must remain within (V− − 0.3V) to (V+ + 0.3V). For example, with ±5V supplies, the safe analog range is −5.3V to +5.3V; with +5V/GND, it is 0V to +5.3V.
Does ISL84053IVZ require external level-shifting for 3.3V logic control?
No, ISL84053IVZ does not require external level-shifting for 3.3V logic control. Its digital inputs (INH, ADDA–ADDC) have TTL/CMOS-compatible thresholds (0.8V low, 2.4V high) validated over V+ = 2.7V to 10V. When powered from +3.3V or +5V, standard 3.3V microcontroller GPIOs directly drive the address and inhibit pins without additional circuitry.
What is the thermal resistance of the ISL84053IVZ in its TSSOP package?
The ISL84053IVZ in the 16-lead TSSOP package has a junction-to-ambient thermal resistance (θJA) of 110°C/W and junction-to-case (θJC) of 33°C/W, measured under standard JEDEC conditions. These values assume mounting on a high-thermal-conductivity PCB with adequate copper pour. The package's exposed thermal pad must be soldered to a ground plane for optimal heat dissipation in continuous 30mA-per-channel operation.
ISL84053IVZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 3
- On-State Resistance (Max):
- 100Ohm
- Channel-to-Channel Matching (ΔRon):
- 6Ohm (Max)
- Voltage - Supply, Single (V+):
- 2V ~ 12V
- Voltage - Supply, Dual (V±):
- ±2V ~ 6V
- Switch Time (Ton, Toff) (Max):
- 50ns, 40ns
- -3db Bandwidth:
- -
- Charge Injection:
- 2pC
- Channel Capacitance (CS(off), CD(off)):
- 3pF, 9pF
- Current - Leakage (IS(off)) (Max):
- 2pA (Typ)
- Crosstalk:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
ISL84053IVZ FAQ
1.How can I place an order for ISL84053IVZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL84053IVZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL84053IVZ reliable?
The price and inventory of ISL84053IVZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL84053IVZ is usually 5 days.
3.What payment methods are accepted for ISL84053IVZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL84053IVZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL84053IVZ?
ISL84053IVZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL84053IVZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL84053IVZ?
For technical support, including ISL84053IVZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL84053IVZ requirements.
6.How does Aetrix verify that ISL84053IVZ is sourced from the original manufacturer or authorized distributors?
All ISL84053IVZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL84053IVZ meets industry standards.
7.What is the process for return or replacement of ISL84053IVZ?
All ISL84053IVZ units undergo pre-shipment inspection (PSI). If there is an issue with ISL84053IVZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL84053IVZ part is unused and in its original packaging.
Return procedure for ISL84053IVZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL84053IVZ Tags

-
SN74LVC1G3157DBVR
Texas Instruments
-
SN74LVC1G66DBVR
Texas Instruments
-
SN74LVC1G66DCKR
Texas Instruments

-
SN74LVC1G3157DSFR
Texas Instruments

-
1P1G3157QDCKRQ1
Texas Instruments

-
SN74LVC2G66DCUR
Texas Instruments
-
SN74LV4052APWR
Texas Instruments

-
74HC4051D,653
Nexperia USA Inc.
-
SN74LV4051APWR
Texas Instruments
-
CD74HC4052PWR
Texas Instruments
-
CD74HC4051PWR
Texas Instruments
-
TS5A3166DBVR
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

