Renesas ISL90461TIE627-TK

Overview

ISL90461TIE627-TK from Intersil is a digitally controlled potentiometer (XDCP) configured as a volatile 32-tap variable resistor with 100kΩ end-to-end resistance, 2.7V–5.5V supply range, ±35 ppm/°C tempco, and SC-70-6 package. It serves as an electronic replacement for mechanical trimmers in biasing, gain control, and sensor calibration circuits.

For engineers reviewing the ISL904661TIE627-TK datasheet, ISL90461TIE627-TK pinout, ISL90461TIE627-TK application, or ISL90461TIE627-TK equivalent, key selection criteria include wiper resolution (32 taps), volatile memory behavior, Up/Down interface timing (1 MHz toggle rate), and RH/RL terminal voltage compliance up to VDD.

Technical Context

The ISL90461TIE627-TK implements a 31-element resistor ladder with electronically switched wiper access at 32 discrete tap points. Wiper position is controlled via a 2-pin Up/Down (U/D) and Chip Select (CS) interface, where CS enables counting and U/D sets direction on CS falling edge.

It operates as a 2-terminal variable resistor: RH is internally tied to the wiper, RL is the low terminal, and resistance between RH and RL varies from near-zero to 100kΩ in 3.226kΩ steps (RTOT/31). Settling time after wiper movement is 1µs, and active current draw is ≤25µA at 3V.

Key Specifications

Pinout & Package

ISL90461TIE627-TK is housed in a 6-lead SC-70 package (JEDEC MO-203AB, Intersil P6.049), measuring 2.15mm × 1.35mm × 1.10mm, with gull-wing leads and Pb-free matte tin plating.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar digitally controlled potentiometer applications.

Compared with AD5160BRJZ100-R7 and MCP4018T-E/OT, the ISL90461TIE627-TK offers minimal interface overhead (2 pins), identical 100kΩ resistance and SC-70-6 footprint, but requires external logic to retain wiper state across power cycles.

Availability

ISL90461TIE627-TK is available at Aetrix Electronics and suitable for LCD contrast control, laser diode biasing, and sensor transducer calibration requiring stable component supply and consistent SC-70-6 packaging.

Supply support for ISL90461TIE627-TK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Intersil Corporation is a U.S.-based semiconductor company specializing in precision analog, power management, and interface ICs, now part of Renesas Electronics.

The ISL90461 series delivers volatile digital potentiometers optimized for low-pin-count, low-power analog trimming in space-constrained industrial and automotive subsystems.

FAQ

What is the resistance tolerance and temperature coefficient of the ISL90461TIE627-TK?

The ISL90461TIE627-TK has a nominal end-to-end resistance of 100kΩ with ±20% initial tolerance and a typical temperature coefficient of ±35 ppm/°C over –40°C to +85°C. This ensures predictable drift in bias and gain-setting applications under thermal stress, and the value is confirmed in the "Potentiometer Specifications" table of FN8229.3.

Does the ISL90461TIE627-TK retain wiper position after power loss?

No, the ISL90461TIE627-TK uses volatile memory only: wiper position resets to default (typically mid-scale or last-latched value depending on power-up sequence) upon power cycle. It does not include EEPROM or non-volatile storage, as explicitly stated in the "Features" section and "Principles of Operation" of FN8229.3.

What are the absolute maximum ratings for the RH and RL terminals of the ISL90461TIE627-TK?

The RH and RL terminals of the ISL90461TIE627-TK tolerate voltages from 0V to VDD (i.e., within the supply rail), as specified in the "Potentiometer Specifications" table under "VR: RH, RL terminal voltages". Exceeding VDD or going below GND risks damage, per Absolute Maximum Ratings limiting terminal voltage to –1V to +7V relative to GND only under fault conditions.

Can the ISL90461TIE627-TK be used in a 3-terminal potentiometer configuration?

No - the ISL90461TIE627-TK is internally configured exclusively as a 2-terminal variable resistor: RH is hardwired to the wiper, and RL is the fixed low end. There is no independent wiper output pin; therefore, true 3-terminal (rheostat or potentiometer) connections are not supported, as clarified in the "Pin Descriptions" and "Principles of Operation" sections.

What is the minimum pulse width required on the U/D pin for reliable wiper stepping in the ISL90461TIE627-TK?

The ISL90461TIE627-TK requires a minimum U/D LOW period (t_IL) and HIGH period (t_IH) of 300 ns each, per the "Timing Specifications" table. Reliable wiper stepping occurs on rising edges of U/D when CS is low, and violating these pulse widths may cause missed or double-counted steps.