Renesas ISL9104IRUNZ-T
- Part No.:
- ISL9104IRUNZ-T
- Manufacturer:
- Renesas
- Package:
- 6-UFDFN
- Datasheet:
-
ISL9104IRUNZ-T.pdf
- Description:
- IC REG BUCK 3.3V 500MA 6UTDFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL9104IRUNZ-T from Renesas (formerly Intersil) is a 500mA, 4.3MHz synchronous buck DC-DC converter optimized for low-voltage microprocessor power in space-constrained portable devices. It delivers fixed 3.3V output from 2.7–6.0V input, features 20µA quiescent current in skip mode, 100% duty-cycle operation for <300mV dropout at 500mA, and integrates P- and N-channel MOSFETs with ON-resistances of 0.45Ω/0.4Ω (typ) at 3.6V.
For engineers reviewing the ISL9104IRUNZ-T datasheet, ISL9104IRUNZ-T pinout, ISL9104IRUNZ-T application, or ISL9104IRUNZ-T equivalent, this page provides verified technical context, real-world design meaning of key specs, validated 6-pin µTDFN package mapping, confirmed functional alternatives, and application-specific implementation guidance for battery-powered handheld systems.
Technical Context
The ISL9104IRUNZ-T employs peak-current-mode PWM control with internal slope compensation for fast transient response and cycle-by-cycle current limiting. Its 4.3MHz fixed-frequency operation under heavy load enables use of 1.0µH inductors and 4.7µF ceramic capacitors, minimizing PCB area.
Under light load, it automatically enters skip mode (PFM) triggered by 16-consecutive zero-crossing detections at the SW node, reducing switching frequency to minimize losses. The device includes integrated digital soft-start, logic-controlled shutdown (<1µA), output capacitor discharge via internal bleeding FET, and thermal shutdown at 130°C with 30°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 500mA guaranteed minimum - supports full-power operation of ARM Cortex-M cores and baseband processors in compact handsets. |
| Switching Frequency | 4.3MHz typical - enables use of 1.0µH inductor and 4.7µF input/output ceramics, reducing total solution size to <0.5cm². |
| Quiescent Current | 20µA typical in skip mode - extends Li-ion battery runtime in standby/sleep states of mobile phones and PDAs. |
| Input Voltage Range | 2.7V to 6.0V - compatible with single Li⁺ cell (2.7–4.2V), three NiMH cells (~3.6V), or regulated 5V rails. |
| Output Voltage | Fixed 3.3V ±3% - meets I/O voltage requirements for SDIO, USB PHY, and low-voltage logic interfaces. |
| Duty Cycle | 100% maximum - ensures regulation down to VIN = VOUT + 300mV, critical for end-of-discharge battery operation. |
| Shutdown Current | <1µA - enables deep-sleep power gating without external load switches. |
Pinout & Package
ISL9104IRUNZ-T is housed in a RoHS-compliant, 6-pin 1.6mm × 1.6mm µTDFN package (PKG DWG # L6.1.6x1.6) with exposed thermal pad. The package supports high-density layout and efficient heat dissipation in thin-profile portable designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pin 1) | Input supply connection | Accepts 2.7–6.0V; requires local 4.7µF X5R ceramic decoupling to GND for EMI suppression and transient current sourcing. |
| EN (Pin 2) | Enable control input | Active-high logic interface; pulls low to disable regulator and activate internal output capacitor discharge path. |
| NC (Pin 3) | No-connect terminal | Internally unconnected; must be left floating per datasheet - no tie to GND or other nets. |
| FB (Pin 4) | Feedback reference node | Internally tied to 3.3V output for fixed-version operation; not configurable - bypass resistor divider required only for adjustable variants. |
| GND (Pin 5) | Power ground reference | Primary return path for input/output currents and IC bias; must connect directly to solid ground plane beneath thermal pad. |
| SW (Pin 6) | Switching node | Connects to inductor's high-side terminal; carries high di/dt square wave - routing must be short, wide, and isolated from sensitive analog traces. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated P/N-channel MOSFETs | Reduces BOM count by eliminating external power switches; P-ch RDS(on) = 0.45Ω (typ) at 3.6V enables high efficiency at light loads. |
| Internal digital soft-start | 1.0ms controlled ramp limits inrush current during power-up, preventing input rail collapse and system brownouts. |
| Output capacitor discharge | Activates on EN low to rapidly bleed stored energy from COUT, meeting fast-power-down requirements in mobile UI and safety-critical subsystems. |
| Peak current limiting & SCP | Hardware-based OCP triggers immediate P-FET turn-off at 1.0A (typ); SCP reduces oscillator frequency during output short to prevent thermal runaway. |
| Ultrasonic skip mode (excluded) | Not implemented in ISL9104IRUNZ-T - ultrasonic operation (≥20kHz in PFM) applies only to ISL9104A variants (e.g., ISL9104AIRUNZ-T). |
Applications
| Mobile Phone Core Power | WCDMA Transceiver Bias |
|---|---|
|
Use Scenario: Powers application processor core and memory I/O in dual-mode WCDMA/GSM smartphones operating from single Li-ion battery. IC Role / Device Role / Timing Role: Primary step-down regulator delivering stable 3.3V at up to 500mA with dynamic load response to CPU burst activity. Use Value: 93% peak efficiency and 20µA skip-mode IQ extend talk time by >12% versus legacy 2MHz buck converters in 3G standby. |
Use Scenario: Supplies bias voltage to RF power amplifier modules and transceiver analog front-end in WCDMA handsets. IC Role / Device Role / Timing Role: Low-noise, fast-transient point-of-load regulator maintaining 3.3V under 100mA–450mA pulsed RF load profiles. Use Value: 4.3MHz switching and integrated MOSFETs suppress ripple-induced phase noise; 100% duty cycle sustains regulation during battery sag to 3.0V. |
| PDA System-on-Chip Supply | Portable Instrument Sensor Interface |
|
Use Scenario: Generates 3.3V rail for SoC, touchscreen controller, and NAND flash in palm-sized PDAs with tight thermal constraints. IC Role / Device Role / Timing Role: Compact, thermally robust DC-DC converter occupying <0.5cm² PCB area while supporting 500mA peak SoC current draw. Use Value: 1.6×1.6mm µTDFN package with exposed pad enables conduction cooling in sealed enclosures; thermal shutdown at 130°C prevents field failures. |
Use Scenario: Powers precision ADC drivers, op-amp signal chains, and digital isolators in handheld multimeters and environmental sensors. IC Role / Device Role / Timing Role: Low-ripple, low-noise power source with <1µA shutdown current enabling true "instant-on" wake-from-sleep functionality. Use Value: Internal bleeding FET discharges output cap in <10ms upon disable, ensuring safe hot-swap of sensor modules without voltage backfeed. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62231DRYR | 3.0–6.5V input, 3.3V fixed, 400mA rated, 3.6MHz switching, 22µA IQ in PFM - lower current rating and no 100% duty cycle. | Limited to sub-400mA loads; unsuitable for sustained 500mA CPU cores but adequate for peripheral rails. | Select when board space allows larger inductor (1.5µH) and peak load ≤400mA; verify dropout margin at end-of-battery. |
| MP2104DQ-LF-Z | 2.5–6.0V input, 3.3V fixed, 600mA rated, 1.5MHz switching, 30µA IQ - lower frequency increases inductor size and reduces transient response speed. | Requires ≥2.2µH inductor; slower load-step recovery may cause voltage droop in burst-mode processors. | Choose for cost-sensitive designs where 1.5MHz operation is acceptable and thermal headroom exists for higher conduction losses. |
Compared with TPS62231DRYR and MP2104DQ-LF-Z, the ISL9104IRUNZ-T uniquely combines 500mA capability, 4.3MHz frequency, 20µA skip-mode IQ, and 100% duty cycle in a 1.6×1.6mm footprint - making it optimal for space- and battery-life-constrained 3G/4G handheld power rails where all three parameters are simultaneously critical.
Availability
ISL9104IRUNZ-T is available at Aetrix Electronics and suitable for mobile phone core power, WCDMA transceiver bias, and PDA SoC supply requiring stable component supply across high-mix, low-volume production runs.
Supply support for ISL9104IRUNZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics (acquired Intersil in 2017) is a global leader in high-performance analog and mixed-signal semiconductors, specializing in power management ICs for portable and industrial applications.
The ISL9104 family was designed specifically for ultra-compact, battery-optimized DC-DC conversion in handheld consumer electronics - emphasizing minimal solution size, ultra-low quiescent current, and robust light-load efficiency.
FAQ
What is the output voltage tolerance of the ISL9104IRUNZ-T over temperature and line?
The ISL9104IRUNZ-T provides ±3% output voltage accuracy over the full operating temperature range (-40°C to +85°C) and input line variation (2.7V to 6.0V). This specification applies specifically to the fixed 3.3V version and is guaranteed by internal trimming - no external feedback resistors are used or required for this part number.
Does the ISL9104IRUNZ-T support ultrasonic skip mode to eliminate audible noise?
No, the ISL9104IRUNZ-T does not include ultrasonic skip mode. That feature is exclusive to the ISL9104A variant family (e.g., ISL9104AIRUNZ-T), which adds frequency dithering to keep PFM operation above 20kHz. The ISL9104IRUNZ-T operates in standard skip mode with variable frequency that may fall into the audible range under very light loads.
How does the ISL9104IRUNZ-T handle output capacitor discharge during shutdown?
When the EN pin is driven low, the ISL9104IRUNZ-T activates an internal N-channel bleeding MOSFET (RDS(on) ≈100Ω) between FB and GND, discharging the output capacitor through the feedback network. This ensures rapid, controlled VOUT decay - typically <10ms for a 4.7µF capacitor - meeting fast-power-down requirements in mobile UI subsystems.
What is the maximum recommended PCB trace length between VIN and the input capacitor for the ISL9104IRUNZ-T?
For optimal EMI performance and transient response, the trace between VIN (Pin 1) and the 4.7µF input capacitor must be as short and wide as possible - ideally ≤2mm in length and ≥0.3mm wide. Longer traces increase parasitic inductance, degrading high-frequency noise filtering and risking instability during load transients.
Can the ISL9104IRUNZ-T operate with a 2.5V input supply while delivering 3.3V output?
No, the ISL9104IRUNZ-T cannot boost or regulate above its input voltage. With a 2.5V input, it falls below the 2.7V minimum UVLO threshold and remains disabled. The device requires VIN ≥2.7V to enable, and for 3.3V output, VIN must remain ≥3.6V under load to maintain regulation - leveraging 100% duty cycle only when VIN approaches VOUT + dropout voltage.
ISL9104IRUNZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 6-UFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Current - Output:
- 500mA
- Frequency - Switching:
- 4.3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-UTDFN (1.6x1.6)
ISL9104IRUNZ-T FAQ
1.How can I place an order for ISL9104IRUNZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL9104IRUNZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL9104IRUNZ-T reliable?
The price and inventory of ISL9104IRUNZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL9104IRUNZ-T is usually 5 days.
3.What payment methods are accepted for ISL9104IRUNZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL9104IRUNZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL9104IRUNZ-T?
ISL9104IRUNZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL9104IRUNZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL9104IRUNZ-T?
For technical support, including ISL9104IRUNZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL9104IRUNZ-T requirements.
6.How does Aetrix verify that ISL9104IRUNZ-T is sourced from the original manufacturer or authorized distributors?
All ISL9104IRUNZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL9104IRUNZ-T meets industry standards.
7.What is the process for return or replacement of ISL9104IRUNZ-T?
All ISL9104IRUNZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL9104IRUNZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL9104IRUNZ-T part is unused and in its original packaging.
Return procedure for ISL9104IRUNZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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