Renesas ISL9105IRZ-T

Overview

ISL9105IRZ-T from Intersil is a 600mA, 1.6MHz synchronous buck regulator optimized for low-voltage microprocessor core power in battery-powered handheld devices. It operates from 2.7V to 5.5V input, delivers output down to 0.8V with ±3% accuracy, and integrates P- and N-channel MOSFETs with 160mΩ/140mΩ R_DS(on). Its 25µA quiescent current in SKIP mode maximizes Li+-cell runtime in PDAs and cellular phones.

For engineers reviewing the ISL9105IRZ-T datasheet, ISL9105IRZ-T pinout, ISL9105IRZ-T application, or ISL9105IRZ-T equivalent, key selection criteria include guaranteed 600mA output, 100% duty-cycle dropout operation (<200mV at full load), selectable forced-PWM/SKIP modes, integrated soft-start and POR timer, and thermal shutdown at 150°C.

Technical Context

The ISL9105IRZ-T employs current-mode PWM control with internal slope compensation for fast transient response and pulse-by-pulse current limiting. Its voltage loop uses a transconductance error amplifier (20µA/V) with internal RC compensation and a precise 0.8V bandgap reference.

It supports dual operating modes: forced PWM (fixed 1.6MHz) for noise-sensitive applications and SKIP mode for light-load efficiency, triggered by zero-cross detection over eight consecutive cycles. The 216ms POR timer initiates only when output voltage enters the PGOOD window (92–108% of nominal) and resets on RSI high-to-low transition.

Key Specifications

Pinout & Package

ISL9105IRZ-T is housed in an 8-lead, 2mm × 3mm DFN package with 1mm max height and exposed thermal pad (connected to GND). The RoHS-compliant package features matte tin e3 terminations and MSL3 reflow compatibility.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck regulator applications.

Compared with TPS62231DRVR and ADP2119ACPZ-R7, the ISL9105IRZ-T uniquely combines 100% duty-cycle operation, integrated 216ms POR with RSI reset, and dual-mode control in a 2×3mm DFN - making it the only option among the three qualified for Li+-powered microprocessor core rails requiring guaranteed power sequencing and ultra-low dropout.

Availability

ISL9105IRZ-T is available at Aetrix Electronics and suitable for mobile processor core power, DSP supply, PDA SoC rails, and low-power microcontroller subsystems requiring stable component supply across extended temperature and long production lifecycles.

Supply support for ISL9105IRZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Intersil Corporation (now part of Renesas Electronics) is a U.S.-based analog and power management IC designer known for high-efficiency DC/DC solutions targeting portable and battery-operated systems.

The ISL9105IRZ-T belongs to Intersil's low-IQ synchronous buck regulator product line, engineered specifically for extended battery life and minimal PCB area in handheld computing and communications devices.

FAQ

What is the minimum input voltage required for ISL9105IRZ-T to maintain regulation at 1.2V output?

The ISL9105IRZ-T supports 100% duty-cycle operation, so regulation is maintained as long as VIN ≥ VOUT + (IOUT × R_{DS(on)_P}). At 600mA and 160mΩ typical P-MOSFET R_DS(on), minimum VIN = 1.2V + 0.096V = 1.296V. However, the UVLO threshold (2.5V rising) prevents startup below that level, so practical minimum is 2.5V for reliable operation. ISL9105IRZ-T remains functional down to 2.2V falling UVLO threshold if already enabled.

Does ISL9105IRZ-T require external compensation components?

No, ISL9105IRZ-T features internal loop compensation using an embedded RC network. This eliminates the need for external compensation capacitors or resistors, reducing design complexity and PCB area. The internal compensation is optimized for standard 3.3µH inductors and 10µF ceramic output capacitors, as validated in the typical application circuit on page 6 of the FN6415 datasheet. ISL9105IRZ-T maintains stability across its full load and input voltage range without user adjustment.

How does the RSI pin affect the POR signal timing in ISL9105IRZ-T?

The RSI pin is an active-high reset input for the 216ms POR timer. When RSI is high, the POR output remains low regardless of output voltage status. A high-to-low transition on RSI restarts the 216ms counter only if the FB voltage is within the PGOOD window (89.5–110.5% of nominal). If FB is outside this window, the counter resets and waits for valid regulation before starting. This behavior allows precise system-level reset coordination. ISL9105IRZ-T's RSI functionality is documented in Figures 15 and 16 and Section "RSI Signal" on page 8 of FN6415 Rev 2.00.

Can ISL9105IRZ-T operate in forced PWM mode across all load conditions?

Yes, ISL9105IRZ-T enters forced PWM mode when the MODE pin is pulled low (≤0.4V). In this mode, it maintains a fixed 1.2–1.8MHz switching frequency regardless of load current - ensuring consistent EMI profile and eliminating low-frequency beat notes in noise-sensitive applications like audio codecs or RF front-ends. Unlike SKIP mode, forced PWM avoids variable-frequency operation but increases light-load quiescent current to ~5mA. ISL9105IRZ-T's MODE pin behavior is specified in the "Mode Selection" section on page 8 and Electrical Specifications table on page 2.

What thermal performance can be expected from ISL9105IRZ-T in a standard 2-layer PCB layout?

In a standard 2-layer PCB with 1in² of 1oz copper connected to the exposed thermal pad, ISL9105IRZ-T achieves θ_JA ≈ 75°C/W (typical). At 600mA output and 3.6V input, power dissipation is ~180mW, resulting in ~13.5°C junction-to-ambient rise above ambient - well below the 150°C thermal shutdown threshold. Layout best practices (short/wide PHASE traces, grounded thermal pad, and minimized power loop area) are critical; deviation may raise θ_JA significantly. ISL9105IRZ-T's thermal data is specified in Table "Thermal Information" on page 2 of FN6415.