Renesas ISL91302BIIZ-T
- Part No.:
- ISL91302BIIZ-T
- Manufacturer:
- Renesas
- Package:
- -
- Datasheet:
-
ISL91302BIIZ-T.pdf
- Description:
- IC REG MULTI PWR RAIL PHASE BUC
- Quantity:
- Payment:

- Shipping:

Inventory:4,792
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL91302BIIZ-T from Renesas Electronics is a dual/single-output synchronous multiphase buck PMIC with four integrated power stages and two controllers, configurable as 4+0, 3+1, or 2+2 phase outputs. It delivers up to 5A per phase, supports 0.3V–2.0V programmable output voltage via I²C/SPI, features R5 modulator technology for ultra-fast transient response (e.g., 50A/µs per phase), and achieves 94.7% peak efficiency at 3.8VIN/1.8VOUT. It targets CPU/GPU core power in mobile applications requiring high-density, dynamically scalable rail generation.
For engineers reviewing the ISL91302BIIZ-T datasheet, ISL91302BIIZ-T pinout, ISL91302BIIZ-T application, or ISL91302BIIZ-T equivalent, key selection criteria include its factory OTP-configurable phase assignment, ±0.7% system accuracy with remote sensing, 2–6MHz programmable PWM frequency, integrated ADC telemetry (voltage/current/temperature), and support for DVS slew rates up to ±3mV/µs across dual independent outputs.
Technical Context
The ISL91302BIIZ-T implements Renesas' proprietary R5 modulator architecture, enabling seamless transitions between continuous conduction mode (CCM) and discontinuous conduction mode (DCM) without external compensation while maintaining loop stability and sub-1µs load-step response. Its four power stages-each with 23mΩ high-side and 9mΩ low-side MOSFETs-are assignable across two independent buck controllers to realize flexible output configurations.
Configuration is performed via factory-programmed OTP settings, with runtime control through SPI or I²C interfaces supporting dynamic voltage scaling (DVS), fault reporting (UV/OV/OC/OT), and telemetry readback. The device integrates an internal 10-bit ADC for auxiliary inputs and current-sense offset correction, enabling closed-loop monitoring of VOUT, IOUT, and die temperature with ±10% current-sense accuracy at 500mA load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Configuration | Factory OTP-selectable: 4-phase single output (4+0), 3-phase + 1-phase dual output (3+1), or 2-phase + 2-phase dual output (2+2) |
| Per-Phase Output Current | 5A continuous - enables compact high-current rails without external MOSFETs or discrete drivers |
| Output Voltage Range | 0.3V to 2.0V (via 10-bit digital control) - supports modern SoC core and I/O rail requirements |
| Switching Frequency | 2MHz to 6MHz (OTP-programmable) - allows optimization of size vs. efficiency for Li-ion battery input (2.5–5.5V) |
| System Accuracy | ±0.7% over –10°C to +85°C with remote voltage sensing - ensures stable operation under thermal and layout variation |
| Transient Response | 50A/µs per phase load step capability - maintains regulation during CPU/GPU burst activity without excessive bulk capacitance |
| Quiescent Current | <1µA in shutdown (EN = 0V); 22µA in idle 4+0 mode - extends battery life in always-on subsystems |
Pinout & Package
ISL91302BIIZ-T uses a 2.551mm × 3.670mm, 54-ball WLCSP package with 0.4mm pitch, optimized for ultra-thin mobile PCBs. Ball mapping follows JEDEC standard (balls down, A1 top-left).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1, B1 | PVIN_A | Power input for Phase A high-side switch - requires local 10µF ceramic decoupling |
| A2–C2 | PH_A | Switching node for Phase A - connects directly to inductor and high-frequency output capacitor |
| A3–C3 | PGND_A | Power ground return for Phase A - must be tied to dedicated low-impedance PGND plane |
| D1 | EN | Master enable input (NMOS threshold) - asserts internal reference and controller startup sequence |
| E6, F1 | VOUT1, RTN1 | Remote sense inputs for Buck #1 - enable accurate regulation despite PCB IR drop |
| E1, F1 | VOUT2, RTN2 | Remote sense inputs for Buck #2 - allow independent feedback loop calibration per output |
| F3 | VIO | I/O supply (1.7–1.8V) - powers SPI/I²C interface and GPIO logic; separate from analog AVIN |
| G1 | AVIN | Analog supply (2.5–5.5V) - powers bandgap, ADC, and internal regulators; filtered via AVIN_FILT |
| H1, J1 | PVIN_C | Power input for Phase C - assigned based on OTP configuration (e.g., 3+1 or 2+2) |
| G5–J5 | PH_D | Switching node for Phase D - used in all configurations except 2+2 where PH_C/PH_D serve Buck #2 |
Key Features
| Feature | Design Value |
|---|---|
| R5 Modulator Architecture | Enables <1µs transient recovery and eliminates need for external loop compensation components |
| Integrated Power Stages | Four 5A-capable phases with 23mΩ/9mΩ HS/LS MOSFETs - reduces BOM count and solution footprint by >40% vs. discrete controllers |
| Dual Independent DVS | Programmable slew rate (±3mV/µs) per output - supports coordinated voltage scaling for heterogeneous SoC domains |
| Telemetry ADC | Internal 10-bit ADC monitors VOUT, IOUT, TDIE, and two auxiliary inputs - enables real-time health monitoring without external sensors |
| Configurable Serial Interface | I²C (3.4MHz) or SPI (26MHz) with pin-mappable MPIOs - supports flexible host processor integration and debug access |
| Comprehensive Protection | Hardware-based UV/OV/OC/OT detection with latch-off or retry behavior - prevents damage during fault conditions without firmware intervention |
Applications
| Smartphone Application Processor Core Power | FPGA Core & I/O Bank Power |
|---|---|
|
Use Scenario: Supplying dynamic voltage rails to ARM Cortex-A7x clusters and GPU cores during burst-mode execution. IC Role / Device Role / Timing Role: Dual-output 3+1 configuration delivering 1.1V@8A (3-phase) and 0.8V@3A (1-phase) with synchronized DVS. Use Value: Achieves 94.7% efficiency at 3.8VIN/1.1VOUT and sustains 50A/µs load transients - eliminating need for large bulk capacitors and reducing PCB area by 35%. |
Use Scenario: Providing independently regulated core (0.85V) and I/O (1.8V) rails to Xilinx Zynq UltraScale+ MPSoC. IC Role / Device Role / Timing Role: 2+2 configuration with remote sensing on both outputs to compensate for FPGA package and board-level IR drop. Use Value: ±0.7% system accuracy ensures timing margin compliance; integrated ADC telemetry enables runtime thermal derating of FPGA logic resources. |
| Industrial MPU Power (e.g., i.MX 8M) | Human Machine Interface (HMI) Display Subsystem |
|
Use Scenario: Generating 1.0V@6A core and 3.3V@2A I/O rails for NXP i.MX 8M Nano in fanless edge gateways. IC Role / Device Role / Timing Role: 4+0 configuration with OTP-set 4MHz switching frequency to minimize EMI in noise-sensitive industrial environments. Use Value: Low IQ (<1µA shutdown, 22µA idle) extends backup battery life; thermal warning alert (85°C) triggers proactive fan control before throttling. |
Use Scenario: Powering AMOLED display driver ICs and touch controller in automotive infotainment panels. IC Role / Device Role / Timing Role: 2+2 configuration with independent DVS on each rail to match display brightness and frame-rate modulation. Use Value: 2.551mm × 3.670mm WLCSP fits within tight bezel constraints; ±3mV/µs DVS slew rate synchronizes voltage ramp with display refresh timing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multiphase buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL91301B | 42-ball 6×7 WLCSP; max 4A per phase; quad-output (1+1+1+1) only; no 4+0 or 3+1 modes | Targeted at lower-current, multi-rail systems (e.g., sensor hubs) rather than high-power CPU/GPU cores | Select ISL91301B only when needing four independent low-current rails (<4A) and smaller package footprint. |
| ISL91211B | Same 54-ball WLCSP; 5A per phase; quad-output (1+1+1+1); lacks R5 modulator - slower transient response (~5µs) | Suitable for fixed-voltage, non-DVS applications like memory I/O where fast load steps are not required | Choose ISL91211B if design prioritizes cost over dynamic performance and requires four independent 1-phase rails. |
Compared with ISL91301B and ISL91211B, the ISL91302BIIZ-T uniquely supports reconfigurable high-current phase grouping (4+0/3+1/2+2), delivers superior transient response via R5 modulation, and integrates full DVS control - making it the only option for scalable, high-efficiency mobile SoC power delivery.
Availability
ISL91302BIIZ-T is available at Aetrix Electronics and suitable for smartphone application processor core power, FPGA core & I/O bank power, and industrial MPU power requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ISL91302BIIZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog power management, and embedded solutions for automotive, industrial, and consumer markets.
The ISL91302B belongs to Renesas' high-density mobile PMIC product line, designed specifically for dynamic, multi-rail power delivery in space-constrained portable devices with stringent efficiency and transient response requirements.
FAQ
What output configurations does the ISL91302BIIZ-T support?
The ISL91302BIIZ-T supports three factory OTP-configurable output topologies: 4-phase single output (4+0), 3-phase + 1-phase dual output (3+1), and 2-phase + 2-phase dual output (2+2). Each configuration assigns the four integrated power stages to one or two buck controllers, enabling flexible rail generation for CPU, GPU, or FPGA applications without changing hardware. The ISL91302BIIZ-T's pinout and internal routing are identical across all modes - only OTP programming determines phase allocation.
How does the R5 modulator in the ISL91302BIIZ-T improve transient response?
The R5 modulator in the ISL91302BIIZ-T delivers ultra-fast transient response by enabling sub-1µs recovery from 50A/µs load steps per phase, achieved through predictive control and seamless CCM/DCM transitions without external compensation. Unlike conventional voltage-mode or current-mode controllers, the R5 architecture continuously monitors phase current and output voltage slope to adjust duty cycle in real time - eliminating the need for large output capacitance and ensuring regulation stability under rapid SoC workload changes. This behavior is intrinsic to the ISL91302BIIZ-T's silicon design.
Can the ISL91302BIIZ-T perform independent dynamic voltage scaling on both outputs?
Yes, the ISL91302BIIZ-T supports fully independent Dynamic Voltage Scaling (DVS) on both outputs with programmable slew rates from ±0.5mV/µs to ±3mV/µs. Each buck controller has dedicated DVS registers accessible via I²C or SPI, allowing asynchronous voltage ramps - for example, lowering VOUT1 for CPU cores while maintaining VOUT2 for GPU memory. The ISL91302BIIZ-T also supports global DVS using GPIO pins (DVS_PIN0/DVS_PIN1) for hardware-triggered scaling events, verified in datasheet Table 2 pin mode 0x3 and 0x4.
What is the accuracy of remote voltage sensing on the ISL91302BIIZ-T?
The ISL91302BIIZ-T achieves ±0.7% system output voltage accuracy over –10°C to +85°C using remote sensing (VOUT1/RTN1 and VOUT2/RTN2), which compensates for PCB trace resistance between the PMIC and load. This specification includes errors from the internal error amplifier, feedback divider, and ADC reference - validated under CCM operation with VOUT > 0.6V. For sub-0.6V outputs, accuracy degrades to ±4mV (±5.5mV over temperature), as confirmed in FN8828 Rev.3.01 Section 2.4 "Buck Regulation".
Does the ISL91302BIIZ-T require external MOSFETs or diodes?
No, the ISL91302BIIZ-T integrates all power switches: four high-side MOSFETs (23mΩ typical rDS(ON)) and four low-side MOSFETs (9mΩ typical rDS(ON)). No external MOSFETs, Schottky diodes, or gate drivers are needed. The device operates as a complete synchronous buck solution - only external inductors, input/output capacitors, and optional RC snubbers are required. This integration is explicitly stated in the datasheet overview and confirmed in the "Features" section on page 1.
ISL91302BIIZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- *
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- -
- Output Configuration:
- -
- Topology:
- -
- Output Type:
- -
- Number of Outputs:
- -
- Voltage - Input (Min):
- -
- Voltage - Input (Max):
- -
- Voltage - Output (Min/Fixed):
- -
- Voltage - Output (Max):
- -
- Current - Output:
- -
- Frequency - Switching:
- -
- Synchronous Rectifier:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
ISL91302BIIZ-T FAQ
1.How can I place an order for ISL91302BIIZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL91302BIIZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL91302BIIZ-T reliable?
The price and inventory of ISL91302BIIZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL91302BIIZ-T is usually 5 days.
3.What payment methods are accepted for ISL91302BIIZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL91302BIIZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL91302BIIZ-T?
ISL91302BIIZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL91302BIIZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL91302BIIZ-T?
For technical support, including ISL91302BIIZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL91302BIIZ-T requirements.
6.How does Aetrix verify that ISL91302BIIZ-T is sourced from the original manufacturer or authorized distributors?
All ISL91302BIIZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL91302BIIZ-T meets industry standards.
7.What is the process for return or replacement of ISL91302BIIZ-T?
All ISL91302BIIZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL91302BIIZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL91302BIIZ-T part is unused and in its original packaging.
Return procedure for ISL91302BIIZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL91302BIIZ-T Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

