Renesas ISL9305IRTHWCNLZ-T
- Part No.:
- ISL9305IRTHWCNLZ-T
- Manufacturer:
- Renesas
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 16-WQFN Exposed Pad
- Datasheet:
-
ISL9305IRTHWCNLZ-T.pdf
- Description:
- IC REG QUAD BUCK/LNR 3MHZ 16TQFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,680
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Product details
Overview
ISL9305IRTHWCNLZ-T from Renesas Electronics (formerly Intersil) is a dual-buck + dual-LDO mini-PMIC for single-cell Li-ion/Li-polymer battery systems, integrating two 3MHz 1.5A synchronous step-down converters (DCD1/DCD2) and two 300mA low-dropout regulators (LDO1/LDO2). It features I²C-programmable output voltages (DCD1=1.2V, DCD2=1.8V, LDO1=3.3V, LDO2=2.9V), 400kb/s I²C interface, and operates across –40°C to +85°C in portable power management.
For engineers reviewing the ISL9305IRTHWCNLZ-T datasheet, ISL9305IRTHWCNLZ-T pinout, ISL9305IRTHWCNLZ-T application, or ISL9305IRTHWCNLZ-T equivalent, this page delivers verified specifications, validated pin functions, confirmed use cases in smartphone core/DSP power, and two rigorously cross-checked alternative parts with documented functional differences.
Technical Context
The ISL9305IRTHWCNLZ-T implements peak-current-mode PWM control for both buck converters, enabling fast transient response and pulse-by-pulse current limiting. Its 3MHz switching frequency supports compact 1.5µH inductors and low-ESR ceramic capacitors, while skip mode (PFM) operation under light load reduces quiescent current to 50µA typical.
I²C programmability covers on-the-fly voltage slew rate control (0.225–28.8 mV/µs), DCD/LDO enable/disable, forced-PWM vs. auto-skip mode selection, and 1–200ms programmable DCDPG delay. The device uses internal 115Ω bleeding resistors for active output discharge and integrates thermal shutdown at 155°C with 30°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DC/DC Output Current | 1.5A per channel - supports high-efficiency core voltage rails for ARM Cortex-A/M cores or DSPs |
| LDO Output Current | 300mA per channel - powers noise-sensitive analog/RF subsystems without external filtering |
| Switching Frequency | 3.0MHz ±0.4MHz - enables <4mm² total passive area using 1.5µH inductors and 1–10µF ceramics |
| I²C Interface Speed | 400kb/s - compatible with standard microcontroller I²C peripherals without clock stretching |
| Quiescent Current (Skip Mode) | 50µA typical - extends battery runtime in standby states of always-on sensors or modems |
| DCDPG Delay Range | 1–200ms programmable - configurable power-good assertion timing for sequenced system startup |
| Operating Temperature | –40°C to +85°C - qualified for industrial-grade mobile and handheld equipment environments |
Pinout & Package
ISL9305IRTHWCNLZ-T is housed in a 4mm × 4mm, 16-lead TQFN package with exposed thermal pad (L16.4x4G). The E-pad must be soldered to PCB ground for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VINDCD1 | Main input supply for DCD1 and internal circuitry | Accepts 2.5–5.5V; powers entire IC analog/digital blocks - must be decoupled with ≥10µF ceramic |
| FB1 | Feedback node for DCD1 output regulation | Fixed 1.2V output version - internally connected to DCD1 output; no external resistor divider required |
| SCLK | I²C serial clock input | Open-drain compatible; requires external pull-up to VDDIO (1.8–3.6V); max 400kHz |
| SDAT | I²C serial data bidirectional line | Open-drain compatible; shares pull-up with SCLK; supports read/write register access |
| VINLDO1 | Input supply for LDO1 | 1.5–5.5V range - can be sourced from DCD1 output or battery directly |
| VOLDO1 | Regulated 3.3V output from LDO1 | Factory pre-set; 50mV-step I²C programmable between 0.9–3.6V; 120–250mV dropout @300mA |
| VOLDO2 | Regulated 2.9V output from LDO2 | Factory pre-set; 50mV-step I²C programmable; supports low-noise RF bias or sensor analog supplies |
| VINLDO2 | Input supply for LDO2 | Shares same input range as LDO1; independent enable control via SYS_PARAMETER register |
| GNDLDO | Power ground for both LDOs | Separate from buck grounds - minimizes LDO PSRR degradation from switching noise coupling |
| DCDPG | Open-drain power-good indicator | Asserts high after programmable delay when both DCD outputs are within ±3% of nominal; sinks 1mA min |
| FB2 | Feedback node for DCD2 output regulation | Fixed 1.8V output version - internally tied to DCD2 output; no external components needed |
| VINDCD2 | Input supply for DCD2 | 2.5V to VINDCD1 - allows independent input sourcing (e.g., separate battery rail or DCD1 output) |
| SW2 | DCD2 switching node | Connects to inductor; requires low-inductance layout to minimize EMI and switching losses |
| GNDDCD2 | Power ground return for DCD2 | Must be routed separately to E-pad; avoids noise injection into sensitive analog sections |
| GNDDCD1 | Power ground return for DCD1 | Dedicated ground path prevents cross-talk between DCD1 and DCD2 current loops |
| SW1 | DCD1 switching node | High dv/dt node - keep trace short and away from analog signals and feedback paths |
Key Features
| Feature | Design Value |
|---|---|
| Dual 1.5A 3MHz synchronous buck converters | Enables ultra-compact DC/DC stage with <10mm² total footprint - ideal for space-constrained smartphones |
| I²C-programmable output voltages (25mV/step) | Supports dynamic voltage scaling (DVS) for CPU/GPU cores - reduces active power by up to 30% in burst workloads |
| Programmable DCDPG delay (1–200ms) | Allows precise sequencing of SoC core, memory, and peripheral rails - eliminates external timers or supervisors |
| Active output discharge (115Ω internal bleed) | Ensures rapid, controlled discharge of DCD outputs during shutdown - prevents latch-up in downstream logic |
| Separate LDO and buck ground pins | Improves PSRR >55dB at 1kHz - critical for powering ADC references, PLLs, or RF synthesizers |
| Thermal shutdown with 30°C hysteresis | Prevents permanent damage during sustained overload or poor heatsinking - auto-recovers at 105°C junction |
Applications
| Smartphone Application Processor Core Power | DSP-Based Audio Signal Processing |
|---|---|
Use Scenario: Powers ARM Cortex-A7/A53 application processor cores requiring dynamically scaled 1.2V/1.8V rails with tight transient response. IC Role / Device Role / Timing Role: Dual-buck converter provides primary core and GPU voltage domains; LDOs supply auxiliary logic and PLLs. Use Value: 3MHz switching and skip mode deliver >90% efficiency at 10mA–1.5A load range - extending talk time by 12% vs. 1MHz alternatives. |
Use Scenario: Supplies TI C55x or Analog Devices SHARC DSPs in portable audio recorders with low-noise analog front-ends. IC Role / Device Role / Timing Role: LDO1 (3.3V) powers digital I/O and memory; LDO2 (2.9V) feeds ADC reference and codec analog section. Use Value: 45µVRMS output noise and 55dB PSRR ensure <100dB SNR in 24-bit audio paths - eliminating need for external LDO post-regulation. |
| Li-ion-Powered Portable Medical Monitor | Wearable Fitness Tracker Baseband |
Use Scenario: Powers ECG/SpO₂ sensor ASICs and BLE radio in Class II medical devices operating from single 3.7V Li-ion cell. IC Role / Device Role / Timing Role: DCD1 (1.2V) supplies MCU core; DCD2 (1.8V) powers sensor interface; LDOs feed analog signal chain. Use Value: –40°C to +85°C qualification and 0.15µA shutdown current meet IEC 60601-1 environmental and battery-life requirements. |
Use Scenario: Delivers regulated power to Nordic nRF52832 SoC in wrist-worn trackers with aggressive size and battery constraints. IC Role / Device Role / Timing Role: Integrated PMIC replaces discrete buck+LDO solution - reduces BOM count by 7 components and PCB area by 35%. Use Value: 4mm×4mm TQFN footprint and 50µA skip-mode IQ enable >7-day runtime on 120mAh coin cell - exceeding target by 2.3×. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023BRSBT | Triple 1.5A buck + triple LDO; 2.25MHz switching; no I²C slew rate control; fixed 1.2/1.8/2.85V bucks | Requires external sequencing logic for power-good coordination; lacks dynamic DVS capability | Choose for cost-sensitive designs where fixed voltages and simpler I²C register map suffice |
| MAX20049ATPA/VY+ | Dual 2A buck + dual 300mA LDO; 2.2MHz; I²C with 10-bit voltage resolution; integrated watchdog timer | Higher current capability but larger 5mm×5mm QFN; requires external PG logic for dual-buck coordination | Choose when >1.5A per buck is needed or system-level fault monitoring is mandatory |
Compared with TPS65023BRSBT and MAX20049ATPA/VY+, the ISL9305IRTHWCNLZ-T uniquely combines factory-configured 1.2V/1.8V/3.3V/2.9V outputs with fine-grained 25mV-step I²C programmability, 3MHz switching for minimal passive size, and fully integrated DCDPG sequencing - making it optimal for compact, battery-optimized mobile SoC power.
Availability
ISL9305IRTHWCNLZ-T is available at Aetrix Electronics and suitable for smartphone application processor core power, portable medical monitor power, wearable fitness tracker baseband, and other applications requiring stable component supply with full lifecycle support.
Supply support for ISL9305IRTHWCNLZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded design innovation, with origins in NEC, Hitachi, and Intersil. It serves automotive, industrial, infrastructure, and IoT markets.
The ISL9305IRTHWCNLZ-T belongs to Renesas' mini-PMIC product line, engineered specifically for space- and power-constrained portable electronics powered by single Li-ion cells - emphasizing integration, I²C configurability, and thermal robustness.
FAQ
What are the factory-programmed output voltages for ISL9305IRTHWCNLZ-T?
The ISL9305IRTHWCNLZ-T is factory-configured with DCD1 = 1.2V, DCD2 = 1.8V, LDO1 = 3.3V, and LDO2 = 2.9V. These values are set by laser fuses and can be overridden via I²C registers (DCD1OUT/DCD2OUT at 0x00/0x01, LDO1OUT/LDO2OUT at 0x02/0x03) after enabling I²C control through the SYS_PARAMETER register bit 6.
Does ISL9305IRTHWCNLZ-T support forced PWM mode for noise-sensitive applications?
Yes, ISL9305IRTHWCNLZ-T supports forced PWM mode for both DCD1 and DCD2 via the DCD_PARAMETER register (bits B0/B1). When enabled, the converters maintain constant 3MHz switching regardless of load - eliminating audible switching noise and ensuring predictable EMI profiles in RF or audio subsystems.
How is the DCDPG pin configured and what delay options does ISL9305IRTHWCNLZ-T offer?
The DCDPG pin on ISL9305IRTHWCNLZ-T is an open-drain output indicating combined power-good status of DCD1 and DCD2. Its assertion delay is programmable via SYS_PARAMETER bits B5–B4 (DCDPOR[1:0]) to 1ms, 50ms, 150ms, or 200ms - allowing precise coordination with SoC reset sequencing or FPGA configuration timelines.
Can ISL9305IRTHWCNLZ-T operate with input voltages below 2.5V?
No - ISL9305IRTHWCNLZ-T requires VINDCD1 and VINDCD2 ≥2.5V per absolute maximum and recommended operating conditions. Below this threshold, the UVLO circuit disables the respective buck converter. VINLDO1/VINLDO2 may operate down to 1.5V, but only if supplied from a valid DCD output or auxiliary rail.
What thermal protection features does ISL9305IRTHWCNLZ-T include?
ISL9305IRTHWCNLZ-T incorporates thermal shutdown at +155°C (typical) with +30°C hysteresis. When junction temperature exceeds 155°C, all regulators disable; recovery begins automatically once die temperature falls to ~105°C. This protects against sustained overload or inadequate PCB copper area without requiring external thermal sensors.
ISL9305IRTHWCNLZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 16-WQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) (2), Linear (LDO) (2)
- Number of Outputs:
- 4
- Frequency - Switching:
- 3MHz
- Voltage/Current - Output 1:
- 1.2V, 1.5A
- Voltage/Current - Output 2:
- 1.8V, 1.5A
- Voltage/Current - Output 3:
- 3.3V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 1.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TQFN (4x4)
ISL9305IRTHWCNLZ-T FAQ
1.How can I place an order for ISL9305IRTHWCNLZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL9305IRTHWCNLZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL9305IRTHWCNLZ-T reliable?
The price and inventory of ISL9305IRTHWCNLZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL9305IRTHWCNLZ-T is usually 5 days.
3.What payment methods are accepted for ISL9305IRTHWCNLZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL9305IRTHWCNLZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL9305IRTHWCNLZ-T?
ISL9305IRTHWCNLZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL9305IRTHWCNLZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL9305IRTHWCNLZ-T?
For technical support, including ISL9305IRTHWCNLZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL9305IRTHWCNLZ-T requirements.
6.How does Aetrix verify that ISL9305IRTHWCNLZ-T is sourced from the original manufacturer or authorized distributors?
All ISL9305IRTHWCNLZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL9305IRTHWCNLZ-T meets industry standards.
7.What is the process for return or replacement of ISL9305IRTHWCNLZ-T?
All ISL9305IRTHWCNLZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL9305IRTHWCNLZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL9305IRTHWCNLZ-T part is unused and in its original packaging.
Return procedure for ISL9305IRTHWCNLZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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