Renesas ISL9305IRTHWCNYZ-T
- Part No.:
- ISL9305IRTHWCNYZ-T
- Manufacturer:
- Renesas
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 16-WQFN Exposed Pad
- Datasheet:
-
ISL9305IRTHWCNYZ-T.pdf
- Description:
- IC REG QUAD BUCK/LNR 3MHZ 16TQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL9305IRTHWCNYZ-T from Renesas (formerly Intersil) is a dual-buck + dual-LDO mini-PMIC for single-cell Li-ion/Li-polymer battery systems. It integrates two 3MHz, 1.5A synchronous step-down converters (DCD1 = 1.2V, DCD2 = 1.8V) and two I²C-programmable LDOs (LDO1 = 3.3V, LDO2 = 0.9V), delivering precise multi-rail power to mobile SoCs and DSP cores.
For engineers reviewing the ISL9305IRTHWCNYZ-T datasheet, ISL9305IRTHWCNYZ-T pinout, ISL9305IRTHWCNYZ-T application, or ISL9305IRTHWCNYZ-T equivalent, key selection criteria include factory-fixed output voltages, 400kb/s I²C interface with on-the-fly slew rate control, skip-mode efficiency optimization, and thermal shutdown at 155°C in a 4mm×4mm TQFN package.
Technical Context
The ISL9305IRTHWCNYZ-T implements peak-current-mode PWM control for both buck converters, enabling fast transient response and pulse-by-pulse current limiting. Its 3MHz switching frequency supports compact 1.5µH inductors and low-ESR ceramic capacitors while maintaining stable regulation across 2.5–5.5V input range.
I²C registers enable independent configuration of DCD1/DCD2 forced-PWM/skip mode, active discharge (115Ω bleeding resistor), phase alignment, and programmable DCDPG delay (1–200ms). LDO1/LDO2 support 50mV-step I²C reprogramming within 0.9–3.6V, with dropout as low as 80mV at 300mA for high-efficiency linear regulation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DCD1 Output Voltage | Factory fixed at 1.2V - eliminates external feedback resistors and ensures consistent core voltage for processor domains. |
| DCD2 Output Voltage | Factory fixed at 1.8V - supplies memory I/O or auxiliary logic rails without trimming components. |
| LDO1 Output Voltage | Factory fixed at 3.3V - powers analog interfaces, sensors, or communication peripherals requiring low-noise supply. |
| LDO2 Output Voltage | Factory fixed at 0.9V - delivers ultra-low-voltage bias for RF subsystems or always-on domains. |
| Switching Frequency | 3.0MHz ±0.4MHz - enables use of 1.5µH inductors and reduces output ripple without compromising light-load efficiency. |
| I²C Interface Speed | 400kb/s standard-mode - supports dynamic voltage scaling during runtime without bus contention or timing margin issues. |
| Thermal Shutdown Threshold | 155°C with 30°C hysteresis - protects die integrity during sustained high-power operation in thermally constrained handheld enclosures. |
Pinout & Package
ISL9305IRTHWCNYZ-T is housed in a 4mm × 4mm, 16-lead TQFN package with exposed thermal pad (Package Code: L16.4x4G). The E-pad must be soldered to PCB ground for optimal thermal performance and electrical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VINDCD1 (Pin 1) | Main input supply for DCD1 and internal circuitry | Accepts 2.5–5.5V; powers entire IC - must be decoupled with ≥10µF input capacitor near pin. |
| FB1 (Pin 2) | Feedback node for DCD1 | Internally connected to 1.2V reference - shorted to VODCD1 in fixed-output version; no external divider required. |
| SCLK (Pin 3) | I²C clock input | 400kb/s compatible; requires external pull-up to VDDIO (1.8–3.3V); synchronizes register writes/reads. |
| SDAT (Pin 4) | I²C data bidirectional line | Open-drain; shares pull-up with SCLK; supports read-modify-write operations for dynamic voltage control. |
| VINLDO1 (Pin 5) | Input for LDO1 | Accepts 1.5–5.5V; typically supplied by DCD1 or battery - enables independent LDO sequencing. |
| VOLDO1 (Pin 6) | LDO1 regulated output | Fixed 3.3V @ up to 300mA; low 45µVRMS noise ideal for ADC references or RF bias. |
| VOLDO2 (Pin 7) | LDO2 regulated output | Fixed 0.9V @ up to 300mA; optimized for low-dropout operation with <170mV dropout at full load. |
| VINLDO2 (Pin 8) | Input for LDO2 | Accepts 1.5–5.5V; may be tied to DCD2 (1.8V) to minimize dropout and maximize efficiency. |
| GNDLDO (Pin 9) | Power ground for both LDOs | Separate from buck grounds - prevents switching noise coupling into sensitive analog outputs. |
| DCDPG (Pin 10) | Open-drain power-good indicator | Asserts low if either DCD output deviates >±9% from nominal; delay programmable from 1–200ms via I²C. |
| FB2 (Pin 11) | Feedback node for DCD2 | Internally connected to 1.8V reference - shorted to VODCD2; eliminates external resistor network. |
| VINDCD2 (Pin 12) | Input supply for DCD2 | Accepts 2.5–5.5V; may share VINDCD1 rail or use independent source for isolation. |
| SW2 (Pin 13) | DCD2 switching node | Connects directly to inductor - requires tight layout with low-inductance path to minimize EMI and ringing. |
| GNDDCD2 (Pin 14) | Power ground for DCD2 | Dedicated ground return for high-frequency switching current - routed separately from analog grounds. |
| GNDDCD1 (Pin 15) | Power ground for DCD1 | Isolated ground path for DCD1 switching loop - minimizes crosstalk between dual buck channels. |
| SW1 (Pin 16) | DCD1 switching node | Connects to DCD1 inductor - critical high-di/dt node; must avoid routing near sensitive analog traces. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 1.5A 3MHz synchronous buck converters | Enables compact, high-efficiency DC/DC stages with minimal external components - reduces BOM count and board area vs discrete solutions. |
| I²C-programmable DCD/LDO output voltages | Allows runtime adjustment of all four outputs (25mV/step for bucks, 50mV/step for LDOs) - supports dynamic power management and firmware-based rail tuning. |
| Programmable DCDPG delay (1–200ms) | Prevents false power-good assertions during startup transients - ensures system controllers only release reset after stable regulation is confirmed. |
| Active output discharge (115Ω bleed resistor) | Forces rapid discharge of DCD outputs when disabled - prevents floating rails and ensures clean power sequencing in multi-rail systems. |
| Separate ground pins for DCD1, DCD2, and LDOs | Minimizes noise coupling between switching and linear regulators - preserves PSRR and output voltage accuracy in mixed-signal applications. |
Applications
| Smartphone Application Processor Core | Mobile Baseband Modem Power |
|---|---|
Use Scenario: Powers ARM Cortex-A series CPU cores requiring tightly regulated 1.2V supply with fast transient response during burst-mode execution. IC Role / Device Role / Timing Role: Primary core PMIC delivering DCD1 (1.2V/1.5A) with I²C-controlled slew rate to match DVFS commands from AP. Use Value: Factory-fixed 1.2V eliminates calibration overhead; 3MHz switching enables <10µs load-step recovery, reducing voltage droop during instruction fetch bursts. | Use Scenario: Supplies 1.8V I/O and 0.9V RF bias rails to LTE/5G baseband chipsets in space-constrained handset designs. IC Role / Device Role / Timing Role: Dual-rail LDO source (LDO1 = 3.3V for interface, LDO2 = 0.9V for RF synth) with independent enable control. Use Value: 0.9V LDO2 provides ultra-low-noise bias with 45µVRMS noise - improves EVM and adjacent channel leakage ratio in cellular transceivers. |
| Portable Medical Sensor Hub | Wearable DSP Audio Subsystem |
Use Scenario: Powers ultra-low-power MCU and analog front-end (AFE) in battery-operated glucose monitors or ECG patches. IC Role / Device Role / Timing Role: Single-chip solution generating 1.2V (MCU core), 1.8V (sensor interface), 3.3V (BLE radio), and 0.9V (precision ADC reference). Use Value: 50µA quiescent current in skip mode extends battery life beyond 7 days on coin cell; separate LDO grounds prevent digital noise from corrupting µV-level biosignals. | Use Scenario: Supplies multi-voltage rails to audio DSP, MEMS microphones, and Class-D amplifier in hearables. IC Role / Device Role / Timing Role: DCD2 (1.8V) powers DSP I/O; LDO1 (3.3V) drives amplifier; LDO2 (0.9V) biases microphone bias circuit. Use Value: Programmable DCDPG delay (150ms) ensures audio codec initialization completes before playback starts - eliminates pop/click artifacts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023BRSBR | Triple 1.5A buck + triple LDO; 2.25–6V input; no I²C - uses hardware pin strapping for voltage selection. | Fixed-function configuration only; lacks dynamic voltage scaling and programmable power-good timing. | Select when deterministic, pin-strapped operation is preferred over firmware-controlled flexibility. |
| MAX8649ETE+ | Dual 1.2A buck + dual LDO; 2.5–5.5V input; I²C interface; but fixed 1.2V/1.8V bucks and no LDO voltage programmability. | LDO outputs are not I²C-adjustable - limits adaptability to varying peripheral voltage requirements. | Select when LDO voltage stability is prioritized over programmability and cost sensitivity dominates design. |
Compared with TPS65023BRSBR and MAX8649ETE+, the ISL9305IRTHWCNYZ-T uniquely combines factory-set precision (1.2V/1.8V/3.3V/0.9V), full I²C control of all outputs, and programmable DCDPG timing - making it optimal for firmware-driven power architectures where rail agility and sequencing control are critical.
Availability
ISL9305IRTHWCNYZ-T is available at Aetrix Electronics and suitable for smartphone application processors, portable medical sensor hubs, wearable DSP audio subsystems, and other space-constrained, battery-powered electronics requiring stable component supply and long-term lifecycle support.
Supply support for ISL9305IRTHWCNYZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded design innovation through high-performance analog, power, and microcontroller solutions.
The ISL9305H product line was designed specifically for ultra-compact, multi-rail power management in single-cell Li-ion mobile devices - emphasizing integration density, I²C configurability, and thermal robustness in 4mm×4mm packages.
FAQ
What are the factory-programmed output voltages of the ISL9305IRTHWCNYZ-T?
The ISL9305IRTHWCNYZ-T has four factory-fixed output voltages: DCD1 = 1.2V, DCD2 = 1.8V, LDO1 = 3.3V, and LDO2 = 0.9V. These values are laser-trimmed during manufacturing and cannot be altered by external resistors. However, all four outputs remain fully programmable via the 400kb/s I²C interface across their respective ranges (0.825–3.6V for bucks, 0.9–3.6V for LDOs) using 25mV or 50mV steps.
Does the ISL9305IRTHWCNYZ-T support forced PWM mode for its buck converters?
Yes, the ISL9305IRTHWCNYZ-T supports forced PWM mode for both DCD1 and DCD2 via I²C register control (DCD_PARAMETER register, Bits B0/B1). This disables automatic skip-mode entry under light load, ensuring constant 3MHz switching frequency - essential for noise-sensitive applications like audio or RF circuits where variable-frequency PFM operation could cause interference.
How is power-good monitoring implemented on the ISL9305IRTHWCNYZ-T?
The ISL9305IRTHWCNYZ-T uses the open-drain DCDPG pin (Pin 10) to indicate combined power-good status of DCD1 and DCD2. When both outputs are within ±9% of their nominal voltages, DCDPG releases to be pulled high after a user-programmable delay (1–200ms via SYS_PARAMETER register). If either output falls outside this window, DCDPG pulls low. The delay prevents false assertions during startup transients.
Can the ISL9305IRTHWCNYZ-T's LDO outputs be used independently of the buck converters?
Yes, the ISL9305IRTHWCNYZ-T allows independent enable/disable control of each regulator via I²C (SYS_PARAMETER register, Bits B0–B3). LDO1 and LDO2 can be powered from battery (VINLDO1/VINLDO2 = 1.5–5.5V) or from either DCD output - enabling flexible power sequencing, such as enabling LDO2 (0.9V) before DCD2 (1.8V) for RF subsystem initialization, without affecting other rails.
What thermal protection features does the ISL9305IRTHWCNYZ-T include?
The ISL9305IRTHWCNYZ-T incorporates thermal shutdown at +155°C with +30°C hysteresis. When junction temperature reaches 155°C, all regulators disable and the device enters thermal shutdown. Operation resumes only after die temperature drops to ~125°C, beginning with soft-start to prevent inrush current. This protects against sustained overload or poor PCB thermal design while maintaining reliability in sealed handheld enclosures.
ISL9305IRTHWCNYZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 16-WQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) (2), Linear (LDO) (2)
- Number of Outputs:
- 4
- Frequency - Switching:
- 3MHz
- Voltage/Current - Output 1:
- 1.2V, 1.5A
- Voltage/Current - Output 2:
- 1.8V, 1.5A
- Voltage/Current - Output 3:
- 3.3V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 1.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TQFN (4x4)
ISL9305IRTHWCNYZ-T FAQ
1.How can I place an order for ISL9305IRTHWCNYZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL9305IRTHWCNYZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL9305IRTHWCNYZ-T reliable?
The price and inventory of ISL9305IRTHWCNYZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL9305IRTHWCNYZ-T is usually 5 days.
3.What payment methods are accepted for ISL9305IRTHWCNYZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL9305IRTHWCNYZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL9305IRTHWCNYZ-T?
ISL9305IRTHWCNYZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL9305IRTHWCNYZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL9305IRTHWCNYZ-T?
For technical support, including ISL9305IRTHWCNYZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL9305IRTHWCNYZ-T requirements.
6.How does Aetrix verify that ISL9305IRTHWCNYZ-T is sourced from the original manufacturer or authorized distributors?
All ISL9305IRTHWCNYZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL9305IRTHWCNYZ-T meets industry standards.
7.What is the process for return or replacement of ISL9305IRTHWCNYZ-T?
All ISL9305IRTHWCNYZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL9305IRTHWCNYZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL9305IRTHWCNYZ-T part is unused and in its original packaging.
Return procedure for ISL9305IRTHWCNYZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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