Renesas ISL9307IRTAAJYZ-T7A
- Part No.:
- ISL9307IRTAAJYZ-T7A
- Manufacturer:
- Renesas
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 16-WQFN Exposed Pad
- Datasheet:
-
ISL9307IRTAAJYZ-T7A.pdf
- Description:
- IC REG QUAD BUCK/LNR SYNC 16TQFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,063
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL9307IRTAAJYZ-T7A from Renesas (formerly Intersil) is a dual-buck + dual-LDO mini-PMIC for single-cell Li-ion/Li-polymer battery-powered microprocessor systems. It integrates two 1500mA, 3MHz synchronous step-down converters (DCD1/DCD2) and two fixed-output LDOs (2.8V and 0.9V), delivering high-efficiency power sequencing in a 4mm×4mm TQFN-16 package for smartphone baseband and application processor rails.
For engineers reviewing the ISL9307IRTAAJYZ-T7A datasheet, ISL9307IRTAAJYZ-T7A pinout, ISL9307IRTAAJYZ-T7A application, or ISL9307IRTAAJYZ-T7A equivalent, key selection criteria include its 2.5–5.5V buck input range, factory-set 2.8V/0.9V LDO outputs, 3MHz switching frequency enabling compact 1.5µH inductors, skip-mode operation for light-load efficiency, and independent enable pins for precise power-up sequencing.
Technical Context
The ISL9307IRTAAJYZ-T7A implements peak-current-mode PWM control for both buck converters, supporting fast transient response and pulse-by-pulse current limiting up to 1500mA per channel. Its 3MHz switching frequency enables use of small 1.5µH inductors and low-ESR ceramic capacitors while maintaining stable regulation across 2.5–5.5V input.
Each LDO operates from 1.5–5.5V input with 125mV typical dropout at 300mA (for VO ≤ 2.1V), and features internal 2.8V and 0.9V fixed outputs-matching the ordering code JYZ. Independent EN pins allow staggered startup, and active output discharge (115Ω internal bleeding resistor) ensures controlled shutdown of buck outputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Input Range | 2.5V to 5.5V - supports full Li-ion battery voltage range (3.0–4.2V nominal, 2.8–4.35V operational) |
| LDO Output Voltages | 2.8V and 0.9V (factory-fixed) - targets application processor I/O and core logic rails respectively |
| Switching Frequency | 3.0MHz (2.6–3.4MHz) - enables ultra-compact 1.5µH inductors and <10µF output capacitance per rail |
| Buck Output Current | 1500mA per channel - sufficient for ARM Cortex-A series application processors and modems |
| LDO Output Current | 300mA per channel - suitable for low-power peripherals, sensors, or memory I/O |
| Quiescent Current | 50µA typ. (both bucks enabled, no load) - extends battery life during system sleep states |
| Package | 4mm × 4mm, 16-lead TQFN - thermally enhanced with exposed E-pad for PCB heat sinking |
Pinout & Package
ISL9307IRTAAJYZ-T7A uses a 4mm × 4mm, 16-lead Thin Quad Flat No-lead (TQFN) package with exposed thermal pad (JEDEC MO220K, drawing L16.4X4G). The E-pad must be soldered to a solid ground plane with ≥9 thermal vias for reliable thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VINDCD1 (Pin 1) | Buck DCD1 input supply | Primary power source for first buck converter and internal digital/analog circuitry |
| FB1 (Pin 2) | DCD1 feedback node | Connected directly to 2.8V output (fixed version); sets regulation point via internal 0.8V reference |
| ENDCD1 (Pin 3) | DCD1 enable control | Active-high logic; allows independent startup timing for power sequencing |
| ENLDO1 (Pin 4) | LDO1 enable control | Active-high logic; enables 2.8V LDO independently of buck regulators |
| VINLDO (Pin 5) | LDO input supply | Accepts 1.5–5.5V; may be powered from battery or DCD1/DCD2 output |
| VOLDO1 (Pin 6) | LDO1 output | Fixed 2.8V output; supplies I/O voltage for application processors or peripherals |
| VOLDO2 (Pin 7) | LDO2 output | Fixed 0.9V output; targets low-voltage core logic or memory interface rails |
| ENLDO2 (Pin 8) | LDO2 enable control | Active-high logic; enables 0.9V LDO with independent timing |
| GNDLDO (Pin 9) | LDO power ground | Dedicated ground return for both LDOs to minimize noise coupling into analog circuits |
| ENDCD2 (Pin 10) | DCD2 enable control | Active-high logic; enables second buck for separate voltage domain (e.g., RF or camera) |
| FB2 (Pin 11) | DCD2 feedback node | Connected directly to output (fixed version); regulated to 0.8V internal reference |
| VINDCD2 (Pin 12) | Buck DCD2 input supply | May share VINDCD1 or use separate input path for isolation |
| SW2 (Pin 13) | DCD2 switching node | Connects to inductor; high di/dt node requiring short, wide trace routing |
| GNDDCD2 (Pin 14) | DCD2 power ground | Dedicated ground return for DCD2 power loop to reduce EMI and improve stability |
| GNDDCD1 (Pin 15) | DCD1 power ground | Dedicated ground return for DCD1 power loop; separate from GNDLDO for PSRR optimization |
| SW1 (Pin 16) | DCD1 switching node | Connects to inductor; requires tight layout with CIN, L, and GNDDCD1 to minimize ringing |
Key Features
| Feature | Design Value |
|---|---|
| 3MHz synchronous buck conversion | Enables use of 1.5µH inductors and sub-10µF ceramic output caps, reducing solution size by >40% vs. 1MHz designs |
| Independent enable pins per regulator | Supports programmable power-up sequencing (e.g., LDO1 before DCD1) without external timing components |
| Active output discharge (115Ω) | Drains buck output capacitors within milliseconds after disable, preventing floating voltages and ensuring safe reset |
| Peak-current-mode PWM control | Delivers <10µs transient response to 150→1500mA load steps, critical for burst-mode processor operation |
| Thermal shutdown with 30°C hysteresis | Protects against sustained overload or poor PCB heatsinking; resumes operation only after die cools to ~130°C |
Applications
| Smartphone Application Processor Core | Mobile Baseband Power Management |
|---|---|
Use Scenario: Powers ARM Cortex-A series CPU cores requiring tightly regulated 0.9V at up to 1.5A with fast dynamic voltage scaling. IC Role / Device Role / Timing Role: ISL9307IRTAAJYZ-T7A delivers the 0.9V core rail via DCD2 and provides 2.8V I/O via LDO1, with EN sequencing ensuring core powers before I/O. Use Value: 3MHz switching minimizes output ripple (<15mV p-p) during DVFS transitions, preventing timing violations in high-speed cores. | Use Scenario: Supplies multiple voltage domains (2.8V I/O, 0.9V core, 1.8V memory) to LTE/WCDMA baseband ICs in compact handset layouts. IC Role / Device Role / Timing Role: ISL9307IRTAAJYZ-T7A integrates all required rails in one 4mm² package, with independent EN pins enabling compliant 3GPP power-up timing. Use Value: Fixed 2.8V/0.9V outputs eliminate external feedback resistors, reducing BOM count and layout area by 30% vs. adjustable solutions. |
| Wearable System-on-Chip Supply | Portable Medical Sensor Hub |
Use Scenario: Powers ultra-low-power SoCs (e.g., Nordic nRF52, TI CC2650) with intermittent 1500mA peak loads and extended sleep periods. IC Role / Device Role / Timing Role: ISL9307IRTAAJYZ-T7A's 50µA quiescent current in skip mode and active discharge extend coin-cell or small Li-po runtime by >25%. Use Value: Skip-mode operation reduces light-load losses by 40% vs. forced-PWM, preserving battery capacity during sensor idle cycles. | Use Scenario: Delivers clean, low-noise 2.8V and 0.9V rails to precision analog front-ends (ADCs, amplifiers) and digital controllers in handheld diagnostics devices. IC Role / Device Role / Timing Role: ISL9307IRTAAJYZ-T7A isolates LDO and buck grounds (GNDLDO vs. GNDDCD1/2) to achieve >55dB PSRR at 1kHz, suppressing switching noise from affecting analog measurements. Use Value: 45µVRMS LDO output noise ensures <12-bit ENOB in 16-bit ADC applications without additional filtering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-buck + dual-LDO PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023BRSBT | 3 buck + 2 LDO, 2.25–6.5V input, 1.8V/1.2V/1.5V LDO outputs, 2.25MHz switching | Higher input range and third buck channel; lacks 0.9V LDO; larger 5mm×5mm QFN | Choose for multi-rail systems needing >2 buck outputs or wider VIN; not drop-in due to pinout and LDO voltage mismatch |
| RT8059ZSP | Dual 1.5A buck + dual 300mA LDO, 2.5–5.5V input, 3MHz switching, but LDOs are adjustable (not fixed) | Requires external FB resistors for LDOs; same footprint but different pin functions (e.g., no dedicated VOLDO pins) | Choose when LDO voltages must be customized; requires layout revision and resistor BOM addition vs. ISL9307IRTAAJYZ-T7A's fixed outputs |
Compared with TPS65023BRSBT and RT8059ZSP, the ISL9307IRTAAJYZ-T7A offers factory-programmed 2.8V/0.9V LDOs in a smaller 4mm² package with optimized pinout for smartphone sequencing, eliminating resistor networks and simplifying layout-ideal where space and BOM count are constrained.
Availability
ISL9307IRTAAJYZ-T7A is available at Aetrix Electronics and suitable for smartphone power management, wearable SoC supply, portable medical sensor hubs, and other battery-powered embedded systems requiring stable component supply with long lifecycle support.
Supply support for ISL9307IRTAAJYZ-T7A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics (acquired Intersil in 2017) is a global leader in high-performance analog and mixed-signal semiconductors, specializing in power management, interface, and embedded processing solutions.
The ISL9307IRTAAJYZ-T7A belongs to Renesas' mini-PMIC product line, designed specifically for space-constrained, battery-operated mobile devices requiring integrated, sequenced multi-rail power with minimal external components.
FAQ
What are the fixed output voltages of the LDOs on the ISL9307IRTAAJYZ-T7A?
The ISL9307IRTAAJYZ-T7A features factory-set LDO outputs of 2.8V on VOLDO1 (Pin 6) and 0.9V on VOLDO2 (Pin 7), as indicated by the "JYZ" suffix in the part number. These are non-adjustable; no external feedback resistors are required or supported for these outputs. Both LDOs maintain ±3% accuracy over load, line, and temperature.
Does the ISL9307IRTAAJYZ-T7A support power sequencing between its regulators?
Yes, the ISL9307IRTAAJYZ-T7A supports precise power sequencing via four independent enable pins: ENDCD1, ENDCD2, ENLDO1, and ENLDO2 (Pins 3, 10, 4, and 8). Each is active-high with 1.4V logic threshold, allowing external GPIO or supervisor ICs to control startup order-for example, enabling LDO1 (2.8V) before DCD2 (0.9V) to meet processor I/O-first requirements.
What is the recommended inductor value for the buck converters in the ISL9307IRTAAJYZ-T7A?
The ISL9307IRTAAJYZ-T7A is characterized and optimized for 1.5µH shielded power inductors (e.g., Sumida CDRH2D14NP-1R5), rated for ≥1.8A saturation current and ≤50mΩ DCR. This value balances size, efficiency (>90% at 500mA), and transient response. Using inductors outside 1.2–1.8µH may degrade skip-mode stability or increase output ripple beyond spec.
How does the ISL9307IRTAAJYZ-T7A handle thermal overload conditions?
The ISL9307IRTAAJYZ-T7A incorporates thermal shutdown with a 155°C trip threshold and 30°C hysteresis. When junction temperature exceeds 155°C, all regulators disable immediately. Operation resumes only after die temperature falls to ~130°C, initiating soft-start to prevent inrush. The 4mm×4mm TQFN package requires proper E-pad soldering to a thermal plane with ≥9 vias for effective heat dissipation.
Can the buck converters on the ISL9307IRTAAJYZ-T7A operate in forced PWM mode?
No, the ISL9307IRTAAJYZ-T7A buck converters (DCD1/DCD2) do not support forced PWM mode; they operate exclusively in automatic PWM/pulse-skipping mode. Under light load, they enter skip mode to reduce switching loss and quiescent current (to 50µA typ.), improving battery life. There is no pin or register to force continuous PWM-this is a fixed architecture feature per the FN7931 datasheet.
ISL9307IRTAAJYZ-T7A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 16-WQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
- Number of Outputs:
- 4
- Frequency - Switching:
- 3MHz
- Voltage/Current - Output 1:
- 0.8V ~ 5.5V, 1.5A
- Voltage/Current - Output 2:
- 0.8V ~ 5.5V, 1.5A
- Voltage/Current - Output 3:
- 2.8V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 1.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TQFN (4x4)
ISL9307IRTAAJYZ-T7A FAQ
1.How can I place an order for ISL9307IRTAAJYZ-T7A through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL9307IRTAAJYZ-T7A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL9307IRTAAJYZ-T7A reliable?
The price and inventory of ISL9307IRTAAJYZ-T7A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL9307IRTAAJYZ-T7A is usually 5 days.
3.What payment methods are accepted for ISL9307IRTAAJYZ-T7A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL9307IRTAAJYZ-T7A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL9307IRTAAJYZ-T7A?
ISL9307IRTAAJYZ-T7A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL9307IRTAAJYZ-T7A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL9307IRTAAJYZ-T7A?
For technical support, including ISL9307IRTAAJYZ-T7A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL9307IRTAAJYZ-T7A requirements.
6.How does Aetrix verify that ISL9307IRTAAJYZ-T7A is sourced from the original manufacturer or authorized distributors?
All ISL9307IRTAAJYZ-T7A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL9307IRTAAJYZ-T7A meets industry standards.
7.What is the process for return or replacement of ISL9307IRTAAJYZ-T7A?
All ISL9307IRTAAJYZ-T7A units undergo pre-shipment inspection (PSI). If there is an issue with ISL9307IRTAAJYZ-T7A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL9307IRTAAJYZ-T7A part is unused and in its original packaging.
Return procedure for ISL9307IRTAAJYZ-T7A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL9307IRTAAJYZ-T7A Tags

-
TPS6521905RHBR
Texas Instruments

-
MIC3385YHL-TR
Microchip Technology

-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments

-
A4402KLPTR-T
Allegro MicroSystems

-
BD71847AMWV-E2
ROHM Semiconductor

-
ADP5040ACPZ-1-R7
Analog Devices Inc.

-
LT3048IDC#TRPBF
Analog Devices Inc.

-
ADP5037ACPZ-R7
Analog Devices Inc.

-
XRP7714ILB-F
MaxLinear, Inc.

-
LTC3260EDE#TRPBF
Analog Devices Inc.

-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

