Renesas ISL9307IRTAANCZ-T
- Part No.:
- ISL9307IRTAANCZ-T
- Manufacturer:
- Renesas
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 16-WQFN Exposed Pad
- Datasheet:
-
ISL9307IRTAANCZ-T.pdf
- Description:
- IC REG QUAD BUCK/LNR SYNC 16TQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL9307IRTAANCZ-T from Renesas (formerly Intersil) is a dual-buck + dual-LDO mini-PMIC for battery-powered microprocessor power rails, integrating two 1500mA/3MHz synchronous step-down converters (DCD1/DCD2) and two 300mA low-input LDOs (LDO1/LDO2), with factory-fixed 3.3V and 1.8V outputs, operating from 2.5–5.5V input and supporting Li-ion/Li-polymer battery systems in smartphones and portable instruments.
For engineers reviewing the ISL9307IRTAANCZ-T datasheet, ISL9307IRTAANCZ-T pinout, ISL9307IRTAANCZ-T application, or ISL9307IRTAANCZ-T equivalent, key selection criteria include fixed-output LDO voltages (3.3V/1.8V), 3MHz switching frequency enabling compact 1.5µH inductors, skip-mode efficiency optimization, independent enable pins per channel, and thermal shutdown at 155°C with 30°C hysteresis.
Technical Context
The ISL9307IRTAANCZ-T implements peak-current-mode PWM control for both buck converters, delivering fast transient response and pulse-by-pulse current limiting up to 1500mA per channel. Its 3MHz switching frequency reduces external passive size while maintaining stable regulation across 2.5–5.5V input range.
Each LDO accepts 1.5–5.5V input and delivers fixed 3.3V (LDO1) and 1.8V (LDO2) outputs with ≤250mV dropout at 300mA load; all four channels feature dedicated EN pins for precise power sequencing, and internal bleeding resistors (115Ω typical) actively discharge outputs during disable.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DCD Output Current | 1500mA per buck channel - supports core logic and memory rails in mobile SoCs |
| LDO Output Current | 300mA per LDO - sufficient for I/O, analog, or peripheral voltage domains |
| Switching Frequency | 3.0MHz ±0.4MHz - enables use of 1.5µH inductors and sub-10µF ceramic output caps |
| LDO Output Voltages | Fixed 3.3V (LDO1) and 1.8V (LDO2) - factory-set, no external feedback required |
| Quiescent Current | 50µA typ (both DCDs enabled, no load) - extends battery runtime in standby |
| Thermal Shutdown | 155°C threshold with 30°C hysteresis - protects die during sustained overload or poor PCB thermal design |
| UVLO Thresholds | VINDCD1: 2.2V (rising), VINLDO: 1.41V (rising) - prevents erratic operation during battery sag |
Pinout & Package
ISL9307IRTAANCZ-T uses a 4mm × 4mm, 16-lead TQFN package (JEDEC MO220K, pkg drawing L16.4X4G) with exposed thermal pad requiring nine vias for optimal heat dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VINDCD1 | Buck converter DCD1 input supply | Primary power source for DCD1 and internal digital/analog circuits; 2.5–5.5V range |
| 2 FB1 | DCD1 feedback node | Connected directly to DCD1 output (fixed version); not used for external resistor divider |
| 3 ENDCD1 | DCD1 enable control | Active-high logic (≥1.4V); ties high/low only - floating prohibited |
| 4 ENLDO1 | LDO1 enable control | Active-high logic (≥1.4V); controls 3.3V output startup timing |
| 5 VINLDO | LDO input supply | Shared input for both LDOs; 1.5–5.5V, must be ≤ VINDCD1 |
| 6 VOLDO1 | LDO1 output | Fixed 3.3V output; delivers up to 300mA with ≤250mV dropout at full load |
| 7 VOLDO2 | LDO2 output | Fixed 1.8V output; delivers up to 300mA with ≤200mV dropout at full load |
| 8 ENLDO2 | LDO2 enable control | Active-high logic (≥1.4V); enables/disables 1.8V rail independently |
| 9 GNDLDO | LDO power ground | Dedicated ground return for LDO1/LDO2; separate from buck grounds |
| 10 ENDCD2 | DCD2 enable control | Active-high logic (≥1.4V); allows staggered startup vs. DCD1 |
| 11 FB2 | DCD2 feedback node | Connected directly to DCD2 output (fixed version); no external divider needed |
| 12 VINDCD2 | Buck converter DCD2 input supply | Input for second buck channel; operates from 2.3V to VINDCD1 |
| 13 SW2 | DCD2 switching node | Connects to inductor terminal; high di/dt node requiring short, wide trace routing |
| 14 GNDDCD2 | DCD2 power ground | Dedicated ground return for DCD2; isolated from DCD1 and LDO grounds |
| 15 GNDDCD1 | DCD1 power ground | Dedicated ground return for DCD1; minimizes noise coupling between converters |
| 16 SW1 | DCD1 switching node | Connects to inductor terminal; routed separately from SW2 to avoid crosstalk |
| E-pad | Exposed thermal pad | Must be soldered to solid ground plane with ≥9 thermal vias for thermal management |
Key Features
| Feature | Design Value |
|---|---|
| Integrated dual-buck + dual-LDO architecture | Reduces BOM count by consolidating four independent regulators into one 4×4mm IC |
| 3MHz PWM switching frequency | Enables 1.5µH inductors and <10µF ceramic output capacitors - cuts solution footprint by ~40% vs. 1MHz designs |
| Independent enable pins per channel | Supports flexible power sequencing (e.g., LDO1 before DCD1) without external logic |
| Active output discharge via internal bleeding resistor | 115Ω typical resistor discharges DCD outputs rapidly on disable - prevents hold-up or latch-up in downstream circuitry |
| Low-dropout LDO operation | 125mV dropout at 300mA for 1.8V output - maximizes usable battery voltage range |
Applications
| Smartphone Application Processor Core | Portable Media Player Audio Codec |
|---|---|
Use Scenario: Powering ARM Cortex-A series CPU cores requiring tightly regulated 1.2–1.4V at up to 1500mA with fast transient response. IC Role / Device Role / Timing Role: DCD1 supplies core voltage; DCD2 supplies GPU/memory I/O; LDO1 (3.3V) powers PMIC interface; LDO2 (1.8V) supplies DDR termination. Use Value: 3MHz switching and peak-current-mode control deliver <10mV undershoot during 150→1500mA load steps - maintains processor stability during burst activity. |
Use Scenario: Delivering clean, low-noise bias to stereo DAC/ADC and headphone amplifier stages in battery-powered audio players. IC Role / Device Role / Timing Role: LDO2 (1.8V) powers analog signal chain; DCD2 (adjustable) supplies 3.3V for digital logic; LDO1 (3.3V) powers USB PHY. Use Value: 45µVRMS output noise and 55dB PSRR at 1kHz ensure <110dB SNR in audio path - eliminates switching artifacts in playback. |
| Li-ion-Powered Industrial Handheld Scanner | Ultra-Compact Wearable Sensor Hub |
Use Scenario: Sustaining multi-rail operation (CPU, image sensor, Bluetooth radio) across 3.0–4.2V Li-ion discharge curve. IC Role / Device Role / Timing Role: DCD1 powers 1.2V SoC core; DCD2 powers 3.3V imaging subsystem; LDO1 (3.3V) powers flash memory; LDO2 (1.8V) powers sensor interface. Use Value: Skip-mode operation achieves >85% efficiency at 10mA load - extends battery life from 8 to >14 hours in intermittent-scan mode. |
Use Scenario: Enabling always-on motion sensing and BLE connectivity in space-constrained wrist-worn devices with single-cell Li-polymer battery. IC Role / Device Role / Timing Role: LDO2 (1.8V) powers MEMS accelerometer; DCD1 supplies 2.8V to BLE SoC; LDO1 (3.3V) powers display driver; DCD2 unused or disabled. Use Value: 50µA quiescent current with both DCDs enabled and LDOs off - reduces standby power to <100µW, enabling >30-day shelf life. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-buck + dual-LDO power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023BRSBT | 3.3V/1.8V fixed LDOs; 1200mA DCDs; 2.25MHz switching; 20-pin QFN | Lower DCD current rating; lacks active output discharge; wider package (4×4.5mm) | Choose when lower cost and TI ecosystem support outweigh need for 1500mA DCDs or 3MHz frequency. |
| MAX8646ETE+ | Adjustable DCD outputs; 1500mA DCDs; 2.25MHz; 3.3V/1.8V LDOs; 24-pin TQFN | Requires external feedback resistors for DCDs; larger footprint (5×5mm); no skip mode | Prefer when adjustable DCD voltages are required and board area permits larger package. |
Compared with TPS65023BRSBT and MAX8646ETE+, the ISL9307IRTAANCZ-T delivers higher DCD current (1500mA), faster switching (3MHz), integrated skip mode, and active output discharge - making it optimal for space-constrained, battery-sensitive designs needing robust transient response and minimal external components.
Availability
ISL9307IRTAANCZ-T is available at Aetrix Electronics and suitable for smartphone power management, portable medical instrument rails, and industrial handheld scanner designs requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for ISL9307IRTAANCZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics (acquired Intersil in 2017) is a global leader in high-performance analog and power management semiconductors, serving automotive, industrial, and consumer markets with ISO9001-certified manufacturing.
The ISL9307IRTAANCZ-T belongs to Renesas' mini-PMIC family designed specifically for ultra-compact, multi-rail battery-powered systems - emphasizing integration density, light-load efficiency, and seamless power sequencing in mobile and portable electronics.
FAQ
What are the fixed output voltages of the LDOs in ISL9307IRTAANCZ-T?
The ISL9307IRTAANCZ-T features factory-programmed fixed LDO outputs: LDO1 delivers 3.3V and LDO2 delivers 1.8V. These values are confirmed in the Ordering Information table (Page 4 of FN7931 Rev 3.00) and do not require external feedback resistors - simplifying layout and reducing component count compared to adjustable versions.
Does ISL9307IRTAANCZ-T support power sequencing between its four output rails?
Yes, ISL9307IRTAANCZ-T supports precise power sequencing via four independent enable pins: ENDCD1, ENDCD2, ENLDO1, and ENLDO2. Each is active-high (≥1.4V logic high) and can be controlled separately using GPIOs or RC delays - enabling custom startup order such as powering LDO2 (1.8V) before DCD1 (core rail) to meet SoC requirements.
What is the maximum input voltage for the DCD converters in ISL9307IRTAANCZ-T?
The DCD1 and DCD2 inputs (VINDCD1 and VINDCD2) of ISL9307IRTAANCZ-T accept 2.5V to 5.5V, as specified in the Absolute Maximum Ratings and Recommended Operating Conditions (Page 5). VINDCD2 has an additional constraint: it must be ≤ VINDCD1 and ≥2.3V, ensuring proper operation when powered from split battery rails or intermediate supplies.
How does ISL9307IRTAANCZ-T manage efficiency at light loads?
The ISL9307IRTAANCZ-T enters pulse-skipping mode under light loads, reducing switching frequency to minimize gate drive and switching losses. This behavior is confirmed in the Theory of Operation section (Page 7), where the device monitors zero-crossing for 16 consecutive cycles before entering skip mode - achieving 50µA typical quiescent current with both DCDs enabled and no load.
Is thermal management critical for ISL9307IRTAANCZ-T, and what is required?
Yes, thermal management is critical: ISL9307IRTAANCZ-T has a 155°C thermal shutdown threshold (Page 5) and 40.2°C/W θJA in its 4×4mm TQFN package (Page 5). The exposed E-pad must be soldered to a solid ground plane with at least nine thermal vias (Page 8, Figure 4) to maintain junction temperature within the recommended –40°C to +125°C range during 1500mA continuous operation.
ISL9307IRTAANCZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 16-WQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
- Number of Outputs:
- 4
- Frequency - Switching:
- 3MHz
- Voltage/Current - Output 1:
- 0.8V ~ 5.5V, 1.5A
- Voltage/Current - Output 2:
- 0.8V ~ 5.5V, 1.5A
- Voltage/Current - Output 3:
- 3.3V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 1.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TQFN (4x4)
ISL9307IRTAANCZ-T FAQ
1.How can I place an order for ISL9307IRTAANCZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL9307IRTAANCZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL9307IRTAANCZ-T reliable?
The price and inventory of ISL9307IRTAANCZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL9307IRTAANCZ-T is usually 5 days.
3.What payment methods are accepted for ISL9307IRTAANCZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL9307IRTAANCZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL9307IRTAANCZ-T?
ISL9307IRTAANCZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL9307IRTAANCZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL9307IRTAANCZ-T?
For technical support, including ISL9307IRTAANCZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL9307IRTAANCZ-T requirements.
6.How does Aetrix verify that ISL9307IRTAANCZ-T is sourced from the original manufacturer or authorized distributors?
All ISL9307IRTAANCZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL9307IRTAANCZ-T meets industry standards.
7.What is the process for return or replacement of ISL9307IRTAANCZ-T?
All ISL9307IRTAANCZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL9307IRTAANCZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL9307IRTAANCZ-T part is unused and in its original packaging.
Return procedure for ISL9307IRTAANCZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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