Renesas ISL9307IRTWCWNZ-T
- Part No.:
- ISL9307IRTWCWNZ-T
- Manufacturer:
- Renesas
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 16-WQFN Exposed Pad
- Datasheet:
-
ISL9307IRTWCWNZ-T.pdf
- Description:
- IC REG QUAD BUCK/LNR SYNC 16TQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL9307IRTWCWNZ-T from Renesas Electronics (formerly Intersil) is a dual-buck + dual-LDO mini-PMIC for single-cell Li-ion/Li-polymer battery-powered systems. It integrates two 1500mA, 3MHz synchronous step-down converters (DCD1/DCD2) and two 300mA low-input LDOs (LDO1/LDO2), with factory-set fixed outputs of 1.2V (DCD1), 1.8V (DCD2), 1.2V (LDO1), and 3.3V (LDO2), supporting DSP core and I/O rail power in smartphones.
For engineers reviewing the ISL9307IRTWCWNZ-T datasheet, ISL9307IRTWCWNZ-T pinout, ISL9307IRTWCWNZ-T application, or ISL9307IRTWCWNZ-T equivalent, key selection criteria include verified 1.2V/1.8V buck output accuracy (±3%), 1.2V/3.3V LDO dropout (≤250mV @ 300mA), 4mm×4mm TQFN-16 thermal performance (θJA = 40.2°C/W), and independent enable control per channel for precise power sequencing.
Technical Context
The ISL9307IRTWCWNZ-T implements peak-current-mode PWM control for both DCD1 and DCD2, enabling fast transient response and pulse-by-pulse current limiting up to 1500mA. Its 3MHz switching frequency supports compact 1.5µH inductors and low-ESR ceramic capacitors, while skip mode operation under light load reduces quiescent current to 50µA (typ) for DCD1/DCD2 combined.
LDO1 and LDO2 operate from 1.5V–5.5V input and deliver fixed 1.2V and 3.3V outputs with 45µVRMS output noise (10Hz–100kHz) and 55dB PSRR at 1kHz. Each regulator features independent EN pins, internal 350–540mA peak current limit, and thermal shutdown at 155°C with 30°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DCD Output Current | 1500mA per buck channel - supports high-current DSP/core rails without external boost |
| LDO Output Current | 300mA per LDO - sufficient for memory I/O, sensors, or auxiliary logic supplies |
| Switching Frequency | 3.0MHz (2.6–3.4MHz range) - enables use of 1.5µH inductors and minimizes board area |
| Quiescent Current | 50µA (typ) with both bucks in skip mode - extends battery runtime in standby states |
| Output Voltage Accuracy | ±3% over -40°C to +85°C - ensures stable core voltage under temperature and load variation |
| Dropout Voltage | 125mV (max) @ 300mA for 1.2V LDO - maintains regulation down to VIN = 1.325V |
| Thermal Resistance | θJA = 40.2°C/W - requires minimal PCB copper for thermal management in 4mm×4mm footprint |
Pinout & Package
The ISL9307IRTWCWNZ-T is housed in a 4mm × 4mm, 16-lead thin quad flat no-lead (TQFN) package with exposed thermal pad (JEDEC MO220K, drawing L16.4X4G). The E-pad must be soldered to system ground for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VINDCD1 (Pin 1) | Buck converter DCD1 input supply | Accepts 2.5V–5.5V; powers internal digital/analog circuits and DCD1 switch |
| FB1 (Pin 2) | DCD1 feedback node | Connects to resistor divider for adjustable versions; tied directly to VODCD1 for fixed 1.2V output |
| ENDCD1 (Pin 3) | DCD1 enable control | Active-high logic (1.4V min); allows startup delay and sequencing with other rails |
| ENLDO1 (Pin 4) | LDO1 enable control | Active-high logic (1.4V min); independent on/off control for 1.2V LDO |
| VINLDO (Pin 5) | LDO1/LDO2 common input | 1.5V–5.5V range; may be supplied from battery or DCD2 output |
| VOLDO1 (Pin 6) | LDO1 regulated output | Factory-set 1.2V fixed output; delivers up to 300mA with low noise and high PSRR |
| VOLDO2 (Pin 7) | LDO2 regulated output | Factory-set 3.3V fixed output; suitable for interface I/O or peripheral power |
| ENLDO2 (Pin 8) | LDO2 enable control | Active-high logic (1.4V min); enables independent power gating of 3.3V rail |
| GNDLDO (Pin 9) | LDO power ground | Dedicated ground return for LDO1/LDO2; separates analog-sensitive paths from switching grounds |
| ENDCD2 (Pin 10) | DCD2 enable control | Active-high logic (1.4V min); supports staggered startup with DCD1 for reduced inrush |
| FB2 (Pin 11) | DCD2 feedback node | Connects to resistor divider for adjustable versions; tied directly to VODCD2 for fixed 1.8V output |
| VINDCD2 (Pin 12) | Buck converter DCD2 input supply | 2.3V–VINDCD1 range; supports asymmetric input configurations |
| SW2 (Pin 13) | DCD2 switching node | Connects to inductor; high dv/dt node requiring short, wide trace routing away from sensitive signals |
| GNDDCD2 (Pin 14) | DCD2 power ground | Dedicated ground return for DCD2; minimizes coupling between buck channels |
| GNDDCD1 (Pin 15) | DCD1 power ground | Dedicated ground return for DCD1; critical for low-noise buck regulation and EMI control |
| SW1 (Pin 16) | DCD1 switching node | Connects to inductor; same routing constraints as SW2 - avoid proximity to FB or analog traces |
Key Features
| Feature | Design Value |
|---|---|
| Dual 3MHz synchronous buck converters | Enables ultra-compact DC/DC design using 1.5µH inductors and 10µF ceramic output caps |
| Independent enable pins per channel | Supports programmable power-up sequencing across four rails (DCD1/DCD2/LDO1/LDO2) |
| Active output discharge (bleeding resistor) | 115Ω internal resistor discharges DCD1/DCD2 outputs when disabled - prevents floating voltages |
| Low-noise LDOs with 45µVRMS noise | Meets stringent analog/RF supply requirements without external filtering |
| Thermal shutdown with 30°C hysteresis | Protects against sustained overload; resumes operation at 130°C after cooling |
Applications
| Smartphone Core Power | Mobile SoC I/O Supply |
|---|---|
Use Scenario: Powers ARM Cortex-A series CPU cores and GPU clusters in battery-operated smartphones. IC Role / Device Role / Timing Role: Dual-buck regulator delivering 1.2V (DCD1) and 1.8V (DCD2) with tight ±3% accuracy and fast transient response. Use Value: Maintains stable core voltage during burst workloads; 3MHz switching avoids AM radio band interference. | Use Scenario: Supplies 3.3V I/O rails for LPDDR memory interfaces and camera sensor modules. IC Role / Device Role / Timing Role: LDO2 provides low-noise, high-PSRR 3.3V output decoupled from switching noise of buck stages. Use Value: Ensures signal integrity on high-speed data buses; 55dB PSRR suppresses ripple from adjacent DC/DC converters. |
| DSP Baseband Power | Wearable Sensor Hub |
Use Scenario: Delivers 1.2V to baseband DSPs in LTE/5G modems where low quiescent current extends talk time. IC Role / Device Role / Timing Role: DCD1 operates in skip mode at light loads, reducing IQ to 50µA (typ) while maintaining regulation. Use Value: Extends battery life in always-on voice processing modes without sacrificing wake-up latency. | Use Scenario: Powers ultra-low-power inertial measurement units (IMUs) and environmental sensors in hearables. IC Role / Device Role / Timing Role: LDO1 supplies fixed 1.2V to sensors with 45µVRMS noise and <250mV dropout at 300mA. Use Value: Eliminates need for discrete LDOs; small 4mm×4mm footprint fits constrained wearable PCB layouts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023BRSBT | Triple 1.5A buck + triple LDO; 2.7–6.5V input; no fixed 1.2V/1.8V/3.3V variant matching ISL9307IRTWCWNZ-T's exact output set | Targets broader industrial input range; lacks identical factory-set 1.2V/1.8V/1.2V/3.3V configuration | Select when needing higher input voltage tolerance or additional LDO channels beyond four rails |
| RT8070ZSP | Dual 2A buck + dual 300mA LDO; 2.5–5.5V input; fixed outputs configurable via OTP but not pre-programmed to 1.2V/1.8V/1.2V/3.3V | Requires OTP programming for target outputs; no drop-in replacement for ISL9307IRTWCWNZ-T's factory-trimmed voltages | Select when custom output combinations are needed and OTP programming infrastructure is available |
Compared with TPS65023BRSBT and RT8070ZSP, the ISL9307IRTWCWNZ-T offers verified factory-set 1.2V/1.8V/1.2V/3.3V outputs in a smaller 4mm×4mm footprint, eliminating post-silicon configuration and simplifying qualification for smartphone and wearable designs requiring strict voltage binning.
Availability
ISL9307IRTWCWNZ-T is available at Aetrix Electronics and suitable for smartphone core power, mobile SoC I/O supply, DSP baseband power, and wearable sensor hub applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ISL9307IRTWCWNZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global leader in high-performance analog and power management semiconductors, with heritage from Intersil's precision power solutions.
The ISL9307 product line was designed specifically for space-constrained, battery-powered portable electronics-delivering integrated dual-buck + dual-LDO functionality in a thermally enhanced 4mm×4mm TQFN package.
FAQ
What are the factory-set output voltages of the ISL9307IRTWCWNZ-T?
The ISL9307IRTWCWNZ-T has four factory-trimmed fixed outputs: DCD1 delivers 1.2V, DCD2 delivers 1.8V, LDO1 delivers 1.2V, and LDO2 delivers 3.3V. These values are laser-trimmed during manufacturing and require no external resistors or OTP programming - confirmed in the Ordering Information table on page 4 of FN7931 Rev 3.00.
Does the ISL9307IRTWCWNZ-T support power sequencing between its four output rails?
Yes, the ISL9307IRTWCWNZ-T supports precise power sequencing via four independent enable pins: ENDCD1, ENDCD2, ENLDO1, and ENLDO2. Each is active-high with 1.4V logic threshold, allowing staggered startup delays by controlling external GPIO timing - essential for avoiding bus contention in multi-rail SoC systems.
What is the maximum continuous output current capability of each regulator in the ISL9307IRTWCWNZ-T?
The ISL9307IRTWCWNZ-T supports 1500mA per buck converter (DCD1 and DCD2) and 300mA per LDO (LDO1 and LDO2), as specified in the Recommended Operating Conditions table (page 5) and Electrical Specifications (page 5–6) of FN7931 Rev 3.00. These ratings apply across the full -40°C to +85°C ambient range.
How does the ISL9307IRTWCWNZ-T minimize power loss during light-load operation?
The ISL9307IRTWCWNZ-T enters skip mode under light load, reducing switching frequency and lowering quiescent current to 50µA (typ) for both DCD1 and DCD2 combined. This behavior is implemented via zero-cross detection over 16 consecutive cycles and is detailed in the Theory of Operation section (page 7) of FN7931 Rev 3.00.
Is thermal management supported in the ISL9307IRTWCWNZ-T package design?
Yes, the ISL9307IRTWCWNZ-T uses a thermally enhanced 4mm×4mm TQFN package with an exposed E-pad that must be soldered to a solid ground plane with ≥9 thermal vias (per Figure 4, page 8 of FN7931 Rev 3.00). Its θJA is 40.2°C/W, and it includes thermal shutdown at 155°C with 30°C hysteresis for reliable operation.
ISL9307IRTWCWNZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 16-WQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
- Number of Outputs:
- 4
- Frequency - Switching:
- 3MHz
- Voltage/Current - Output 1:
- 1.2V, 1.5A
- Voltage/Current - Output 2:
- 1.8V, 1.5A
- Voltage/Current - Output 3:
- 1.2V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 1.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TQFN (4x4)
ISL9307IRTWCWNZ-T FAQ
1.How can I place an order for ISL9307IRTWCWNZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL9307IRTWCWNZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL9307IRTWCWNZ-T reliable?
The price and inventory of ISL9307IRTWCWNZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL9307IRTWCWNZ-T is usually 5 days.
3.What payment methods are accepted for ISL9307IRTWCWNZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL9307IRTWCWNZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL9307IRTWCWNZ-T?
ISL9307IRTWCWNZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL9307IRTWCWNZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL9307IRTWCWNZ-T?
For technical support, including ISL9307IRTWCWNZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL9307IRTWCWNZ-T requirements.
6.How does Aetrix verify that ISL9307IRTWCWNZ-T is sourced from the original manufacturer or authorized distributors?
All ISL9307IRTWCWNZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL9307IRTWCWNZ-T meets industry standards.
7.What is the process for return or replacement of ISL9307IRTWCWNZ-T?
All ISL9307IRTWCWNZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL9307IRTWCWNZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL9307IRTWCWNZ-T part is unused and in its original packaging.
Return procedure for ISL9307IRTWCWNZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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