Renesas ISL95310WIU10Z-TK
- Part No.:
- ISL95310WIU10Z-TK
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
ISL95310WIU10Z-TK.pdf
- Description:
- IC DGTL POT 10KOHM 128TAP 10MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL95310WIU10Z-TK from Intersil is a digitally controlled potentiometer (XDCP™) with 128-tap resolution, 10kΩ total resistance, and 0V to +13.2V terminal voltage capability. It functions as a three-terminal potentiometer or two-terminal variable resistor in analog trimming applications, featuring nonvolatile wiper position storage, ±3.0mA wiper current rating, and operation across -40°C to +85°C.
For engineers reviewing the ISL95310WIU10Z-TK datasheet, ISL95310WIU10Z-TK pinout, ISL95310WIU10Z-TK application, or ISL95310WIU10Z-TK equivalent, key selection criteria include Up/Down interface compatibility, 10-lead MSOP package constraints, 70Ω typical wiper resistance at 3.3V, nonvolatile recall timing (3ms power-up delay), and V+ bias voltage range (8.0–13.2V).
Technical Context
The ISL95310WIU10Z-TK implements a 127-element resistor array with make-before-break wiper switching, controlled by a 7-bit up/down counter and decoded via volatile Wiper Counter Register (WR) and nonvolatile Initial Value Register (IVR). Wiper position is updated on negative-edge transitions of INC, directionally selected by U/D, and stored to EEPROM when CS rises while INC is high.
It operates in two distinct voltage domains: VCC (2.7–5.5V) powers logic and memory, while V+ (8.0–13.2V) biases the analog resistor array-enabling independent rail operation. The device supports voltage divider mode (0V at RL, V+ at RH) and resistor mode (RW–RL or RW–RH), with ratiometric temperature coefficient of ±4 ppm/°C and resistance TC of ±45 ppm/°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| RTOTAL | 10kΩ - fixed end-to-end resistance for precision analog scaling and bias adjustment |
| Wiper Resolution | 128 taps - 0.8% step resolution enabling fine-grained calibration without software interpolation |
| V+ Range | 8.0V to 13.2V - supports high-voltage analog signal paths while isolating digital control domain |
| Wiper Resistance | 70Ω typical @ 3.3V - low on-resistance minimizes insertion error in voltage divider configurations |
| Nonvolatile Endurance | 150,000 cycles - sufficient for factory calibration and infrequent field trims over product lifetime |
| Power-Up Recall Delay | 3ms after VCC > Vpor - defines minimum system boot timing margin before wiper is stable |
| Standby Current | 2µA @ VCC = 3.6V - enables ultra-low-power retention in battery-backed or energy-constrained systems |
Pinout & Package
ISL95310WIU10Z-TK is housed in a RoHS-compliant 10-lead MSOP package (M10.118 outline), measuring 3.0mm × 3.0mm × 1.1mm, with 0.5mm pitch and matte tin termination.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 U/D | Direction control input | Logic level selects wiper increment/decrement; must be stable before each INC edge |
| 2 GND | Analog/digital ground reference | Common return for VCC, V+, and all DCP terminals; requires low-impedance connection |
| 3 VCC | Digital supply rail | 2.7–5.5V logic supply; powers counter, memory, and interface-must ramp monotonically ≥0.2V/ms |
| 4 CS | Chip select & store trigger | Active-low enable; rising edge with INC = HIGH initiates nonvolatile store to IVR |
| 5 NC | No-connect | Internally unconnected; must remain floating-no external tie or pull-up/down |
| 6 RH | High-side potentiometer terminal | Fixed end of resistor array; referenced to V+ in voltage divider mode |
| 7 RW | Wiper output terminal | Movable tap point; delivers interpolated voltage/resistance; max ±3.0mA continuous current |
| 8 RL | Low-side potentiometer terminal | Fixed end of resistor array; referenced to GND in voltage divider mode |
| 9 V+ | Analog bias supply | 8.0–13.2V analog rail for resistor array; must be applied after or with VCC-not before |
| 10 INC | Increment clock input | Negative-edge triggered; controls wiper movement timing; min 4µs cycle time required |
Key Features
| Feature | Design Value |
|---|---|
| Nonvolatile wiper position storage | Retains last-set tap value across power cycles-eliminates need for host MCU re-initialization |
| Make-before-break wiper switching | Prevents open-circuit transients during tap transitions-critical for stable bias in sensitive analog circuits |
| Independent V+ and VCC rails | Enables 13.2V analog signal path control using 3.3V/5V digital logic-reduces level-shifting complexity |
| Temperature-compensated resistor array | ±4 ppm/°C ratiometric TC ensures stable voltage division over -40°C to +85°C industrial range |
| Low-leakage DCP terminals | ≤1µA leakage at RH/RW/RL pins preserves accuracy in high-impedance feedback or sensor bias networks |
Applications
| LCD Contrast Control | Power Supply Trim |
|---|---|
Use Scenario: Adjusting contrast voltage for monochrome or segment LCD displays in industrial HMIs and medical panels. IC Role / Device Role / Timing Role: Three-terminal potentiometer providing programmable DC bias to LCD V0 pin. Use Value: Replaces mechanical trimmer with factory-set or user-adjustable contrast, eliminating manual calibration and improving long-term stability. | Use Scenario: Fine-tuning output voltage of isolated DC-DC converters in telecom and server PSUs. IC Role / Device Role / Timing Role: Two-terminal variable resistor in feedback divider network of TL431 or error amplifier. Use Value: Enables post-manufacturing calibration and field compensation for load/temperature drift without hardware change. |
| Sensor Bias Adjustment | Audio Level Control |
Use Scenario: Setting bias current for photodiodes, RTDs, or bridge sensors in precision measurement front-ends. IC Role / Device Role / Timing Role: Two-terminal resistor configuring constant-current source or gain-setting network. Use Value: Provides traceable, repeatable sensor offset calibration with 128-step resolution-no solder-jumper dependencies. | Use Scenario: Implementing digital volume control in line-level audio paths for industrial audio interfaces and test equipment. IC Role / Device Role / Timing Role: Three-terminal potentiometer attenuating analog signal between op-amp stages. Use Value: Delivers monotonic, glitch-free attenuation with <0.75 LSB DNL-meets THD requirements for 24-bit audio systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5170BRMZ-10 | I²C interface, 256-tap resolution, 10kΩ, 5.5V max VDD, no separate V+ rail | Requires I²C host; limited to ≤5.5V analog range; no high-voltage bias support | Select when system already uses I²C and analog signals stay ≤5.5V-avoids level-shifting but sacrifices 13.2V capability |
| MAX5487ETE+T | Up/Down interface, 128-tap, 10kΩ, 5.5V max supply, integrated 2.5V reference | No V+ bias rail; internal reference limits full-scale range; lower terminal voltage headroom | Choose for compact 16-pin TQFN layout where board space is constrained and 13.2V operation is unnecessary |
Compared with AD5170BRMZ-10 and MAX5487ETE+T, the ISL95310WIU10Z-TK uniquely supports 13.2V analog biasing with independent V+ and VCC rails-making it the only option among the three for high-voltage trimming in industrial power and sensing applications without external level shifters or regulators.
Availability
ISL95310WIU10Z-TK is available at Aetrix Electronics and suitable for LCD contrast control, power supply trim, and sensor bias adjustment requiring stable component supply, RoHS-compliant packaging, and industrial temperature range (-40°C to +85°C) operation.
Supply support for ISL95310WIU10Z-TK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation is a semiconductor manufacturer specializing in precision analog and power management ICs, now part of Renesas Electronics.
The ISL95310WIU10Z-TK belongs to Intersil's XDCP™ (eXternally Digitally Controlled Potentiometer) family, designed specifically for replacing mechanical potentiometers in industrial, automotive, and medical systems requiring nonvolatile, high-voltage, and temperature-stable analog trimming.
FAQ
What is the maximum allowable voltage on the RH, RW, and RL terminals of the ISL95310WIU10Z-TK?
The ISL95310WIU10Z-TK supports a maximum terminal voltage of +13.2V on RH, RW, and RL when referenced to GND, as specified in the Absolute Maximum Ratings table. This applies only when V+ is properly biased within its 8.0–13.2V operating range and VCC is powered. Exceeding +13.2V risks permanent damage, and operation above this limit-even briefly-is not supported under any condition.
Does the ISL95310WIU10Z-TK require external pull-up resistors on its U/D, INC, or CS pins?
No, the ISL95310WIU10Z-TK does not require external pull-up resistors on U/D, INC, or CS. Its digital inputs feature CMOS-compatible thresholds with hysteresis (0.05×VCC) and specified leakage currents (±1µA typical), allowing direct connection to microcontroller GPIOs. Pull-ups may be added only if system noise immunity demands stronger default states-but they are not necessary for basic functionality of the ISL95310WIU10Z-TK.
How long does it take for the ISL95310WIU10Z-TK to recall its stored wiper position after power-up?
The ISL95310WIU10Z-TK completes nonvolatile recall of the wiper position within 3ms after VCC exceeds the power-on recall threshold (Vpor = 1.8–2.6V), as defined in the tD parameter. During this interval, the wiper remains in an undefined state; system firmware must wait ≥3ms after VCC stabilization before reading or adjusting the ISL95310WIU10Z-TK wiper position to ensure deterministic behavior.
Can the ISL95310WIU10Z-TK be used in a two-terminal configuration with RH disconnected?
Yes, the ISL95310WIU10Z-TK supports two-terminal operation with RH left unconnected, effectively functioning as a variable resistor between RW and RL. In this mode, the device maintains monotonicity and specified INL/DNL performance (±1 LSB), and the wiper resistance (70Ω typical) directly impacts series impedance. Ensure RL is tied to GND or a defined reference, and avoid exceeding ±3.0mA wiper current per the datasheet limits for the ISL95310WIU10Z-TK.
What is the recommended power sequencing for the ISL95310WIU10Z-TK to prevent unintended wiper movement or store events?
VCC must be applied before or simultaneously with V+; applying V+ first risks turning on multiple electronic switches prematurely. At power-up, bring CS and INC high before or concurrently with VCC ramp. At power-down, turn off V+ before or with VCC. Violating this sequence may cause undefined wiper positions or accidental nonvolatile stores-both explicitly warned against in the ISL95310WIU10Z-TK datasheet.
ISL95310WIU10Z-TK Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 1
- Number of Taps:
- 128
- Resistance (Ohms):
- 10k
- Interface:
- Up/Down (U/D, INC, CS)
- Memory Type:
- Non-Volatile
- Voltage - Supply:
- 2.7V ~ 5.5V
- Features:
- -
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- ±45ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 10-MSOP
- Operating Temperature:
- -40°C ~ 85°C
- Resistance - Wiper (Ohms) (Typ):
- 70
ISL95310WIU10Z-TK FAQ
1.How can I place an order for ISL95310WIU10Z-TK through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL95310WIU10Z-TK on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL95310WIU10Z-TK reliable?
The price and inventory of ISL95310WIU10Z-TK are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL95310WIU10Z-TK is usually 5 days.
3.What payment methods are accepted for ISL95310WIU10Z-TK?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL95310WIU10Z-TK transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL95310WIU10Z-TK?
ISL95310WIU10Z-TK orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL95310WIU10Z-TK order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL95310WIU10Z-TK?
For technical support, including ISL95310WIU10Z-TK datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL95310WIU10Z-TK requirements.
6.How does Aetrix verify that ISL95310WIU10Z-TK is sourced from the original manufacturer or authorized distributors?
All ISL95310WIU10Z-TK products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL95310WIU10Z-TK meets industry standards.
7.What is the process for return or replacement of ISL95310WIU10Z-TK?
All ISL95310WIU10Z-TK units undergo pre-shipment inspection (PSI). If there is an issue with ISL95310WIU10Z-TK, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL95310WIU10Z-TK part is unused and in its original packaging.
Return procedure for ISL95310WIU10Z-TK:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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