Renesas ISL95338HRTZ-TK
- Part No.:
- ISL95338HRTZ-TK
- Manufacturer:
- Renesas
- Package:
- -
- Datasheet:
-
ISL95338HRTZ-TK.pdf
- Description:
- IC REG NOTEBOOK BI-DIR VR FOR P
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Product details
Overview
ISL95338HRTZ-TK from Renesas is a bidirectional buck-boost voltage regulator supporting 3.8V–24V input and up to 20V regulated output in both forward (ADP→SYS) and reverse (SYS→ADP) directions, featuring R3™ Technology for high light-load efficiency and seamless DCM/CCM transitions, with SMBus/I²C programmability for current/voltage limits and soft-start-used in USB-C power delivery systems for tablets and ultrabooks.
For engineers reviewing the ISL95338HRTZ-TK datasheet, ISL95338HRTZ-TK pinout, ISL95338HRTZ-TK application, or ISL95338HRTZ-TK equivalent, key selection considerations include bidirectional regulation capability, ±1% output voltage accuracy (HRTZ grade), 32-pin 4×4 TQFN package thermal performance (θJC = 2°C/W), and SMBus-configurable PROCHOT# thresholds for system-side and adapter-side overcurrent protection.
Technical Context
The ISL95338HRTZ-TK implements dual synchronous buck-boost modulators-one for forward (ADP→VOUTS) and one for reverse (VOUT→ADPS) operation-with independent error amplifiers (COMPF/COMPR), current-sense inputs (CSIP/CSON, CSOP/CSIN), and gate drivers (UGATE1/LGATE1, UGATE2/LGATE2) enabling true bidirectional power flow control. It supports bypass mode in both directions and active switching during negative voltage transitions.
R3™ Technology enables adaptive modulation with fast transient response (<10 µs load step recovery), programmable soft-start via REF pin capacitor, and LDO outputs (VDD, VDDP) for internal bias. Protection includes OCP (±3% accuracy at 6A), OVP/UVP on both sides, and OTP at 150°C with hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Topology | Bidirectional synchronous buck-boost with independent forward/reverse modulators |
| Input Voltage Range | 3.8V–24V (no dead zone); supports USB PD, AC/DC adapters, travel ADPs |
| Output Voltage Range | Up to 20V in both forward and reverse directions; adjustable via resistor dividers on VOUTS/ADPS |
| Switching Frequency | Up to 1MHz; digitally controlled with ±15% accuracy in CCM |
| Output Voltage Accuracy | ±1% (≥8V), ±1.5% (4–8V) for HRTZ grade in both directions |
| Current Sensing Accuracy | ±3% at 6A (VOUT side, Rs2=10mΩ); ±3% at 4A (ADP side, Rs1=20mΩ) |
| Thermal Resistance | θJC = 2°C/W (junction-to-case), θJA = 37°C/W (junction-to-ambient, typical) |
Pinout & Package
Package: 32-lead, 4mm × 4mm, 0.5mm pitch TQFN (RoHS-compliant, moisture sensitivity level per J-STD-020).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 CSON | VOUT current sense (−) | Differential input for forward output current monitoring; requires 0.1µF ceramic filter with CSOP |
| 2 CSOP | VOUT current sense (+) | Differential input for forward output current sensing; referenced to CSON |
| 3 VOUTS | Forward VSYS feedback | Resistor divider node setting forward output voltage; connects to internal error amplifier COMPF |
| 4 BOOT2 | Q4 high-side gate driver supply | Charged via internal boot diode from VDDP; requires MLCC between BOOT2 and PHASE2 |
| 5 UGATE2 | Q4 high-side MOSFET gate drive | Drives upper switch in reverse-path buck-boost stage; 2A sink/source capability |
| 6 PHASE2 | Q4 source / Q3 drain node | Return path for reverse modulator; connects to inductor and low-side Q3 drain |
| 7 LGATE2 | Q3 low-side MOSFET gate drive | Drives lower switch in reverse path; 3.5A sink capability with 300–450mΩ pull-down |
| 8 VDDP | Gate driver power supply | 5V supply for all gate drivers; requires 4.7Ω series resistor from VDD and 2.2µF decoupling |
| 9 LGATE1 | Q2 low-side MOSFET gate drive | Drives lower switch in forward path; 3.5A sink capability |
| 10 PHASE1 | Q1 source / Q2 drain node | Return path for forward modulator; connects to inductor and Q2 drain |
| 11 UGATE1 | Q1 high-side MOSFET gate drive | Drives upper switch in forward path; 2.8A sink capability |
| 12 BOOT1 | Q1 high-side gate driver supply | Charged from VDDP; requires MLCC between BOOT1 and PHASE1 |
| 13 ADPS | Reverse output voltage feedback | Resistor divider node setting reverse output (ADP side); connects to COMPR |
| 14 CSIN | ADP current sense (−) | Differential input for adapter-side current monitoring; pairs with CSIP |
| 15 CSIP | ADP current sense (+) | Differential input for adapter current; also senses ADP voltage in forward mode |
| 16 ADP | Adapter input voltage sense | Enables forward mode when >4.1V; one of two LDO inputs (with DCIN) |
| 17 DCIN | LDO input (diode-OR'd) | Primary IC bias source; accepts diode-OR from ADP and system outputs; 4.7µF required |
| 18 VDD | LDO output (5V) | Internal analog/digital bias rail; resets SMBus registers if pulled <2.7V |
| 19 FRWEN | Forward mode enable (analog) | Active-high enable; forward mode valid when voltage >0.8V |
| 20 RVSEN | Reverse mode enable (digital) | Logic-high digital input; reverse mode enabled only when high |
| 21 SDA | SMBus data I/O | Open-drain bidirectional data line; requires 10kΩ pull-up per SMBus spec |
| 22 SCL | SMBus clock I/O | Open-drain clock input; requires 10kΩ pull-up; supports 10–400kHz |
| 23 PROCHOT# | Overcurrent alert (open-drain) | Pulled low on ADP-side or system-side overcurrent; configurable debounce/duration |
| 24 FRWPG | Forward modulator status | Open-drain indicator; low when forward modulator is active |
| 25 ADDR0 | I²C address LSB | Configures SMBus slave address with ADDR1; logic level sets bit 0 |
| 26 RVSPG | Reverse modulator status | Open-drain indicator; low when reverse modulator is active |
| 27 PROG | Default VOUTS set resistor | Connects to GND via resistor to set default forward output voltage |
| 28 COMPF | Forward error amplifier output | External compensation network connects here to GND for loop stability |
| 29 REF | Soft-start reference | Capacitor to GND sets soft-start time; used for both forward and reverse modes |
| 30 COMPR | Reverse error amplifier output | External compensation network connects here to GND for reverse-loop stability |
| 31 VOUT | VOUT sense for modulator | Monitors forward output for zero-current detection and phase control |
| 32 ADDR1 | I²C address MSB | Configures SMBus slave address with ADDR0; logic level sets bit 1 |
| Bottom Pad | GND (thermal & signal) | Primary signal reference and thermal dissipation path; must be soldered to PCB ground plane |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional regulation | Enables power flow from adapter to system (forward) or system to adapter (reverse), supporting USB OTG and fast swap without external FETs |
| R3™ Technology | Delivers >90% efficiency at 10mA load and sub-10µs transient response with automatic DCM/CCM transition |
| SMBus/I²C programmability | Allows runtime configuration of output voltage (0.5–20V), current limits (0.5–6A), PROCHOT# thresholds, and soft-start time |
| Integrated LDOs | VDD (5V) and VDDP (gate driver supply) reduce external BOM count; VDD reset threshold ensures register integrity |
| Bidirectional discharge | Internally discharges ADP (6.5mA) and VOUT (8.5mA) rails during disable to meet USB-C safety requirements |
| Independent protection | Dual OCP, OVP, UVP, and OTP circuits monitor both ADP and system sides separately with configurable thresholds |
Applications
| USB-C Power Delivery Systems | Ultrabook Adaptive Charging |
|---|---|
Use Scenario: Dual-role USB-C port managing power negotiation between host and peripheral while supporting DRP (dual-role port) behavior. IC Role / Device Role / Timing Role: Bidirectional buck-boost controller regulating voltage and current direction based on CC logic and SMBus commands. Use Value: Eliminates need for separate forward/reverse controllers and external OR-ing FETs, reducing solution size by 35% and enabling single-chip PD 3.0 compliance. |
Use Scenario: Ultrabook dynamically switching between AC adapter charging (forward) and powering USB-C peripherals (reverse) during battery-low conditions. IC Role / Device Role / Timing Role: Primary power path manager with real-time current limiting and PROCHOT# signaling to CPU during thermal events. Use Value: Enables fast swap between adapter and battery power without system reset; ±1% voltage accuracy maintains stable SoC operation across 4–20V range. |
| Tablet Battery Backup Supply | Portable Power Bank Regulation |
Use Scenario: Tablet using internal battery to power USB-C accessories when AC adapter is disconnected. IC Role / Device Role / Timing Role: Reverse-mode regulator converting 3.7–4.4V battery to regulated 5–20V output with programmable current limit. Use Value: Maintains constant output voltage despite battery sag; bidirectional discharge function safely bleeds residual charge post-shutdown. |
Use Scenario: Power bank delivering variable USB-C PD output (5–20V) while accepting input from diverse sources (travel adapter, car charger, solar). IC Role / Device Role / Timing Role: Universal voltage translator with auto-detection of input source capability and dynamic output reconfiguration. Use Value: Supports full PD 3.0 PPS (Programmable Power Supply) profiles via SMBus; 1MHz switching enables compact 22µH inductors and <1000µF total output capacitance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bidirectional buck-boost regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP8859GQ-Z | Single-direction (forward-only) buck-boost; no reverse regulation; 3.3–24V input, 0.8–24V output; I²C interface but no PROCHOT# or bidirectional discharge | Only suitable for fixed-source-to-load applications; cannot support USB OTG or fast swap | Select when reverse power flow is unnecessary and cost sensitivity outweighs feature set |
| TPS65988DHAR | USB-C PD controller + integrated buck-boost; supports PD 3.1 EPR; higher integration (CC logic, MCU, transceivers); 20V max output; no discrete gate drivers | Designed for full PD stack implementation; requires external power FETs for >3A; not drop-in compatible | Select for complete USB-C DRP solutions requiring policy engine and firmware; not a direct functional replacement |
Compared with MP8859GQ-Z and TPS65988DHAR, the ISL95338HRTZ-TK uniquely delivers true hardware-based bidirectional regulation with independent current sensing, dual modulators, and SMBus-configurable protection-enabling robust, low-latency power path control without firmware dependency.
Availability
ISL95338HRTZ-TK is available at Aetrix Electronics and suitable for USB-C power delivery systems, ultrabook adaptive charging architectures, and portable power bank designs requiring stable component supply, guaranteed long-term availability, and RoHS-compliant 4×4 TQFN packaging.
Supply support for ISL95338HRTZ-TK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader delivering microcontrollers, analog, power, and SoC products for automotive, industrial, infrastructure, and IoT applications.
The ISL95338 belongs to Renesas' Power Management IC portfolio, designed specifically for high-efficiency, bidirectional USB-C PD and mobile computing power architectures requiring precise voltage/current control and robust system-level protection.
FAQ
What is the operating temperature range for the ISL95338HRTZ-TK?
The ISL95338HRTZ-TK is rated for an ambient temperature range of –10°C to +100°C, with junction temperature operation up to +125°C. Its thermal resistance (θJC = 2°C/W) enables reliable performance in thermally constrained tablet and ultrabook chassis when the bottom thermal pad is properly soldered to a multi-layer PCB ground plane.
How does the ISL95338HRTZ-TK support USB On-The-Go (OTG) functionality?
The ISL95338HRTZ-TK supports USB OTG by enabling reverse-mode operation: when RVSEN is asserted high, it regulates power from the system battery (VOUT) to the ADP rail, delivering a programmable 5–20V output. This eliminates external boost converters and allows compliant USB-C peripheral power delivery without firmware intervention.
Can the ISL95338HRTZ-TK be configured for different output voltages in forward and reverse directions?
Yes-the ISL95338HRTZ-TK uses separate feedback networks: VOUTS (pin 3) sets forward output voltage via an external resistor divider, while ADPS (pin 13) sets reverse output voltage. Both are independently programmable via SMBus registers (e.g., System Regulating Voltage Register in Forward Mode, Regulating Voltage Register in Reverse Mode), allowing asymmetric configurations like 12V forward / 9V reverse.
What protection features are implemented in the ISL95338HRTZ-TK?
The ISL95338HRTZ-TK integrates OCP, OVP, UVP, and OTP on both ADP and system sides. OCP accuracy is ±3% at full scale; OVP thresholds are 26.4V (ADP), 1.1V (VOUTS), and 1.2V (ADPS) referenced to internal 12×REF; OTP triggers at 150°C with hysteresis. All protections are hardware-based and respond within microseconds.
Is the ISL95338HRTZ-TK pin-compatible with other variants in the ISL95338 family?
Yes-the ISL95338HRTZ-TK shares identical 32-pin 4×4 TQFN packaging and pinout with all ISL95338 variants (e.g., ISL95338HRTZ, ISL95338IRTZ-TK). The 'H' suffix denotes the –10°C to +100°C ambient rating, and 'TK' indicates 1k-unit tape-and-reel packaging; electrical functionality is identical across HRTZ-grade parts.
ISL95338HRTZ-TK Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- *
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- -
- Output Configuration:
- -
- Topology:
- -
- Output Type:
- -
- Number of Outputs:
- -
- Voltage - Input (Min):
- -
- Voltage - Input (Max):
- -
- Voltage - Output (Min/Fixed):
- -
- Voltage - Output (Max):
- -
- Current - Output:
- -
- Frequency - Switching:
- -
- Synchronous Rectifier:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
ISL95338HRTZ-TK FAQ
1.How can I place an order for ISL95338HRTZ-TK through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL95338HRTZ-TK on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL95338HRTZ-TK reliable?
The price and inventory of ISL95338HRTZ-TK are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL95338HRTZ-TK is usually 5 days.
3.What payment methods are accepted for ISL95338HRTZ-TK?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL95338HRTZ-TK transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL95338HRTZ-TK?
ISL95338HRTZ-TK orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL95338HRTZ-TK order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL95338HRTZ-TK?
For technical support, including ISL95338HRTZ-TK datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL95338HRTZ-TK requirements.
6.How does Aetrix verify that ISL95338HRTZ-TK is sourced from the original manufacturer or authorized distributors?
All ISL95338HRTZ-TK products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL95338HRTZ-TK meets industry standards.
7.What is the process for return or replacement of ISL95338HRTZ-TK?
All ISL95338HRTZ-TK units undergo pre-shipment inspection (PSI). If there is an issue with ISL95338HRTZ-TK, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL95338HRTZ-TK part is unused and in its original packaging.
Return procedure for ISL95338HRTZ-TK:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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