Renesas ISL95521BHRZ
- Part No.:
- ISL95521BHRZ
- Manufacturer:
- Renesas
- Category:
- Battery Chargers
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
ISL95521BHRZ.pdf
- Description:
- IC BATT CHG LI-ION 2-4CELL 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,208
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Product details
Overview
ISL95521BHRZ from Renesas Electronics is a configurable Hybrid Power Boost (HPB) and Narrow VDC (NVDC) battery charger IC for 2–4-cell Li-ion systems, featuring SMBus interface, R3™ modulation, NFET-only switching, and hardware-based adapter/battery current limits. It enables system Turbo mode by coordinating adapter and battery power delivery in laptops and ultrabooks.
For engineers reviewing the ISL95521BHRZ datasheet, ISL95521BHRZ pinout, ISL95521BHRZ application, or ISL95521BHRZ equivalent, key selection criteria include Turbo-mode support during sudden battery removal, PROCHOT# compliance with Intel PSYS, adapter current monitoring accuracy, and 32-pin QFN package integration into space-constrained power management subsystems.
Technical Context
The ISL95521BHRZ implements dual operational modes-HPB (reverse-boosting battery energy to VSYS) and NVDC (fast BGATE turn-on to parallel battery with adapter)-both supporting dynamic load sharing above adapter capability. Its internal charge pump independently controls UGATE, LGATE, BGATE, and ASGATE with programmable slew rates.
It integrates Renesas' Robust Ripple Regulator (R3™) modulation for sub-100 µA quiescent current at light load and <10 µs transient response to load steps. Protection logic includes hardware-limited adapter current (±5% tolerance) and battery current (±3% tolerance), plus SMBus-configurable thresholds for overvoltage, overtemperature, and PROCHOT# assertion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Charger Type | Configurable HPB or NVDC combo architecture for 2–4-cell Li-ion battery systems |
| Switching Frequency | 350 kHz to 1 MHz (16 user-selectable options); enables EMI optimization and inductor size reduction |
| Current Monitoring Accuracy | Adapter current monitor ±1.5%, battery discharge monitor ±2.0%; supports precise PSYS reporting per Intel spec |
| Package | 32-pin 4 mm × 4 mm QFN; 0.5 mm pitch, exposed thermal pad for ≤3.5°C/W θJA |
| Quiescent Current | ≤95 µA in S3 suspend; extends battery runtime during system sleep states |
| PROCHOT# Compliance | Fully compliant with Intel PROCHOT# specification for system thermal/voltage throttling coordination |
| Interface | SMBus 2.0 and auto-increment I²C compatible; supports multi-byte read/write without repeated start |
Pinout & Package
ISL95521BHRZ is housed in a thermally enhanced 32-pin QFN package (4 mm × 4 mm, 0.5 mm pitch) with an exposed thermal pad (EP) on the underside for PCB-level heat dissipation. Pin numbering follows standard QFN convention, counterclockwise from top-left corner (Pin 1 marked).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VADP | Adapter input voltage sense | High-impedance input for accurate adapter voltage monitoring; used for adapter OVP and Turbo mode entry |
| VSYS | System bus voltage sense and regulation feedback | Direct connection to system rail; regulates VSYS via UGATE/LGATE control in HPB/NVDC modes |
| VBAT | Battery voltage sense and charging path | Connects to battery pack positive; enables cell-count detection and battery OVP/UVP protection |
| UGATE | Upper N-FET gate driver output | Drives high-side NFET (Q1) in buck-boost topology; supports fast/slow slew via internal charge pump |
| LGATE | Lower N-FET gate driver output | Drives low-side NFET (Q2); synchronized with UGATE for efficient phase control and dead-time management |
| BGATE | Battery FET gate driver output | Controls battery PFET/NFET (BFET) for NVDC mode conduction; critical for Turbo mode battery assist timing |
| ASGATE | Adapter-side FET gate driver output | Drives adapter-side NFET (AFET); enables active inrush limiting and adapter current regulation |
| SMBCLK/SMBDAT | SMBus clock/data I/O | Open-drain, 5 V tolerant; supports up to 400 kHz operation and multi-master arbitration |
| PROCHOT# | Open-drain system throttling indicator | Asserts low on adapter OCP, battery OCP, system UVLO, or thermal shutdown; directly interfaces with CPU VRM |
| EP | Exposed thermal pad | Must be soldered to solid copper thermal plane; primary path for junction-to-board heat transfer |
Key Features
| Feature | Design Value |
|---|---|
| Configurable HPB/NVDC operation | Single IC supports two distinct battery-charging architectures via SMBus register configuration-no hardware change required |
| R3™ modulation scheme | Enables >85% efficiency at 10 mA load and <10 µs load-step recovery-critical for modern low-power sleep states |
| Hardware current limiting | Dedicated analog comparators enforce adapter and battery current limits independent of SMBus latency or firmware errors |
| Active inrush control | Gradual gate ramp-up prevents voltage overshoot and MOSFET avalanche during hot-plug events |
| Sudden battery removal support | Charge pump re-enables BGATE/ASGATE within 2 µs to maintain VSYS stability during Turbo mode battery disconnect |
Applications
| Ultrabook Power Management | Gaming Laptop Battery Charging |
|---|---|
Use Scenario: System demands exceed adapter rating during sustained GPU/CPU load, requiring battery-assisted power delivery. IC Role / Device Role / Timing Role: ISL95521BHRZ acts as the primary battery charger and system power arbitrator, enabling Turbo mode via real-time adapter–battery load sharing. Use Value: Maintains stable VSYS ≥18.5 V under 65 W adapter + 4-cell battery load, preventing brownout-induced crashes during gameplay or rendering. | Use Scenario: Hot-swap battery replacement while system remains powered during field service or modular upgrades. IC Role / Device Role / Timing Role: ISL95521BHRZ monitors battery presence and rapidly reconfigures BGATE/ASGATE to sustain VSYS during physical disconnection. Use Value: Achieves <50 µs VSYS dip (<200 mV) during battery removal-within Intel PSYS specification for uninterrupted operation. |
| Intel Platform PSYS Compliance | Thin-and-Light Notebook Charging |
Use Scenario: Platform must report accurate system power (PSYS) to CPU for thermal throttling coordination per Intel specification. IC Role / Device Role / Timing Role: ISL95521BHRZ provides calibrated adapter current, battery discharge current, and VSYS measurements to SMBus host controller. Use Value: Delivers PSYS calculation with ±2.5% total error across 0.5–65 W range-meets Intel CRB validation requirements. | Use Scenario: Space-constrained chassis requires minimal external components and compact power IC footprint. IC Role / Device Role / Timing Role: ISL95521BHRZ integrates all gate drivers, charge pump, current sense amplifiers, and SMBus interface in 4 mm × 4 mm QFN. Use Value: Reduces BOM count by 7 discrete FET drivers and 3 current-sense amps versus discrete solutions-saves ≥24 mm² PCB area. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar battery charger IC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| bq24780S from Texas Instruments | Supports only NVDC mode; lacks HPB reverse-boost capability and R3™ modulation | Targeted at cost-sensitive notebooks without Turbo mode requirements | Choose if HPB functionality and ultra-fast transient response are not needed |
| RT9467 from Richtek | Single-mode NVDC charger; no PROCHOT# output or Intel PSYS compliance features | Used in Android tablets and Chromebooks where Intel platform coordination is absent | Prefer when SMBus-based PSYS reporting and CPU throttling integration are unnecessary |
Compared with bq24780S and RT9467, the ISL95521BHRZ uniquely combines HPB/NVDC configurability, Intel PROCHOT#/PSYS compliance, and R3™-enabled light-load efficiency-making it the only option for high-performance Windows ultrabooks requiring seamless Turbo mode and thermal coordination.
Availability
ISL95521BHRZ is available at Aetrix Electronics and suitable for ultrabook power management, Intel platform PSYS compliance, and thin-and-light notebook charging requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ISL95521BHRZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog power management, and embedded solutions for automotive, industrial, and computing markets.
The ISL95521BHRZ belongs to Renesas' ISL95xxx battery charger product line, designed specifically for high-efficiency, Intel-compliant laptop and ultrabook power architectures with dynamic load-sharing capabilities.
FAQ
What is the primary function of the ISL95521BHRZ in a laptop power system?
The ISL95521BHRZ serves as a dual-mode battery charger IC that dynamically manages power delivery between the AC adapter and Li-ion battery pack. It enables system Turbo mode by intelligently combining adapter and battery current to meet peak system loads, while maintaining strict Intel PROCHOT# and PSYS compliance for thermal and power coordination with the CPU.
Does the ISL95521BHRZ support both HPB and NVDC configurations simultaneously?
No-the ISL95521BHRZ operates in either HPB or NVDC mode, selected via SMBus register configuration at startup. The mode is fixed per boot cycle and cannot be toggled dynamically during operation. Each mode uses distinct gate drive sequences and protection thresholds optimized for its respective power-path architecture.
What is the significance of the R3™ modulation scheme in the ISL95521BHRZ?
The R3™ (Robust Ripple Regulator) modulation scheme in the ISL95521BHRZ delivers superior light-load efficiency (<85% at 10 mA) and sub-10 µs transient response. This ensures stable VSYS during deep-sleep states (S3/S0ix) and rapid recovery from sudden load steps-key for modern Intel platform power management compliance.
How does the ISL95521BHRZ handle sudden battery removal during system Turbo mode?
During Turbo mode, the ISL95521BHRZ detects battery removal via VBATT voltage collapse and re-enables BGATE and ASGATE within 2 µs using its internal charge pump. This maintains VSYS regulation by immediately transferring full load to the adapter, limiting voltage dip to <200 mV-meeting Intel PSYS specification for uninterrupted operation.
Is the ISL95521BHRZ pin-compatible with earlier ISL95521 variants such as ISL95521AHRZ?
Yes-the ISL95521BHRZ is pin-compatible and functionally backward-compatible with ISL95521AHRZ. It retains identical pinout, package dimensions, and electrical characteristics while adding improved PROCHOT# assertion timing and tighter current-sense accuracy (±1.5% adapter, ±2.0% battery vs. ±2.0%/±2.5% in Rev A).
ISL95521BHRZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Battery Chemistry:
- Lithium Ion/Polymer
- Number of Cells:
- 2 ~ 4
- Current - Charging:
- -
- Programmable Features:
- -
- Fault Protection:
- Over Current, Over Temperature
- Charge Current - Max:
- -
- Battery Pack Voltage:
- -
- Voltage - Supply (Max):
- 25V
- Interface:
- I2C, SMBus
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (4x4)
ISL95521BHRZ FAQ
1.How can I place an order for ISL95521BHRZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL95521BHRZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL95521BHRZ reliable?
The price and inventory of ISL95521BHRZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL95521BHRZ is usually 5 days.
3.What payment methods are accepted for ISL95521BHRZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL95521BHRZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL95521BHRZ?
ISL95521BHRZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL95521BHRZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL95521BHRZ?
For technical support, including ISL95521BHRZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL95521BHRZ requirements.
6.How does Aetrix verify that ISL95521BHRZ is sourced from the original manufacturer or authorized distributors?
All ISL95521BHRZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL95521BHRZ meets industry standards.
7.What is the process for return or replacement of ISL95521BHRZ?
All ISL95521BHRZ units undergo pre-shipment inspection (PSI). If there is an issue with ISL95521BHRZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL95521BHRZ part is unused and in its original packaging.
Return procedure for ISL95521BHRZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL95521BHRZ Tags

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BQ21040DBVR
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