Texas Instruments ISO102B

Overview

ISO102B from Burr-Brown is a hermetic, 24-pin ceramic DIP capacitive-coupled isolation amplifier designed for high-voltage analog signal transmission. It provides ±10V input/output range, 14-bit linearity (±0.002% FSR typical nonlinearity), 70kHz small-signal bandwidth, and 1500Vrms continuous isolation rating-used in industrial process control transducer channel isolation and ground-loop elimination.

For engineers reviewing the ISO102B datasheet, ISO102B pinout, ISO102B application, or ISO102B equivalent, key selection considerations include its 24-pin side-brazed DIP package, ±15V dual-supply operation, 125dB min IMR at 60Hz, 5V reference outputs (Ref1/Ref2), and guaranteed ±1.5% gain adjust range via external potentiometer.

Technical Context

The ISO102B employs a three-chip hybrid architecture with differential ceramic capacitive barrier (6pF total, 10¹⁴Ω resistance) and digital encoding/decoding via VCO-PLL topology. Input stage uses voltage-to-frequency conversion; output stage reconstructs analog signal via phase-locked loop with second-order 100kHz active filter.

It delivers unity gain (1 V/V nominal), supports optional bandwidth control via C1/C2 pins (C2 = 2×C1), and features fully independent input/output power domains (±VCC1/±VCC2) with isolated commons (Common1/Common2/Digital Common) to maintain galvanic separation under up to 100kV/µs transient immunity.

Key Specifications

Pinout & Package

ISO102B is housed in a 24-pin side-brazed ceramic DIP (Package Drawing #208), 600mil wide, with industry-standard footprint and missing pins between input/output sections to support automated insertion.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar isolation amplifier applications.

Compared with ISO102 and AMC1301DWVR, the ISO102B uniquely combines hermetic 24-pin DIP packaging, factory-trimmed B-grade linearity, dual independent 5V references, and full gain/offset adjust capability-making it irreplaceable in legacy industrial systems requiring drop-in replacement of aging ISO102 units with enhanced precision.

Availability

ISO102B is available at Aetrix Electronics and suitable for industrial process control, 4–20mA loop isolation, and motor/SCR control applications requiring stable component supply across extended product lifecycles.

Supply support for ISO102B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Burr-Brown Corporation was a U.S.-based analog semiconductor pioneer (acquired by Texas Instruments in 2000), renowned for high-precision isolation, data acquisition, and signal conditioning ICs.

The ISO102B belongs to Burr-Brown's capacitive-isolation amplifier family, engineered specifically for rugged industrial environments demanding hermetic reliability, high linearity, and seamless integration into analog I/O subsystems without external support components.

FAQ

What is the isolation voltage rating of the ISO102B and how is it tested?

The ISO102B is rated for 1500Vrms continuous isolation at 60Hz and is 100% tested to 4000Vrms for 10 seconds. This verification ensures each unit meets minimum dielectric strength requirements before shipment. The isolation barrier consists of two 3pF ceramic capacitors with >10kV breakdown capability and 10¹⁴Ω resistance. The ISO102B achieves this rating in its 24-pin side-brazed ceramic DIP package (Drawing #208), which maintains creepage and clearance distances compliant with industrial safety standards. No external components are needed to achieve this rating.

How does the ISO102B achieve 14-bit linearity and what is its typical nonlinearity specification?

The ISO102B achieves 14-bit linearity through precision factory trimming of gain and offset in its B-grade version, resulting in ±0.002% FSR typical nonlinearity (±0.003% max) over ±10V input range. This corresponds to ≤0.4mV error across the full scale, enabling true 14-bit effective resolution in high-accuracy applications like RTD temperature measurement. The linearity is maintained across –25°C to +85°C ambient temperature, with gain drift of ±12ppm/°C and offset drift of ±150µV/°C. These specifications are confirmed in the ISO102B-specific section of the ISO102/106 datasheet (SBOS151, page 3).

Can the ISO102B operate from supplies other than ±15V, and what are its quiescent current values?

Yes, the ISO102B operates from ±10V to ±20V on both input (±VCC1) and output (±VCC2) supplies. At ±15V, quiescent currents are +11 to +15mA on +VCC1, –9 to –12mA on –VCC1, +25 to +33mA on +VCC2, and –15 to –20mA on –VCC2. Total dissipation is 300–400mW on ±VCC1 and 600–800mW on ±VCC2. The device remains fully specified across the entire supply range, with performance parameters-including linearity, bandwidth, and IMR-guaranteed at ±10V and ±20V. Thermal resistance is θJA = 40°C/W, allowing operation up to +85°C ambient without heatsinking.

What are the functions of the C1 and C2 pins on the ISO102B, and how do they affect bandwidth?

The C1 and C2 pins on the ISO102B connect to internal nodes of the output low-pass filter, enabling optional bandwidth control. C2 must be twice the capacitance of C1 (C2 = 2×C1). Adding capacitance reduces small-signal bandwidth-from 70kHz (no external caps) down to 100Hz (3µF on C1). For example, 300pF on C1 yields ~10kHz bandwidth. This tradeoff improves dynamic range by lowering noise floor while maintaining adequate signal fidelity. The "Bandwidth Control" curve (page 6, SBOS151) quantifies exact relationships. Shielding C1/C2 from high electric fields preserves AC isolation-mode rejection, as specified in the layout guidelines.

Does the ISO102B require external components for basic operation, and what are the mandatory connections?

No, the ISO102B requires no external components for basic operation-its VCO-PLL architecture, references, and filtering are fully integrated. Mandatory connections include: ±VCC1/±VCC2 supplies with 0.1µF ceramic bypass capacitors placed within 0.25" of pins; Reference1 strapped to Offset (or Offset Adjust if user calibration is used); and VIN/VOUT referenced to Common1/Common2 respectively. Digital Common may be tied to ground plane if no digital noise is present. Gain Adjust and Offset Adjust pins are left open if adjustment is not needed. All specifications assume these minimal connections per Figure 2 and Figure 4 of the ISO102/106 datasheet.