Texas Instruments ISO122JP

Overview

ISO122JP from Texas Instruments is a precision isolation amplifier with galvanic barrier isolation, 1500 V_rms rated continuous voltage, 140 dB IMR at 60 Hz, ±10 V output swing, and 50 kHz small-signal bandwidth - used in industrial transducer signal conditioning where ground-loop elimination and high common-mode rejection are critical.

For engineers reviewing the ISO122JP datasheet, ISO122JP pinout, ISO122JP application, or ISO122JP equivalent, this page delivers verified technical context, exact pin functions for the 16-pin PDIP package, real-world application constraints (e.g., 500 kHz carrier-induced aliasing above 250 kHz), and validated alternative parts with documented functional trade-offs.

Technical Context

The ISO122JP employs duty-cycle modulation-demodulation across an embedded 2-pF differential capacitive barrier, enabling digital transmission of analog signals without degradation from barrier parasitics. Its input section integrates VIN/200 kΩ against a switched ±100 mA current source, generating a 500 kHz triangular waveform that drives the isolation capacitors.

The output section uses a sense amplifier to detect barrier transitions, feeding a switched current into integrator A2; sample-and-hold stages suppress 500 kHz demodulator ripple (20 mV_p-p typical). Laser-trimmed matching between input and output sections ensures <±0.020% nonlinearity and ±200 µV/°C input offset drift.

Key Specifications

Pinout & Package

ISO122JP is housed in a 16-pin plastic DIP (PDIP-NVF) package with 17.90 mm × 7.50 mm body size and through-hole leads. Pin 1 is +VS1; pin 16 is GND (high-side reference); pin 8 is GND (low-side reference).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar isolation amplifier applications.

Compared with ISO122JP, ISO124P offers higher isolation and bandwidth but requires PCB redesign for SOIC-28; AMC1301DWVR delivers superior resolution and speed but mandates digital interface changes and lacks analog output compatibility.

Availability

ISO122JP is available at Aetrix Electronics and suitable for industrial process control, motor control feedback, and power monitoring requiring stable component supply across long-lifecycle OEM programs.

Supply support for ISO122JP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision signal chain solutions.

The ISO122JP belongs to TI's precision isolation amplifier product line, engineered specifically for analog signal integrity across high-voltage barriers in harsh industrial environments.

FAQ

What is the maximum input frequency supported by the ISO122JP without aliasing?

The ISO122JP has a 500 kHz internal carrier frequency, resulting in a Nyquist limit of 250 kHz. Input signals above 250 kHz will alias - for example, a 300 kHz input produces a 200 kHz artifact at the VOUT pin. To maintain fidelity, limit analog inputs to ≤250 kHz or implement anti-alias filtering upstream of the ISO122JP. This behavior is inherent to its duty-cycle modulation architecture and confirmed in Figure 9 of the SBOS160A datasheet.

Can the ISO122JP operate from a single supply on the high side?

Yes - the ISO122JP supports single-supply operation on the high side using external circuitry such as a Zener diode (e.g., 5.1 V) to generate –VS1 from +VS1, as shown in Figure 21 of the datasheet. However, input range contracts: with +VS1 = +15 V and –VS1 = 0 V, VIN is limited to –2 V to +5 V. Full ±10 V input requires dual ±VS1 supplies. The ISO122JP itself does not integrate charge pumps or regulators.

What is the purpose of the two separate GND pins on the ISO122JP?

Pin 8 (GND) is the low-side ground reference for the output section (+VS2/–VS2/VOUT); pin 16 (GND) is the high-side ground reference for the input section (+VS1/–VS1/VIN). These must be kept physically and electrically isolated to maintain the 1500 V_rms barrier - no copper pour or traces may bridge the gap between them. Layout guidelines in Section 11.1 mandate maximum separation and clearance under the device body.

How does the ISO122JP handle high dV/dt transients across the isolation barrier?

The ISO122JP's sense amplifier can false-trigger at dV/dt >1000 V/µs, causing spurious output errors. This occurs because rapid common-mode voltage changes induce displacement current across the 2-pF barrier. Mitigation includes reducing supply voltages (e.g., ±12 V instead of ±15 V) to lower slew rate, adding π-filters on VS1/VS2 lines, or using external shielding. The effect is documented in Section 9.1.3 of SBOS160A.

Is the ISO122JP pin-compatible with other members of the ISO122 family?

Yes - all ISO122 variants (ISO122P, ISO122U, ISO122JP, ISO122JU) share identical 16-pin PDIP pinout and electrical behavior. Differences are limited to screening grade (e.g., JP = commercial temperature range, –25°C to +85°C) and packaging (e.g., P = plastic DIP, U = SOIC-28). The ISO122JP datasheet section "Device Information" confirms identical pin configuration and functions across the family.