Texas Instruments ISO7820LLDWW
- Part No.:
- ISO7820LLDWW
- Manufacturer:
- Texas Instruments
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.551", 14.00mm Width)
- Datasheet:
-
ISO7820LLDWW.pdf
- Description:
- DGT ISO 5700VRMS 2CH LVDS 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,858
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Product details
Overview
ISO7820LLDWW from Texas Instruments is a reinforced isolated dual-LVDS buffer with 8000-VPK isolation voltage, two forward-direction channels, ±100 kV/μs CMTI, 100 Mbps signaling rate, and operation from –55°C to +125°C ambient. It isolates high-speed LVDS buses in motor control inverters where galvanic separation and noise immunity are critical.
For engineers reviewing the ISO7820LLDWW datasheet, ISO7820LLDWW pinout, ISO7820LLDWW application, or ISO7820LLDWW equivalent, this page delivers verified specifications, SOIC-16 DWW package terminal mapping, functional role per pin, real-world use cases in industrial automation and medical equipment, and two validated alternative parts with documented technical differences.
Technical Context
The ISO7820LLDWW integrates two unidirectional LVDS transceivers separated by a silicon dioxide (SiO₂) isolation barrier, enabling signal transmission across reinforced insulation without shared ground. Each channel includes independent LVDS receiver and transmitter stages with differential input/output pairs referenced to isolated VCCI/GNDI and VCCO/GNDO supplies.
It features dual enable inputs (EN1, EN2) for per-channel output disable into high-impedance state, supports 2.25 V–5.5 V supply on both sides, and delivers low propagation delay (17 ns typical) with pulse width distortion under 4.5 ns. Its robust EMC design meets system-level ESD, EFT, and surge immunity requirements per IEC/EN standards.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 8000-VPK reinforced isolation per DIN V VDE V 0884-10 - enables safe operation in 1000-VAC industrial mains environments with double insulation protection. |
| Signaling Rate | Up to 100 Mbps - supports high-resolution encoder feedback and real-time motion control loop updates in servo drives. |
| CMTI | ±100 kV/μs minimum - rejects fast common-mode transients induced by IGBT switching in motor inverters without data corruption. |
| Supply Range | 2.25 V to 5.5 V per side - allows interoperability with 3.3-V FPGA I/O banks and 5-V microcontroller peripherals across isolation boundary. |
| Operating Temperature | –55°C to +125°C ambient - qualified for under-hood automotive motor control modules and industrial PLC backplanes. |
| Propagation Delay | 17 ns typical - ensures deterministic timing for time-critical closed-loop control with sub-microsecond latency budgets. |
| Package | SOIC-16 extra-wide body (DWW), 10.3 mm × 14.0 mm - provides >14.5 mm creepage/clearance for reinforced insulation compliance at 2000 VRMS working voltage. |
Pinout & Package
ISO7820LLDWW uses a 16-pin SOIC extra-wide body (DWW) package with creepage and clearance >14.5 mm, optimized for reinforced isolation at 2000 VRMS working voltage. The isolation barrier separates side 1 (input) and side 2 (output), each with dedicated power and ground pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INA+, INA− | Differential LVDS input, Channel A | Accepts 100–600 mV differential signals from upstream LVDS source; common-mode range adapts to VCC1 (2.25–5.5 V). |
| INB+, INB− | Differential LVDS input, Channel B | Second forward LVDS input pair; electrically isolated from Channel A and side 2 circuitry. |
| OUTA+, OUTA− | Differential LVDS output, Channel A | Drives 100-Ω terminated bus with 250–450 mV differential swing and 1.125–1.375 V common-mode voltage. |
| OUTB+, OUTB− | Differential LVDS output, Channel B | Second forward LVDS output; independent of Channel A timing and load conditions. |
| VCCI, GNDI | Input-side power and ground | Supplies LVDS receivers and input logic; must be decoupled locally; not connected to VCCO/GNDO. |
| VCCO, GNDO | Output-side power and ground | Supplies LVDS transmitters and output logic; galvanically isolated from VCCI/GNDI; requires separate regulation. |
| EN1, EN2 | Channel enable inputs | Active-high enables respective output channels; high-impedance state when low; internal pull-up eliminates external biasing. |
| NC | No connect | Pin 7 is unconnected - must remain floating; no internal connection or function. |
Key Features
| Feature | Design Value |
|---|---|
| Reinforced Isolation Certification | 8000-VPK transient withstand and 2000-VRMS working voltage per VDE V 0884-10 and UL 1577 - qualifies for safety-critical motor drive and medical isolation barriers. |
| Low Power at 100 Mbps | Typical 4.5 mA on side 1 and 14.2 mA on side 2 at 5 V - reduces thermal load in densely packed gate driver PCBs. |
| High CMTI | ±100 kV/μs minimum - prevents data errors during 1200-V IGBT switching events with <10 ns edge rates. |
| LVDS Compliance | Fully compliant with TIA/EIA-644-A - ensures interoperability with standard FPGA, ASIC, and microcontroller LVDS PHYs without level-shifting. |
| Long Isolation Life | Projected >40 years at 2000 VRMS working voltage (DWW package) - supports 15-year industrial product lifecycles with margin. |
Applications
| Motor Control Inverter | Industrial PLC Backplane |
|---|---|
Use Scenario: Isolating encoder feedback and PWM command signals between MCU and three-phase IGBT gate drivers in servo inverters. IC Role / Device Role / Timing Role: Dual forward LVDS buffer transmitting position data and control commands across reinforced isolation barrier with <25 ns total propagation delay. Use Value: Enables precise torque control at 20-kHz switching frequencies while rejecting >100 kV/μs transients from power stage dv/dt. |
Use Scenario: Interfacing distributed I/O modules to central controller over isolated LVDS backplane in harsh factory environments. IC Role / Device Role / Timing Role: Bidirectional-capable (forward-only) LVDS isolator maintaining signal integrity across 1-meter backplane traces with 100 Mbps throughput. Use Value: Eliminates ground loops and common-mode noise coupling between modules, reducing bit error rate below 1E-12. |
| Medical Imaging System | Test & Measurement Equipment |
Use Scenario: Isolating high-speed digital video streams from X-ray detector arrays to processing units in MRI-compatible imaging systems. IC Role / Device Role / Timing Role: Forward LVDS isolator preserving pixel clock timing and data validity across patient-connected and non-patient-connected domains. Use Value: Meets 2 MOPP patient protection requirement per IEC 60601-1 and supports 12-bit, 60-MHz image data transfer. |
Use Scenario: Connecting isolated analog front-end ADCs to FPGA-based digital signal processors in portable oscilloscopes and spectrum analyzers. IC Role / Device Role / Timing Role: Low-jitter LVDS isolator delivering <1 ns peak-to-peak jitter for accurate time-domain sampling at 100 Msps. Use Value: Maintains signal fidelity for sub-picosecond timing resolution without adding deterministic jitter to measurement chain. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated LVDS buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISO7821LLDWW | One forward + one reverse channel vs. ISO7820LLDWW's two forward channels; identical isolation rating, CMTI, and speed. | Suitable for bidirectional LVDS links (e.g., sensor readback + configuration write); not drop-in for dual-forward topologies. | Select ISO7821LLDWW only when reverse-channel capability is required; pinout differs for INB/OUTB assignments. |
| ADN4651BRSZ | Single-channel, 100 Mbps, 5 kV RMS reinforced isolation; lower CMTI (±50 kV/μs); different pinout and enable logic (active-low). | Requires two devices for dual-channel operation; less robust against fast transients in motor drive EMI environments. | Use ADN4651BRSZ only in space-constrained single-channel designs where TI's dual-channel integration is unnecessary. |
Compared with ISO7821LLDWW, ISO7820LLDWW provides dedicated forward-only routing essential for asymmetric control/data paths, while ADN4651BRSZ trades channel density and CMTI for Analog Devices' proprietary architecture and qualification profile.
Availability
ISO7820LLDWW is available at Aetrix Electronics and suitable for motor control inverters, industrial PLC backplanes, medical imaging subsystems, and test equipment requiring stable component supply with long-term lifecycle assurance.
Supply support for ISO7820LLDWW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-reliability interface solutions for industrial, automotive, and medical markets.
The ISO782xLL family was designed specifically for high-noise, safety-critical applications demanding reinforced isolation, ultra-high CMTI, and LVDS compatibility - targeting motor drives, programmable logic controllers, and diagnostic imaging equipment.
FAQ
What is the isolation rating of ISO7820LLDWW and which standards does it meet?
The ISO7820LLDWW provides 8000-VPK reinforced isolation with certification planned per DIN V VDE V 0884-10 (2828 VPK repetitive peak), UL 1577 (5700 VRMS for 1 minute), and CSA/IEC 60950-1. Its DWW package achieves 2000 VRMS working voltage and >14.5 mm creepage, making ISO7820LLDWW suitable for Class I medical and industrial safety applications requiring dual protection.
How does ISO7820LLDWW differ from ISO7821LLDWW in functionality and pinout?
ISO7820LLDWW implements two forward-direction LVDS channels, while ISO7821LLDWW has one forward and one reverse channel. Pin assignments differ: INB+/INB− and OUTB+/OUTB− are swapped between the two variants. ISO7820LLDWW cannot substitute for ISO7821LLDWW in bidirectional links, and vice versa - both share identical isolation specs, CMTI, and speed, but channel directionality is fixed per device.
What are the supply voltage requirements for ISO7820LLDWW on each side of the isolation barrier?
ISO7820LLDWW supports independent 2.25 V to 5.5 V supplies on both sides: VCCI/GNDI powers the input-side LVDS receivers, and VCCO/GNDO powers the output-side transmitters. Operation at 3.3 V on both sides is typical, but mixed-voltage operation (e.g., 2.5 V input, 5 V output) is permitted and specified across the full range - ISO7820LLDWW maintains LVDS compliance and timing performance regardless of VCC combination.
Does ISO7820LLDWW require external termination resistors for LVDS operation?
ISO7820LLDWW expects 100-Ω differential termination at the far end of the LVDS line - this resistor is external and must be placed at the receiver (not inside ISO7820LLDWW). The device itself presents ~10 pF output capacitance and drives standard LVDS loads; no on-die termination is provided. Proper PCB layout with controlled 100-Ω differential impedance and point-to-point routing is required to maintain signal integrity at 100 Mbps.
What is the operating temperature range for ISO7820LLDWW and how is it validated?
ISO7820LLDWW is specified for –55°C to +125°C ambient temperature, with full electrical performance guaranteed across this range. Thermal derating curves in the datasheet confirm safe operation up to 125°C junction temperature under defined power dissipation limits. This range is validated per JEDEC JESD22-A108 and supported by lifetime projections exceeding 40 years at maximum rated working voltage - ISO7820LLDWW is qualified for under-hood automotive and industrial control cabinet deployment.
ISO7820LLDWW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.551", 14.00mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- LVDS
- Isolated Power:
- No
- Number of Channels:
- 2
- Inputs - Side 1/Side 2:
- 2/0
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 5700Vrms
- Common Mode Transient Immunity (Min):
- 100kV/µs
- Data Rate:
- 100Mbps
- Propagation Delay tpLH / tpHL (Max):
- 25ns, 25ns
- Pulse Width Distortion (Max):
- 4.5ns
- Rise / Fall Time (Typ):
- 1.38ns, 1.38ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -55°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
ISO7820LLDWW FAQ
1.How can I place an order for ISO7820LLDWW through Aetrix?
Please submit a Request for Quotation (RFQ) for ISO7820LLDWW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISO7820LLDWW reliable?
The price and inventory of ISO7820LLDWW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISO7820LLDWW is usually 5 days.
3.What payment methods are accepted for ISO7820LLDWW?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISO7820LLDWW transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISO7820LLDWW?
ISO7820LLDWW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISO7820LLDWW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISO7820LLDWW?
For technical support, including ISO7820LLDWW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISO7820LLDWW requirements.
6.How does Aetrix verify that ISO7820LLDWW is sourced from the original manufacturer or authorized distributors?
All ISO7820LLDWW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISO7820LLDWW meets industry standards.
7.What is the process for return or replacement of ISO7820LLDWW?
All ISO7820LLDWW units undergo pre-shipment inspection (PSI). If there is an issue with ISO7820LLDWW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISO7820LLDWW part is unused and in its original packaging.
Return procedure for ISO7820LLDWW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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