STMicroelectronics ISOSD61LTR

Overview

ISOSD61LTR from STMicroelectronics is a galvanically isolated second-order sigma-delta modulator with ±320 mV full-scale analog input range, 16-bit resolution (no missing codes), 86 dB typical SNR, and 25 Msps data rate. It delivers high-accuracy current/voltage sensing across the isolation barrier in high-voltage power conversion stages such as solar inverters and EV chargers.

For engineers reviewing the ISOSD61LTR datasheet, ISOSD61LTR pinout, ISOSD61LTR application, or ISOSD61LTR equivalent, this page provides verified technical context, LVDS/TTL interface options, isolation safety certifications (IEC 60747-17, UL 1577), real-world CMTI (30 kV/µs), and design-critical timing specs for SINC3 decimation.

Technical Context

The ISOSD61LTR implements an embedded transformer-coupled isolation barrier separating the high-voltage analog front-end (VIN+, VIN−, VDDISO, GNDISO) from the low-voltage digital I/O side (MCLKIN, MDAT, VDD, GND). Its second-order sigma-delta modulator digitizes differential inputs into a 1-bit stream synchronized to an external 5–25 MHz clock.

Digital output supports dual signaling modes: LVDS (ISOSD61L variant) with 240–420 mV differential swing and ±25 mV hysteresis, or single-ended TTL/CMOS (ISOSD61 variant) with VIH ≥ 2 V (3.3 V supply) and VOL ≤ 0.02 V. The modulator requires external SINC3 filtering to reconstruct 13-bit ENOB data at 256× decimation.

Key Specifications

Pinout & Package

ISOSD61LTR is housed in a SO-16 wide (SO16W) package with 10.35–10.41 mm body width, 7.52–7.58 mm body length, and 2.36–2.50 mm height. Creepage and clearance between input/output sides are ≥8 mm, satisfying IEC 60664-1 Overvoltage Category II–IV requirements.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar isolated sigma-delta modulator applications.

Compared with AMC1305L25DWVR and AD7403BRIZ-RL7, ISOSD61LTR uniquely combines 25 Msps LVDS output, 30 kV/µs CMTI, and IEC 60747-17 certification - making it the only option qualified for high-reliability, high-dV/dt applications like 1500 V solar inverters and 800 V EV fast chargers.

Availability

ISOSD61LTR is available at Aetrix Electronics and suitable for industrial motor control, solar inverter, and electric vehicle charger designs requiring stable component supply, long-term lifecycle support, and certified reinforced isolation.

Supply support for ISOSD61LTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog/mixed-signal products for industrial, automotive, and consumer markets.

The ISOSD61LTR belongs to ST's high-accuracy isolated sensing portfolio, engineered specifically for next-generation power conversion systems demanding reinforced isolation, high CMTI, and seamless integration with FPGA/MCU-based SINC3 decimation.

FAQ

What is the minimum recommended external clock frequency for ISOSD61LTR?

The ISOSD61LTR supports a minimum external clock frequency of 5 MHz, as specified in Table 9 of DS13605 Rev 11. Operation below this frequency degrades SNR and ENOB due to increased quantization noise folding; for optimal 13-bit ENOB performance, use ≥10 MHz with SINC3 filtering at OSR=256.

Can ISOSD61LTR be used with a single-ended microcontroller interface?

No - ISOSD61LTR is the LVDS variant (as indicated by the "L" suffix and confirmed in Figure 2 and Table 1). It requires an LVDS-capable receiver (e.g., Xilinx Artix-7 FPGA or STM32H7 with LVDS PHY). For single-ended TTL/CMOS interfacing, use ISOSD61TR instead, which has MDAT and MCLKIN pins without differential pairs.

How does the 30 kV/µs CMTI spec translate to real-world layout requirements?

A 30 kV/µs CMTI rating means the device tolerates rapid common-mode transients without data corruption - but only if PCB layout maintains ≥8 mm creepage/clearance, avoids shared ground planes across isolation boundaries, and uses symmetrical analog routing. Failure to meet these layout rules invalidates the CMTI guarantee, regardless of device capability.

Is external RC filtering mandatory on VIN+ and VIN− inputs?

Yes - per Section 5.1 of DS13605, an external anti-aliasing RC filter is mandatory. The cutoff must be <½ × f_MCLKIN (e.g., <12.5 MHz for 25 MHz clock); resistor values should be ≤10 Ω to minimize voltage drop from switched-capacitor input current, and capacitors ≥330 nF to absorb charge injection spikes.