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onsemi J112RL1G
- Part No.:
- J112RL1G
- Manufacturer:
- onsemi
- Category:
- JFETs
- Package:
- TO-226-3, TO-92-3 Long Body, Formed Leads
- Datasheet:
-
J112RL1G.pdf
- Description:
- JFET N-CH 35V TO92
- Quantity:
- Payment:
- Shipping:
Inventory:8,035
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Product details
Overview
J112RL1G from onsemi is an N-channel depletion-mode JFET chopper transistor optimized for low-noise analog switching and precision DC-coupled amplifier front-ends, with VGS(off) = −1.0 to −5.0 V, IDSS = 5.0–20 mA, rDS(on) ≤ 50 Ω, Cdg(off) = 5.0 pF, and TO-92 package. It serves as a high-impedance, low-leakage switch in instrumentation-grade signal paths.
For engineers reviewing the J112RL1G datasheet, pinout, applications, or equivalent options, this device is selected for ultra-low gate leakage (IGSS ≤ −1.0 nA), tight VGS(off) tolerance, and stable rDS(on) across temperature - critical for chopper-stabilized op-amp bias networks and zero-drift sensor interfaces.
Technical Context
This JFET operates in depletion mode with fixed channel conduction at VGS = 0 V and requires negative gate bias to pinch off. Its gate-source breakdown voltage is rated at −35 V, and gate reverse current remains below −1.0 nA at −15 V, enabling reliable operation in high-impedance feedback loops.
Switching behavior is governed by Cdg(off) and Csg(off) (both 5.0 pF), low rDS(on) (≤50 Ω), and sub-50 ns turn-off delay under RK = 0 condition. The device exhibits monotonic rDS(on) increase with rising channel temperature, supporting thermal stability in precision analog stages.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VGS(off) | −1.0 to −5.0 V - defines gate voltage range required to fully cut off drain current; enables precise threshold setting in chopper control circuits |
| IDSS | 5.0–20 mA - zero-gate-voltage drain current; determines small-signal transconductance and sets operating point in amplifier bias networks |
| rDS(on) | ≤50 Ω - on-state resistance at VDS = 0.1 V; ensures minimal signal attenuation and voltage drop in analog switch applications |
| IGSS | ≤ −1.0 nA at VGS = −15 V - gate reverse leakage; preserves high input impedance (>1012 Ω) in DC-coupled sensor front-ends |
| Cdg(off) | 5.0 pF - drain-gate capacitance under reverse-biased gate; limits feedthrough and improves isolation in fast-switching analog multiplexers |
| PD | 350 mW @ TA = 25°C - maximum power dissipation; supports continuous operation in compact PCB layouts without forced cooling |
Pinout & Package
Package: TO-92 (Case 29-11, Style 5), Pb-free, through-hole mounting with 2.54 mm lead pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - DRAIN | Main current output terminal | Connected to load or amplifier output; carries full ID; referenced to source for VDS measurement |
| 2 - SOURCE | Current return path and reference node | Typically tied to circuit ground or virtual ground; establishes VGS reference for gate control |
| 3 - GATE | Control electrode | High-impedance input requiring negative bias to modulate channel; isolated from drain/source by SiO2 interface |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low gate leakage | IGSS ≤ −1.0 nA ensures >1012 Ω input impedance, preserving signal integrity in electrometer-grade circuits |
| Tight VGS(off) distribution | −1.0 to −5.0 V range allows predictable cutoff behavior across production lots for matched-pair chopper designs |
| Low Cdg(off) and Csg(off) | Both 5.0 pF minimize capacitive coupling between control and signal paths, reducing crosstalk in multiplexed sensor arrays |
| Stable rDS(on) vs. temperature | Normalized rDS(on) varies <±15% from −65°C to +150°C, supporting operation in industrial ambient environments |
| Pb-free TO-92 packaging | RoHS-compliant construction with 300°C solderability rating, compatible with standard wave and hand-solder processes |
Applications
| Chopper-Stabilized Amplifiers | Precision Sensor Signal Conditioning |
|---|---|
|
Use Scenario: Used in the auto-zeroing switch network of a chopper-stabilized op-amp to periodically sample and null input offset voltage. IC Role / Device Role / Timing Role: JFET acts as a low-charge-injection, high-isolation analog switch synchronized with chopper clock phase. Use Value: IGSS ≤ −1.0 nA and Cdg(off) = 5.0 pF minimize residual offset and clock feedthrough, enabling sub-μV drift performance. |
Use Scenario: Front-end switch in a thermocouple or strain gauge measurement system where DC coupling and nanovolt-level resolution are required. IC Role / Device Role / Timing Role: JFET provides high-Z, low-leakage signal routing before programmable-gain instrumentation amplifier input. Use Value: VGS(off) tolerance and rDS(on) stability ensure consistent gain accuracy and long-term baseline stability over temperature. |
| Low-Noise Analog Multiplexers | DC-Coupled Oscilloscope Input Stages |
|
Use Scenario: Channel selector in a 16-channel medical EEG acquisition system requiring minimal inter-channel crosstalk and no AC coupling. IC Role / Device Role / Timing Role: JFET functions as a normally-on, gate-controlled transmission element in a passive multiplexer array. Use Value: 50 Ω rDS(on) and matched Cdg/off enable flat frequency response to 10 MHz and isolation >80 dB at 1 kHz. |
Use Scenario: Input protection and bias switching stage in a benchtop oscilloscope's 50 Ω/1 MΩ selectable input path. IC Role / Device Role / Timing Role: JFET isolates high-impedance probe path during 50 Ω termination mode while maintaining DC continuity. Use Value: −35 V VDG rating and 350 mW power handling support safe operation under transient overvoltage conditions up to ±30 V. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar JFET switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| J112RL1 | Pb-containing TO-92 package; identical electrical specs and pinout | No RoHS compliance; unsuitable for EU/China export or new medical designs | Select J112RL1G when Pb-free compliance is mandatory; otherwise J112RL1 offers same performance at lower cost |
| 2N5457 | VGS(off) = −0.5 to −5.0 V, IDSS = 1–5 mA, rDS(on) ≈ 60 Ω, Cdg(off) = 4.0 pF | Lower IDSS reduces transconductance; higher rDS(on) increases insertion loss in low-level signal paths | Choose 2N5457 only if tighter VGS(off) spread is not required and lower drive capability is acceptable |
Compared with J112RL1G, J112RL1 lacks RoHS compliance but matches all electrical parameters, while 2N5457 offers lower capacitance but reduced current drive and looser VGS(off) tolerance - making J112RL1G optimal for precision chopper and low-drift sensor interfaces.
Availability
J112RL1G is available at Aetrix Electronics and suitable for chopper-stabilized amplifiers, precision sensor signal conditioning, low-noise analog multiplexers, and DC-coupled oscilloscope input stages requiring stable component supply and long-lifecycle support.
Supply support for J112RL1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power, analog, sensor, and connectivity solutions for automotive, industrial, and cloud infrastructure markets.
J112RL1G belongs to the legacy JFET Chopper Transistor product line, designed specifically for ultra-low-leakage, high-impedance analog switching in precision instrumentation and zero-drift amplifier architectures.
FAQ
What is the gate-source cutoff voltage range for J112RL1G?
The gate-source cutoff voltage (VGS(off)) for J112RL1G is specified from −1.0 V to −5.0 V at ID = 1.0 μA and VDS = 5.0 V. This range reflects manufacturing variation and ensures predictable pinch-off behavior across units. Designers must verify biasing networks accommodate this full span to guarantee reliable cutoff in all J112RL1G units.
Can J112RL1G be used in surface-mount designs?
No - J112RL1G is exclusively offered in the through-hole TO-92 (Case 29-11) package with bent leads for axial insertion. It has no SMT variant. For surface-mount alternatives, consider the SOT-23 packaged MMBFJ112 or NSS40201MR6T1, though these differ in VGS(off), IDSS, and thermal derating.
What is the maximum allowable gate-source voltage for J112RL1G?
The absolute maximum gate-source voltage (VGS) for J112RL1G is −35 Vdc, per the "Maximum Ratings" table. Exceeding this risks irreversible gate oxide breakdown. In normal operation, gate bias should remain within −15 V to avoid accelerated aging, especially under elevated temperature or high-humidity conditions.
How does temperature affect the on-resistance of J112RL1G?
J112RL1G exhibits a positive temperature coefficient for rDS(on): normalized resistance increases ~1.4× from −65°C to +150°C (Figure 9). At 85°C, rDS(on) is approximately 20% higher than at 25°C. This behavior must be factored into gain stability calculations for temperature-sensitive analog switches.
Is J112RL1G suitable for audio signal switching applications?
Yes - J112RL1G is commonly used in high-fidelity audio mute and input selection circuits due to its low charge injection (<1 pC), absence of CMOS clock feedthrough, and negligible THD contribution. Its 5.0 pF Cdg(off) and 50 Ω rDS(on) support full-audio bandwidth (20 Hz–20 kHz) with <−100 dB crosstalk in properly laid-out PCBs.
J112RL1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- TO-226-3, TO-92-3 Long Body, Formed Leads
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Voltage - Breakdown (V(BR)GSS):
- 35 V
- Drain to Source Voltage (Vdss):
- -
- Current - Drain (Idss) @ Vds (Vgs=0):
- 5 mA @ 15 V
- Current Drain (Id) - Max:
- -
- Voltage - Cutoff (VGS off) @ Id:
- 1 V @ 1 µA
- Input Capacitance (Ciss) (Max) @ Vds:
- -
- Resistance - RDS(On):
- 50 Ohms
- Power - Max:
- 350 mW
- Operating Temperature:
- -65°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- TO-92 (TO-226)
J112RL1G FAQ
1.How can I place an order for J112RL1G through Aetrix?
Please submit a Request for Quotation (RFQ) for J112RL1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for J112RL1G reliable?
The price and inventory of J112RL1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for J112RL1G is usually 5 days.
3.What payment methods are accepted for J112RL1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for J112RL1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for J112RL1G?
J112RL1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your J112RL1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for J112RL1G?
For technical support, including J112RL1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your J112RL1G requirements.
6.How does Aetrix verify that J112RL1G is sourced from the original manufacturer or authorized distributors?
All J112RL1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that J112RL1G meets industry standards.
7.What is the process for return or replacement of J112RL1G?
All J112RL1G units undergo pre-shipment inspection (PSI). If there is an issue with J112RL1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The J112RL1G part is unused and in its original packaging.
Return procedure for J112RL1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
J112RL1G Tags
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MMBF4393LT1G
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MMBFJ112
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TF412ST5G
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