Texas Instruments JM38510/31401BEA
- Part No.:
- JM38510/31401BEA
- Manufacturer:
- Texas Instruments
- Category:
- Multivibrators
- Package:
- 16-CDIP (0.300", 7.62mm)
- Datasheet:
-
JM38510/31401BEA.pdf
- Description:
- RETRIGGERABLE MONOSTABLE MULTIVI
- Quantity:
- Payment:

- Shipping:

Inventory:2,540
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
JM38510/31401BEA from Texas Instruments is a retriggerable monostable multivibrator IC in the 54LS family, configured as a dual one-shot with independent A and B inputs per section, operating across –55°C to +125°C, with typical propagation delay of 25 ns at VCC = 5 V, and designed for precision timing control in radiation-tolerant military avionics systems.
For engineers reviewing the JM38510/31401BEA datasheet, JM38510/31401BEA pinout, JM38510/31401BEA application, or JM38510/31401BEA equivalent, this device delivers deterministic pulse-width generation with retriggering capability, TTL-compatible input thresholds, and CDIP-16 packaging qualified to MIL-PRF-38535 Class B standards.
Technical Context
The JM38510/31401BEA implements two independent retriggerable monostable multivibrators in a single 16-pin ceramic dual in-line package. Each section features separate trigger (A/B), reset (R), and output (Q/Q̅) terminals, with external RC timing networks determining pulse width.
It operates on a nominal 5-V supply, exhibits TTL-level input compatibility (VIH = 2.0 V min, VIL = 0.8 V max), and maintains stable timing over full military temperature range (–55°C to +125°C) without requiring external compensation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Function | Dual retriggerable monostable multivibrator - enables cascaded or synchronized pulse generation without output race conditions |
| Supply Voltage | 4.5 V to 5.5 V - ensures robust operation under MIL-STD-704 aircraft power bus transients |
| Propagation Delay | 25 ns typical at VCC = 5 V - supports sub-40-MHz timing control loop closure in digital subsystems |
| Output Drive | IOH = –0.4 mA / IOL = 8 mA - directly interfaces with TTL, LS, and standard CMOS logic families |
| Operating Temperature | –55°C to +125°C - certified for use in airborne, space-qualified, and ground-mobile military platforms |
| Package | CDIP (J) with 16 pins - hermetically sealed ceramic package meeting MIL-STD-883 test requirements |
| Timing Control | RC-settable pulse width (tw ≈ 0.33 × R × C) - allows field-adjustable delays from ~100 ns to >10 s with external components |
Pinout & Package
Ceramic Dual In-Line Package (CDIP), 16-pin, hermetically sealed, with 0.3-inch body width and 0.1-inch lead pitch. Pin 1 identified by notch or dot; leads are tin-lead (SNPB) finished, non-RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4, 5, 6, 10, 11, 12, 13, 14, 15 | Input/Output signal terminals | Section 1: Pins 1(A1), 2(B1), 3(R1), 4(Q1), 5(Q̅1); Section 2: Pins 13(A2), 12(B2), 11(R2), 10(Q2), 9(Q̅2); Pins 6 & 14 are GND; Pin 15 is VCC |
| 7, 8, 9 | Ground, unused, complement output | Pin 7 = GND; Pin 8 = NC (no internal connection); Pin 9 = Q̅2 (active-low output for Section 2) |
| 16 | Power supply | VCC = +5 V supply - requires local 0.1 µF ceramic decoupling adjacent to pin |
Key Features
| Feature | Design Value |
|---|---|
| Retriggerable operation | Allows new trigger pulses to extend current output pulse - eliminates missed events in high-jitter timing applications |
| Independent reset control | Asynchronous active-low reset per section enables precise forced termination of timing cycles |
| TTL-compatible inputs | VIH ≥ 2.0 V and VIL ≤ 0.8 V - ensures interoperability with legacy 5-V logic without level-shifting |
| Complementary outputs | Q and Q̅ available per section - simplifies interface to differential receivers or latch-enable logic |
| MIL-PRF-38535 Class B qualification | Full screening per Method 5005 - includes burn-in, temperature cycling, and lot acceptance testing for defense-critical use |
Applications
| Avionics Timing Synchronization | Radar Pulse Shaping |
|---|---|
Use Scenario: Generating precisely timed gate windows for analog-to-digital sampling during inertial measurement unit (IMU) data acquisition cycles. IC Role / Device Role / Timing Role: Dual monostable provides synchronized start/stop strobes for ADC conversion and memory write enable, with retriggering accommodating variable sensor update intervals. Use Value: Eliminates software-based timing jitter; pulse width stability <±1% over temperature ensures consistent sample window fidelity. |
Use Scenario: Conditioning transmit/receive timing in X-band pulse-Doppler radar front-ends where pulse repetition interval (PRI) varies dynamically. IC Role / Device Role / Timing Role: One-shot sections generate clean, jitter-free blanking pulses to suppress receiver front-end during high-power transmission bursts. Use Value: RC-tunable pulse width supports PRI ranges from 10 µs to 1 ms; retriggering prevents missed blanking during burst-mode operation. |
| Military Data Bus Arbitration | Secure Crypto Module Clock Gating |
Use Scenario: Enforcing deterministic bus access windows in MIL-STD-1553B remote terminal arbitration logic. IC Role / Device Role / Timing Role: Generates fixed-duration bus grant pulses triggered by priority encoder outputs, with retriggering accommodating back-to-back command transfers. Use Value: Propagation delay consistency (<5 ns variation) ensures predictable arbitration latency across temperature extremes. |
Use Scenario: Controlling clock delivery to AES-256 encryption engines only during active cipher operations to reduce EM side-channel leakage. IC Role / Device Role / Timing Role: Monostable triggers clock-enable signal upon crypto-start command, with retriggering extending enable duration if additional data blocks arrive before timeout. Use Value: Prevents clock glitches during key scheduling; complementary outputs drive both clock-gate and status monitoring logic simultaneously. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar retriggerable monostable multivibrator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SNJ54LS123J | Identical electrical specs and pinout; same CDIP-16 package but lacks JM38510 prefix and Class B screening documentation traceability | Approved for non-classified military programs where full QML-38535 certification is not mandated | Select SNJ54LS123J when cost sensitivity outweighs need for formal qualification records or extended reliability reporting |
| JM38510/31401BFA | Same die and functionality, but in CFP-16 (flatpack) instead of CDIP-16; identical temperature range and timing behavior | Better suited for high-vibration environments due to lower profile and welded lead construction | Choose JM38510/31401BFA when board-level shock/vibe compliance (e.g., MIL-STD-810H) drives package selection over socket compatibility |
Compared with SNJ54LS123J and JM38510/31401BFA, the JM38510/31401BEA uniquely combines QML-38535 Class B certification, CDIP-16 socket compatibility, and documented lot-level reliability data-making it the preferred choice for flight-critical timing functions requiring audit-ready pedigree.
Availability
JM38510/31401BEA is available at Aetrix Electronics and suitable for avionics timing synchronization, radar pulse shaping, military data bus arbitration, and secure crypto module clock gating requiring stable component supply across extended temperature and long-lifecycle programs.
Supply support for JM38510/31401BEA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a U.S.-based semiconductor manufacturer specializing in analog, embedded processing, and high-reliability logic solutions for aerospace, defense, and industrial markets.
The JM38510/31401BEA belongs to TI's military-grade 54LS logic family, engineered specifically for deterministic timing in safety-critical systems where parameter stability, radiation tolerance, and process traceability are mandatory.
FAQ
What is the maximum operating frequency supported by the JM38510/31401BEA?
The JM38510/31401BEA does not operate at a fixed clock frequency; instead, it generates single pulses whose minimum repeat rate depends on external RC timing components. With typical propagation delay of 25 ns and minimum pulse width of ~30 ns, the practical maximum trigger rate is approximately 15 MHz under ideal conditions. The JM38510/31401BEA datasheet specifies no upper limit on input trigger frequency beyond timing network constraints.
Does the JM38510/31401BEA support non-retriggerable mode?
No, the JM38510/31401BEA is exclusively a retriggerable monostable multivibrator. Its architecture lacks an internal mode-select feature or external pin to disable retriggering. To achieve non-retriggerable behavior, external gating logic must inhibit subsequent triggers until the current pulse completes - a technique documented in TI Application Report AB-17 for SN54/74LS123 family devices. The JM38510/31401BEA adheres strictly to this fixed functional definition.
Is the JM38510/31401BEA RoHS compliant?
No, the JM38510/31401BEA uses tin-lead (SNPB) lead finish and is explicitly marked "No" for RoHS compliance in TI's official packaging addendum. It is manufactured to MIL-PRF-38535 requirements, which permit Pb-based finishes for enhanced solder joint reliability in high-reliability applications. Alternate RoHS-compliant versions such as SN74LS123DR exist but lack military qualification and temperature range.
What is the purpose of Pin 8 (NC) on the JM38510/31401BEA?
Pin 8 on the JM38510/31401BEA is designated No Connect (NC) - it has no internal connection to the silicon die and must remain unconnected in circuit layout. TI's SDLS043 datasheet confirms this pin serves only mechanical alignment and thermal mass balancing in the CDIP-16 package. Routing or grounding Pin 8 may cause parasitic coupling or violate MIL-STD-883 mechanical test requirements for the JM38510/31401BEA.
Can the JM38510/31401BEA be used with capacitors larger than 1000 pF in the timing network?
Yes, the JM38510/31401BEA supports timing capacitors up to at least 10 µF, as verified in TI's SDLS043 datasheet Figure 5 and application note AB-17. Larger capacitors extend pulse width linearly (tw ≈ 0.33 × R × C) but require careful selection of low-leakage dielectric types (e.g., C0G/NP0 ceramic or film) to maintain accuracy over temperature and time. The JM38510/31401BEA's internal discharge transistor remains effective across this full range.
JM38510/31401BEA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 54LS
- Package/Case:
- 16-CDIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Logic Type:
- Monostable
- Independent Circuits:
- 2
- Schmitt Trigger Input:
- No
- Propagation Delay:
- 34 ns
- Current - Output High, Low:
- 4mA, 400µA
- Voltage - Supply:
- 4.5 V ~ 5.5 V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-CDIP
JM38510/31401BEA FAQ
1.How can I place an order for JM38510/31401BEA through Aetrix?
Please submit a Request for Quotation (RFQ) for JM38510/31401BEA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for JM38510/31401BEA reliable?
The price and inventory of JM38510/31401BEA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for JM38510/31401BEA is usually 5 days.
3.What payment methods are accepted for JM38510/31401BEA?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for JM38510/31401BEA transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for JM38510/31401BEA?
JM38510/31401BEA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your JM38510/31401BEA order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for JM38510/31401BEA?
For technical support, including JM38510/31401BEA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your JM38510/31401BEA requirements.
6.How does Aetrix verify that JM38510/31401BEA is sourced from the original manufacturer or authorized distributors?
All JM38510/31401BEA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that JM38510/31401BEA meets industry standards.
7.What is the process for return or replacement of JM38510/31401BEA?
All JM38510/31401BEA units undergo pre-shipment inspection (PSI). If there is an issue with JM38510/31401BEA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The JM38510/31401BEA part is unused and in its original packaging.
Return procedure for JM38510/31401BEA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
JM38510/31401BEA Tags

-
SN74LVC1G123DCUR
Texas Instruments
-
CD4047BM96
Texas Instruments

-
SN74LVC1G123DCTR
Texas Instruments
-
CD74HC221M96
Texas Instruments

-
CD14538BE
Texas Instruments

-
SN74LVC1G123YZPR
Texas Instruments

-
SN74LVC1G123DCUT
Texas Instruments
-
MC14538BDR2G
onsemi

-
74VHC123AMX
onsemi

-
LTC6993CS6-2#TRMPBF
Analog Devices Inc.

-
LTC6993CS6-3#TRMPBF
Analog Devices Inc.

-
LTC6993CS6-1#TRMPBF
Analog Devices Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

