STMicroelectronics JTS393C-1AA5

Overview

JTS393C-1AA5 from STMicroelectronics is a micropower dual CMOS voltage comparator in unsawn 6-inch wafer form, designed for ultra-low-power sensing and threshold-detection circuits. It delivers 9 µA typical supply current per comparator, 2.5 µs typical response time at 5 mV overdrive, and 1 pA typical input bias current, enabling battery-powered sensor interfaces and precision level-shift detection in portable instrumentation.

For engineers reviewing the JTS393C-1AA5 datasheet, JTS393C-1AA5 pinout, JTS393C-1AA5 application, or JTS393C-1AA5 equivalent, key selection criteria include micropower operation below 10 µA/comparator, rail-to-rail input common-mode range including ground, open-drain output compatibility with 3–16 V single-supply systems, and wafer-level integration for custom die bonding.

Technical Context

The JTS393C-1AA5 implements two independent CMOS comparators on a single silicon die, each featuring picoampere-level input bias current and input offset voltage ≤6.5 mV across 0–70 °C. Its open-drain outputs support wired-OR logic and flexible pull-up configurations up to 16 V.

Designed for unsawn wafer use, it lacks molded packaging and requires die attach and wire bonding. The pad layout supports standard flip-chip or wire-bond assembly, with 109 µm × 109 µm bond pads spaced on a 1326 µm × 926 µm die excluding scribe lines.

Key Specifications

Pinout & Package

Package: Unsawn 6-inch silicon wafer, die size 1326 µm × 926 µm, scribe line width 60 µm, bond pad opening 109 µm × 109 µm.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual micropower comparator applications.

Compared with TS393CDT, JTS393C-1AA5 enables custom die integration and saves board space, while JTS3702C-1AA5 trades open-drain flexibility for push-pull speed and reduced BOM count - choice depends on assembly method and output topology requirements.

Availability

JTS393C-1AA5 is available at Aetrix Electronics and suitable for portable instrumentation, battery-powered sensor nodes, and industrial thermistor monitoring requiring stable component supply across wafer-level production cycles.

Supply support for JTS393C-1AA5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering automotive, industrial, power, and microcontroller solutions with vertical manufacturing and broad IP portfolio.

The JTS393 series belongs to ST's precision analog comparators product line, engineered specifically for ultra-low-power sensing applications where nanowatt-level standby current and picocurrent input fidelity are mandatory design constraints.

FAQ

What is the maximum allowable supply voltage for JTS393C-1AA5?

The absolute maximum supply voltage is 18 V between VCC+ and VCC− terminals, but the recommended operating range is 2.7 V to 16 V for single-supply use or ±1.35 V to ±8 V for dual-supply configurations. Exceeding 16 V risks exceeding specified electrical characteristics and may accelerate parametric drift over temperature.

Does JTS393C-1AA5 require external hysteresis for stable switching?

No external hysteresis is required for basic threshold detection, but it is recommended when input signals exhibit noise near the trip point. The device has no built-in hysteresis; designers implement it via positive feedback from output to non-inverting input using discrete resistors, leveraging the open-drain output structure and high input impedance.

Can JTS393C-1AA5 be used with a 1.8 V supply?

No - the minimum specified supply voltage is 2.7 V. At 1.8 V, internal CMOS stages fail to bias correctly, resulting in undefined output states, increased propagation delay (>10 µs), and potential latch-up. For 1.8 V systems, consider ST's TS881 or TLV3691, which are characterized down to 1.4 V.

How is the die orientation defined for wire bonding?

The pad coordinate origin is the lower-left corner of the die (X=0, Y=0). Pad 1 (Output 1) is located at (165 µm, 870.3 µm), and pads increase in X-direction left-to-right and Y-direction bottom-to-top. A top-view die photograph and pad map are provided in Figure 2 of the official datasheet (DocID025633 Rev 1, page 4).