NXP Semiconductors KMPC8347ECVRAGDB

Overview

KMPC8347ECVRAGDB from NXP Semiconductors (formerly Freescale) is a PowerQUICC™ II Pro integrated host processor featuring an embedded PowerPC e300 core operating up to 667 MHz, dual 10/100/1000-Mbps Ethernet controllers (TSECs), DDR SDRAM controller supporting 32-/64-bit interfaces at up to 333 MHz (TBGA), PCI 2.2 interface, and hardware security engine with AES-128/192/256, DES/3DES, SHA-1/256, and RSA acceleration. It targets network edge routers, industrial gateways, and secure embedded communications systems.

For engineers reviewing the KMPC8347ECVRAGDB datasheet, KMPC8347ECVRAGDB pinout, KMPC8347ECVRAGDB application, or KMPC8347ECVRAGDB equivalent, key selection criteria include its 667-MHz e300 core performance, dual TSEC compliance with IEEE 802.3z/802.3ac, DDR-1 timing support up to 333 MHz in TBGA package, PCI 2.2 host/agent mode flexibility, and integrated crypto-channel architecture for IPSec/SSL offload.

Technical Context

The KMPC8347ECVRAGDB implements a superscalar PowerPC e300 core with 32-Kbyte instruction and 32-Kbyte data L1 caches, lockable cache segments, and dynamic power management. Its DDR SDRAM controller supports programmable timing, four banks (up to 1 Gbyte each), ECC, page mode (16 open pages), and registered DIMM compatibility with 2.5-V SSTL2 I/O.

Two independent TSEC modules provide full-duplex GMII/RGMII/TBI/RTBI and MII interfaces, each with 2-Kbyte TX/RX FIFOs, jumbo frame (9.6 Kbyte) support, RMON statistics, and MII management. The security engine contains four crypto-channels, PKEU (RSA/ECC), DEU (DES/3DES), AESU (AES-128/192/256), AFEU (RC4), MDEU (SHA/MD5/HMAC), and RNG-all accessible via descriptor chains.

Key Specifications

Pinout & Package

KMPC8347ECVRAGDB is housed in a 620-pin TBGA package (27 mm × 27 mm, 1.0 mm pitch) with thermal pad, designed for high-density PCB layouts and thermal dissipation in networking equipment. Pin assignments follow the mechanical layout defined in MPC8347EEC Rev. 11 Section 18.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar integrated host processor applications.

Compared with KMPC8347ECVRAGDB, MPC8349ECVRAGDB offers higher CPU headroom within identical peripheral compatibility, while KMPC8379ECVRAGDB adds thermal robustness and crypto scalability-neither is pin-compatible, but all three share software and driver compatibility across the PowerQUICC II Pro ecosystem.

Availability

KMPC8347ECVRAGDB is available at Aetrix Electronics and suitable for network edge routers, industrial secure gateways, and enterprise VoIP gateways requiring stable component supply, long-term lifecycle support, and traceable sourcing for production programs.

Supply support for KMPC8347ECVRAGDB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company formed from the spin-off of Philips' semiconductor division, specializing in secure connectivity solutions for automotive, industrial, and networking markets.

KMPC8347ECVRAGDB belongs to the PowerQUICC™ II Pro product line, engineered for high-performance, low-power integrated host processing in carrier-grade and enterprise networking equipment with emphasis on hardware-accelerated security and multi-protocol I/O.

FAQ

What is the maximum DDR data rate supported by KMPC8347ECVRAGDB?

KMPC8347ECVRAGDB supports DDR-1 SDRAM at up to 333 MHz in the TBGA package, delivering 2.7 GB/s peak bandwidth on the 64-bit interface. This is confirmed in the MPC8347EEC Rev. 11 specification document Section 6, which specifies 333-MHz operation for TBGA variants and 266 MHz for PBGA. The controller implements programmable timing, ECC, and registered DIMM support to ensure signal integrity at this rate.

Does KMPC8347ECVRAGDB support PCIe or only PCI 2.2?

KMPC8347ECVRAGDB supports only PCI Specification Revision 2.2-not PCIe. Its PCI interface operates at 32 bits and up to 66 MHz, with host bridge and agent mode capabilities, parity, and selectable coherency. No PCIe physical layer or transaction layer functionality is implemented. Engineers designing new platforms requiring PCIe must select a successor architecture such as QorIQ or Layerscape.

What cryptographic algorithms are accelerated by the hardware security engine in KMPC8347ECVRAGDB?

The KMPC8347ECVRAGDB hardware security engine accelerates AES-128/192/256 (ECB/CBC/CTR/CCM), DES/3DES (ECB/CBC), SHA-1/256, MD5, HMAC-SHA/MD5, RSA up to 2048 bits, elliptic curve cryptography (F_p/F_2m), and RC4. These are implemented across four dedicated crypto-channels with programmable field sizes and descriptor-based command chaining, enabling concurrent algorithm execution without CPU overhead.

Is KMPC8347ECVRAGDB pin-compatible with MPC8343 or MPC8345?

No, KMPC8347ECVRAGDB is not pin-compatible with MPC8343 or MPC8345. While all belong to the PowerQUICC II Pro family, they differ in package type (620-pin TBGA vs. 484-pin PBGA), pin count, power domain allocation, and peripheral mapping. The MPC8347ECVRAGDB datasheet explicitly defines its unique 620-pin assignment in Section 18, and no cross-reference indicates mechanical or electrical pin equivalence with earlier variants.

What is the recommended power sequencing for KMPC8347ECVRAGDB?

The recommended power sequencing for KMPC8347ECVRAGDB is to apply the core supply (VDD = 1.2 V) before I/O supplies (GVDD = 2.5 V, LVDD/OVDD = 3.3 V), and assert PORESET prior to full ramp-up of all supplies. This minimizes active driving on I/O pins during power transition. The device does not mandate strict sequencing order between supplies, but early PORESET assertion prevents unintended I/O activity, as specified in MPC8347EEC Rev. 11 Section 2.2.