NXP Semiconductors KMPC8347EVRAGDB

Overview

KMPC8347EVRAGDB from Freescale Semiconductor is a PowerQUICC II Pro integrated host processor featuring an embedded PowerPC e300 core operating up to 667 MHz, dual 10/100/1000 Mbps Ethernet controllers (TSECs), DDR1/DDR2 SDRAM controller with ECC support, PCI 2.3 interface, and hardware security engine supporting AES-128/192/256, DES/3DES, SHA-1/224/256, and RSA up to 2048-bit - deployed in network gateways, industrial routers, and secure edge appliances.

For engineers reviewing the KMPC8347EVRAGDB datasheet, KMPC8347EVRAGDB pinout, KMPC8347EVRAGDB application, or KMPC8347EVRAGDB equivalent, this page delivers verified silicon revision 3.x specifications, TBGA-783 package mapping, DDR2 timing compliance at 1.8 V, TSEC RGMII/RTBI interface support, and validated alternative options for migration from legacy PowerQUICC II platforms.

Technical Context

The KMPC8347EVRAGDB implements a superscalar e300 core with 32 KB instruction and 32 KB data L1 caches (lockable portion), dynamic power management, and software compatibility across Power Architecture families. Its memory subsystem supports DDR1 (2.5 V SSTL2) and DDR2 (1.8 V SSTL2) with programmable timing, up to 4 banks × 1 GB, 32-/64-bit interfaces, and on-the-fly CKE-based power control.

Networking is handled by two independent TSEC modules compliant with IEEE 802.3, 802.3u, 802.3z, and 802.3ac, each with 2 KB TX/RX FIFOs, 9.6 KB jumbo frame support, RMON statistics, and MII management. The security engine integrates four crypto-channels with dedicated PKEU, DEU, AESU, MDEU, and RNG units for IPSec/SSL/TLS offload.

Key Specifications

Pinout & Package

KMPC8347EVRAGDB is housed in a 783-pin TBGA (Thin Ball Grid Array) package with 27 mm × 27 mm body size, 1.0 mm ball pitch, and thermal pad exposed on underside for heatsink attachment. Pin assignments follow Freescale's MPC8347EAEC Rev. 12 specification, Section 18.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar integrated host processor applications.

Compared with KMPC8347EVRAGDB, MPC8349EVRAGDB offers higher clock headroom within identical mechanical and thermal constraints, while QorIQ P1011NSE shifts to a newer architecture with PCIe and DDR3 but requires full hardware and firmware revalidation.

Availability

KMPC8347EVRAGDB is available at Aetrix Electronics and suitable for network edge routers, industrial firewalls, and secure remote terminal units requiring stable component supply across extended product lifecycles.

Supply support for KMPC8347EVRAGDB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Freescale Semiconductor (now part of NXP Semiconductors since 2015) designed high-performance Power Architecture processors for networking, automotive, and industrial markets.

The KMPC8347EVRAGDB belongs to the PowerQUICC II Pro family, engineered specifically for cost-sensitive, power-efficient integrated communications processors in carrier-grade and enterprise edge equipment.

FAQ

What is the confirmed silicon revision level supported by KMPC8347EVRAGDB?

KMPC8347EVRAGDB corresponds to revision 3.x silicon and later, as explicitly stated in Freescale's MPC8347EAEC Rev. 12 documentation. This revision enables full DDR2 SDRAM support, corrected TSEC timing margins, and validated security engine behavior - earlier revisions (1.1 and prior) are not covered by this part number's specification.

Does KMPC8347EVRAGDB support DDR2-800 (400 MHz data rate) operation?

Yes, KMPC8347EVRAGDB supports DDR2 data rates up to 400 MHz in TBGA package configurations, as confirmed in Section 6 of the MPC8347EAEC Rev. 12 spec. This requires GVDD = 1.8 V ±90 mV, matched trace lengths, and DLL lock times of 7680–122,880 csb_clk cycles depending on clock ratio.

What are the exact power supply sequencing requirements for KMPC8347EVRAGDB?

KMPC8347EVRAGDB requires VDD (core) to reach 90% of nominal value before any I/O supply (GVDD, LVDD, OVDD) exceeds 0.7 V, per Figure 4 in the datasheet. PORESET must be asserted before supplies ramp fully. I/O rails have no inter-rail sequencing order, but all must be stable before releasing reset.

Can KMPC8347EVRAGDB operate in PCI agent mode with external clock injection?

Yes, KMPC8347EVRAGDB supports PCI agent mode using PCI_SYNC_IN as the primary clock source. In this configuration, PORESET assertion timing is referenced to tPCI_SYNC_IN (not tCLKIN), and the device acts as a slave on the PCI bus - enabling integration into host systems with existing PCI backplanes.

Is hardware crypto acceleration in KMPC8347EVRAGDB limited to specific protocols?

No - KMPC8347EVRAGDB's security engine accelerates primitives (AES, DES, SHA, RSA, ECDSA, RC4, HMAC) rather than fixed protocols. It supports IPSec, SSL/TLS, SRTP, iSCSI, and IEEE 802.11i through software stacks that bind to the crypto-channel API, enabling flexible, standards-compliant implementation without firmware updates.