NXP Semiconductors KMPC8347EVVAJDB

Overview

KMPC8347EVVAJDB from Freescale Semiconductor is a PowerQUICC II Pro integrated host processor featuring an embedded PowerPC e300 core operating at up to 667 MHz, dual 10/100/1000 Mbps Ethernet controllers (TSEC), DDR1/DDR2 SDRAM memory controller with ECC support, PCI 2.3 interface, and hardware security engine supporting AES-256, DES/3DES, SHA-256, RSA-2048, and RC4. It targets networking gateways, industrial routers, and secure embedded communications systems.

For engineers reviewing the KMPC8347EVVAJDB datasheet, KMPC8347EVVAJDB pinout, KMPC8347EVVAJDB application, or KMPC8347EVVAJDB equivalent, this page delivers verified technical context on its e300 core timing, TSEC Ethernet compliance (IEEE 802.3z/ac), DDR2 1.8-V SSTL2 I/O, PCI 3.3-V 66-MHz operation, and hardware crypto-channel architecture - all confirmed for revision 3.x silicon and later.

Technical Context

The KMPC8347EVVAJDB implements a superscalar PowerPC e300 core with 32-KB instruction and 32-KB data L1 caches (lockable portion), dynamic power management, and software compatibility across Freescale's Power Architecture families. Its coherency system bus (CSB) operates at up to 333 MHz in TBGA package configurations.

It integrates dual TSEC controllers compliant with IEEE 802.3z (Gigabit), 802.3ac (VLAN tagging), and 802.3u (Fast Ethernet), each with 2-KB TX/RX FIFOs, RMON statistics, and MII/RGMII/TBI/RTBI physical layer support. The DDR2 SDRAM controller supports 64-bit interfaces at up to 400 MHz data rate, registered DIMMs, and on-the-fly CKE-based power management.

Key Specifications

Pinout & Package

KMPC8347EVVAJDB is housed in a 689-pin TBGA package (35 mm × 35 mm, 1.0-mm pitch) with thermal lid and standard JEDEC MO-251AC mechanical outline. Pin assignments follow Freescale's MPC8347EAEC Rev. 12 specification, with dedicated banks for DDR2 (GVDD-referenced), TSEC (LVDD-referenced), PCI (OVDD-referenced), and core logic (VDD/AVDD).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar integrated host processor applications.

Compared with KMPC8347EVVAJDB, MPC8349EVRAGDB trades one TSEC for PCIe and USB OTG, while LS1023A replaces PowerPC with ARM and shifts crypto burden to software - making KMPC8347EVVAJDB uniquely suited for legacy Power Architecture migration paths requiring hardware-accelerated dual-Gigabit Ethernet and IPSec.

Availability

KMPC8347EVVAJDB is available at Aetrix Electronics and suitable for industrial routers, secure network gateways, and embedded media servers requiring stable component supply, long-lifecycle support, and validated thermal performance under continuous 667-MHz operation.

Supply support for KMPC8347EVVAJDB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Freescale Semiconductor (now part of NXP Semiconductors since 2015) designed high-performance Power Architecture processors for networking, automotive, and industrial markets, emphasizing integration, security, and real-time determinism.

KMPC8347EVVAJDB belongs to the PowerQUICC II Pro family, engineered specifically for cost-sensitive, power-efficient embedded networking applications requiring integrated Ethernet, security, and memory controllers - bridging legacy PowerPC infrastructure and next-generation packet processing.

FAQ

What is the maximum DDR2 data rate supported by KMPC8347EVVAJDB?

KMPC8347EVVAJDB supports DDR2 SDRAM at up to 400 MHz data rate in 64-bit configuration when implemented in the TBGA package. This corresponds to 3.2 GB/s peak bandwidth, enabled by its 1.8-V SSTL2-compatible I/O and programmable timing registers. The actual achievable rate depends on PCB layout, DRAM part selection, and GVDD stability within ±90 mV of 1.8 V.

Does KMPC8347EVVAJDB include hardware support for AES encryption?

Yes, KMPC8347EVVAJDB includes a dedicated Advanced Encryption Standard Unit (AESU) within its security engine that supports AES-128, AES-192, and AES-256 in ECB, CBC, CCM, and counter modes. This hardware acceleration is accessible via descriptor-based command chains and operates independently of the e300 core, enabling line-rate IPSec throughput without CPU overhead.

What package type and pin count does KMPC8347EVVAJDB use?

KMPC8347EVVAJDB uses a 689-ball TBGA package measuring 35 mm × 35 mm with 1.0-mm ball pitch and thermal lid. It is mechanically defined per JEDEC MO-251AC and features dedicated I/O banks for DDR2 (GVDD), TSEC (LVDD), PCI (OVDD), and core logic (VDD/AVDD), with pin assignments fully documented in MPC8347EAEC Rev. 12 Section 18.

Can KMPC8347EVVAJDB operate in both PCI host and agent modes?

Yes, KMPC8347EVVAJDB supports configurable PCI operation: in host mode, it drives CLKIN as the primary clock source and manages PCI bus arbitration; in agent mode, it synchronizes to PCI_SYNC_IN and functions as a peripheral device. Mode selection is controlled by CFG_PCI_HOST bit during reset, and both modes comply with PCI Specification Revision 2.3 at 33 or 66 MHz.

What is the function of the EC_GTX_CLK125 pin on KMPC8347EVVAJDB?

The EC_GTX_CLK125 pin on KMPC8347EVVAJDB outputs a 125 MHz reference clock for Gigabit Ethernet PHY devices operating in RGMII, GMII, or TBI modes. It meets ±150 ps jitter tolerance and is derived from the internal PLL/DLL circuitry - eliminating need for external clock synthesizers in TSEC-based designs and ensuring deterministic GTX clock alignment with transmit data.