NXP Semiconductors KMPC8347EVVAJFB

Overview

KMPC8347EVVAJFB from Freescale Semiconductor is a PowerQUICC II Pro integrated host processor featuring an embedded PowerPC e300 core operating at up to 667 MHz, dual 10/100/1000 Mbps Ethernet controllers (TSECs), DDR1/DDR2 SDRAM memory controller with ECC support, PCI 2.3 interface, and hardware security engine supporting AES-256, DES/3DES, SHA-256, RSA-2048, and RC4. It targets network edge routers, industrial gateways, and secure communications appliances.

For engineers reviewing the KMPC8347EVVAJFB datasheet, KMPC8347EVVAJFB pinout, KMPC8347EVVAJFB application, or KMPC8347EVVAJFB equivalent, key selection criteria include its 667-MHz e300 core performance, dual TSEC compliance with IEEE 802.3z/ac, DDR2-400 support in TBGA package, hardware-accelerated crypto throughput, and PCI host/agent mode flexibility.

Technical Context

The KMPC8347EVVAJFB implements a superscalar Power Architecture® e300 core with 32-KB instruction and 32-KB data L1 caches, lockable cache segments, and dynamic power management. Its memory subsystem integrates a programmable DDR1/DDR2 controller supporting 32-/64-bit interfaces, up to 4 banks, and on-the-fly power management via CKE.

Networking is handled by two independent TSEC modules compliant with IEEE 802.3z (Gigabit), 802.3ac (QoS), and RGMII/RTBI physical interfaces, each with 2-KB TX/RX FIFOs and jumbo frame support. The security engine contains four crypto-channels with dedicated AESU, DEU, PKEU, MDEU, and RNG units for IPSec/SSL offload.

Key Specifications

Pinout & Package

KMPC8347EVVAJFB is housed in a 689-pin thin quad flat no-lead (TBGA) package with 19 mm × 19 mm body size and 1.0 mm ball pitch. Thermal pad on underside requires solder paste stencil design per IPC-7351B.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar integrated host processor applications.

Compared with MPC8349EVRAGDB, KMPC8347EVVAJFB provides dual TSECs essential for network segmentation, while LS1023A offers higher compute density and updated security primitives but mandates DDR3 migration and drops PCI compatibility - making KMPC8347EVVAJFB optimal for cost-sensitive, PCI-dependent, dual-Ethernet industrial upgrades.

Availability

KMPC8347EVVAJFB is available at Aetrix Electronics and suitable for network edge routers, industrial protocol gateways, and secure wireless access points requiring stable component supply across extended product lifecycles.

Supply support for KMPC8347EVVAJFB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Freescale Semiconductor (now part of NXP Semiconductors since 2015) designed high-performance Power Architecture processors for networking, automotive, and industrial control applications.

The KMPC8347EVVAJFB belongs to the PowerQUICC II Pro family, engineered specifically for cost-sensitive, secure, and highly integrated communications infrastructure where PCI legacy support, dual Gigabit Ethernet, and hardware crypto acceleration are critical.

FAQ

What is the maximum DDR2 data rate supported by KMPC8347EVVAJFB?

KMPC8347EVVAJFB supports DDR2 data rates up to 400 MHz in the TBGA package variant, corresponding to DDR2-400 operation with a 200 MHz clock. This is confirmed in Section 6 of the MPC8347EA Hardware Specifications (Rev. 12), which specifies "up to 400 MHz data rate for TBGA" under the DDR/DDR2 SDRAM controller features. The PBGA variant is limited to 266 MHz.

Does KMPC8347EVVAJFB support both DDR1 and DDR2 memory simultaneously?

No, KMPC8347EVVAJFB does not support simultaneous DDR1 and DDR2 operation. Its memory controller is configurable for either DDR1 (2.5 V SSTL2 I/O) or DDR2 (1.8 V SSTL2 I/O) in a given design, as stated in the Overview section: "Programmable timing supporting DDR1 and DDR2 SDRAM". Voltage domain separation (GVDD = 2.5 V or 1.8 V) and timing register settings require board-level commitment to one standard.

What crypto algorithms are accelerated in hardware by KMPC8347EVVAJFB?

KMPC8347EVVAJFB's integrated security engine accelerates AES-128/192/256 (ECB/CBC/CTR/CCM), DES/3DES (ECB/CBC), SHA-1/224/256, MD5, HMAC-SHA/MD5, RSA-2048, Diffie-Hellman, elliptic curve cryptography (F2m/Fp), and RC4. These are explicitly listed in the Overview section under "Security engine" and verified in Section 4 of the reference manual.

Is KMPC8347EVVAJFB pin-compatible with other MPC8347x variants?

KMPC8347EVVAJFB is pin-compatible with other MPC8347E variants in the same TBGA package (e.g., MPC8347EVVAJFA), as confirmed by identical pin listings in Section 18 of the Hardware Specifications. However, it is not pin-compatible with PBGA variants (e.g., MPC8347EVRAGDB) due to differing ball maps and thermal pad configurations.

What is the required power-up sequencing for KMPC8347EVVAJFB?

KMPC8347EVVAJFB requires core voltage (VDD/AVDD) to reach 90% of nominal value before I/O supplies (GVDD/LVDD/OVDD) rise above 0.7 V, as specified in Section 2.2.1. This prevents I/O contention and excessive current draw (3–5 A). PORESET must be asserted before power supplies fully ramp, and no specific ordering is required among GVDD, LVDD, and OVDD themselves.