STMicroelectronics L4981A
- Part No.:
- L4981A
- Manufacturer:
- STMicroelectronics
- Category:
- PFC (Power Factor Correction)
- Package:
- 20-DIP (0.300", 7.62mm)
- Datasheet:
-
L4981A.pdf
- Description:
- IC PFC CTR AV CURR 100KHZ 20DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
L4981A from STMicroelectronics is a fixed-frequency average-current-mode PWM controller IC for active power factor correction (PFC) in boost pre-regulator topologies. It delivers up to 0.99 power factor, limits line current THD to <5%, supports universal AC input (85–265 VAC), integrates a 5.1 V ±2% reference, and features a totem-pole gate driver capable of >1 A peak output for driving MOSFETs or IGBTs in industrial and telecom power supplies.
For engineers reviewing the L4981A datasheet, L4981A pinout, L4981A application, or L4981A equivalent, this device is selected for high-efficiency AC-DC front-end designs requiring precise line-current shaping, programmable UVLO, overvoltage/overcurrent protection, and stable operation across wide temperature and load ranges without slope compensation.
Technical Context
The L4981A implements an analog multiplier-based average current mode control architecture that generates a sinusoidal current reference proportional to rectified line voltage (via VRMS pin) and load condition (via LFF pin), enabling distortion-free input current draw. Its internal error amplifier regulates boost output voltage via feedback at VFEED, while the CA-OUT and MULT-OUT pins interface with external RC networks to set loop gain and stability.
It operates at a fixed switching frequency set by ROSC and COSC (typ. 100 kHz), uses a dedicated IPK pin for peak current limiting with resistor-programmable threshold, and includes integrated protections: programmable UVLO with hysteresis, overvoltage detection at OVP (5.1 V threshold), and cycle-by-cycle overcurrent sensing referenced to ISENSE. Startup current is 0.3 mA typical.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Power Factor | Up to 0.99 - enables compliance with IEC 61000-3-2 Class D harmonic limits for >75 W equipment. |
| THD Limit | <5% line current distortion - ensures low harmonic injection into mains under full-load conditions. |
| Reference Voltage | 5.1 V ±2% - provides precision voltage feedback reference externally accessible at VREF pin for stable regulation. |
| Gate Driver Output | 1 A sink / 1.5 A source peak - directly drives power MOSFET gates without external buffer in 200–400 W PFC stages. |
| Startup Current | 0.3 mA typ. - minimizes auxiliary supply burden during initial power-up and improves system efficiency at light load. |
| UVLO Threshold | Programmable 10.6–13.4 V turn-on (via R-divider on Pin 15) - allows custom brown-out response for varying bulk capacitor charge profiles. |
| Oscillator Frequency | 85–115 kHz (typ. 100 kHz) - balances EMI performance, magnetics size, and conduction losses in boost inductor design. |
| Operating Temp | –40°C to +125°C ambient - supports deployment in enclosed industrial power supplies and telecom rectifiers. |
Pinout & Package
Available in DIP20 and SO20 packages using MultiPower BCD 60II technology. Thermal resistance is 80°C/W (DIP20) and 120°C/W (SO20).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | P-GND | Power ground return for gate driver and high-current internal circuits; separate from signal ground (Pin 10). |
| 2 | IPK | Peak current limit programming input; sets overcurrent trip threshold via resistor to sense resistor or reference (Pin 11). |
| 3 | OVP | Overvoltage protection comparator input; compares boost output (via divider) against internal 5.1 V reference. |
| 4 | IAC | AC current sensing input; receives current proportional to rectified line voltage for multiplier-based reference generation. |
| 5 | CA-OUT | Current amplifier output; connects to external RC network to set current-loop bandwidth and phase margin. |
| 6 | LFF | Load feedforward input; adjusts current reference dynamically with load changes to improve transient response. |
| 7 | VRMS | RMS line voltage sensing input; accepts filtered DC voltage proportional to input AC RMS for line-voltage feedforward. |
| 8 | MULT-OUT | Multiplier output node; high-impedance junction of multiplier and current amplifier inputs; requires clamp to avoid negative swing. |
| 9 | ISENSE | Inverting input of current amplifier; connected to shunt resistor to close average current control loop. |
| 10 | S-GND | Signal ground reference for error amplifier, reference, and low-noise analog circuitry; isolated from power ground. |
| 11 | VREF | 5.1 V ±2% precision reference output; supplies bias to external resistive dividers and can source up to 10 mA. |
| 12 | SS | Soft-start timing node; internal 100 µA current charges external capacitor to ramp up duty cycle gradually. |
| 13 | VA-OUT | Error amplifier output; connects to external RC network to configure voltage-loop gain and stability. |
| 14 | VFEED | Inverting input of voltage error amplifier; connected to output voltage divider to regulate boost output (e.g., 400 V DC). |
| 15 | P-UVLO | Programmable UVLO threshold input; sets turn-on voltage via resistor divider between VCC and GND. |
| 16 | SYNC | Synchronization input/output; CMOS-compatible pin for master-slave clock alignment or external clock injection. |
| 17 | ROSC | Oscillator resistor connection; external resistor to GND sets constant charging current for COSC timing capacitor. |
| 18 | COSC | Oscillator capacitor connection; external capacitor to GND sets switching frequency with ROSC (e.g., 24 kΩ + 1 nF = 100 kHz). |
| 19 | VCC | Main supply input (up to 19.5 V); powers internal circuitry and gate driver; includes internal zener clamp (20–30 V). |
| 20 | GDRV | Totem-pole gate driver output; delivers high peak current to drive N-channel MOSFET/IGBT gates in boost switch position. |
Key Features
| Feature | Design Value |
|---|---|
| Average current mode PWM | Eliminates need for slope compensation and enables stable operation across wide input voltage and load ranges. |
| Integrated 5.1 V ±2% reference | Reduces external component count and improves output voltage regulation accuracy without trimming. |
| Programmable UVLO with hysteresis | Enables robust start-up sequencing and prevents oscillatory behavior during brown-out conditions. |
| Dual protection: OVP & OCP | Prevents damage from output overvoltage events and inductor saturation or short-circuit faults in real time. |
| Feedforward line (VRMS) and load (LFF) inputs | Improves dynamic response to input voltage sags and load steps, maintaining PF >0.98 even under transients. |
| Low 0.3 mA startup current | Permits use of high-value startup resistors, reducing standby power loss in energy-efficient designs. |
Applications
| Industrial AC-DC Power Supplies | Telecom Rectifier Modules |
|---|---|
|
Use Scenario: 360 W universal-input front-end for DIN-rail mounted PLC power supplies operating from –25°C to +70°C ambient. IC Role / Device Role / Timing Role: Primary PFC controller regulating boost stage to maintain 400 V DC bus with <3% THD at 230 V AC full load. Use Value: Enables EN 61000-3-2 Class A compliance and extends electrolytic capacitor life via reduced RMS current stress. |
Use Scenario: 48 V telecom rectifier shelf with hot-swap capability and parallel redundancy across eight 200 W modules. IC Role / Device Role / Timing Role: Fixed-frequency PFC controller synchronizing all modules to common clock (via SYNC pin) to minimize input current ripple summation. Use Value: Achieves 0.99 PF and 94.5% efficiency at 220 V AC, reducing upstream transformer and breaker sizing requirements. |
| LED Driver Front-Ends | Medical Equipment Power Systems |
|
Use Scenario: High-bay LED luminaire with 240 W output, requiring flicker-free dimming and Class C harmonic compliance. IC Role / Device Role / Timing Role: Boost PFC controller feeding downstream LLC resonant converter; VRMS and LFF inputs suppress line- and load-induced current distortion. Use Value: Maintains PF >0.98 across 10–100% dimming range, avoiding utility penalties and enabling smaller input EMI filters. |
Use Scenario: Diagnostic imaging system power supply with dual 400 V/5 A PFC stages feeding isolated DC-DC converters. IC Role / Device Role / Timing Role: Primary PFC controller providing clean, regulated DC bus with redundant OVP/OCP and -40°C cold-start capability. Use Value: Ensures uninterrupted operation during hospital mains fluctuations and meets IEC 60601-1 creepage/clearance requirements via SO20 isolation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power factor correction controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC3817DW | Fixed-frequency average current mode; no integrated 5.1 V reference - requires external reference; lower gate drive (0.5 A sink). | Designed for cost-sensitive consumer PSUs; lacks LFF/VRMS feedforward inputs and has narrower temp range (–40°C to +85°C). | Choose when BOM cost is critical and feedforward precision is not required for THD <5% at low line. |
| FAN4803SJX | Variable-frequency critical conduction mode (CrM); no average current sensing - uses zero-current detection; no OVP pin. | Optimized for <200 W applications; inherently lower EMI but cannot achieve 0.99 PF at high power due to CrM limitations. | Prefer for compact, low-cost adapters where PF >0.95 suffices and thermal constraints limit continuous conduction mode operation. |
Compared with UCC3817DW and FAN4803SJX, the L4981A uniquely combines fixed-frequency average current control, integrated precision reference, dual feedforward inputs, and robust protection - making it the only option among the three capable of sustaining 0.99 PF and <5% THD across 85–265 V AC at 300+ W with industrial temperature support.
Availability
L4981A is available at Aetrix Electronics and suitable for industrial AC-DC power supplies, telecom rectifier modules, and medical equipment power systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for L4981A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, analog, and microcontroller technologies for industrial, automotive, and consumer markets.
The L4981A belongs to ST's legacy MultiPower BCD analog controller product line, designed specifically for high-efficiency, high-reliability active PFC pre-regulators in industrial and telecom infrastructure power supplies.
FAQ
What is the difference between L4981A and L4981B?
The L4981A operates at fixed switching frequency set by ROSC and COSC, while the L4981B supports frequency modulation (via Pin 16) to reduce audible noise and EMI peaks. L4981B uses a two-resistor method for precise peak current limiting, whereas L4981A uses a single resistor plus optional reference tie. Both share identical pinout, protection features, and analog architecture.
Can L4981A drive a 600 V MOSFET directly?
Yes - its GDRV output provides >1 A sink and 1.5 A source peak current with 13–16 V clamping, sufficient to drive standard 600 V N-channel MOSFETs (e.g., STW15NB50) in boost configuration without external buffers. Gate resistor selection must ensure <150 ns rise/fall times per datasheet test conditions.
How is the 0.99 power factor achieved in practice?
The L4981A achieves 0.99 PF by combining analog multiplier-based current reference generation (using VRMS and IAC inputs), average current mode control (eliminating subharmonic oscillation), and feedforward compensation (LFF pin). Verified test data shows 0.999 PF at 110 V AC and 0.993 PF at 220 V AC in 360 W demo boards with proper layout and component selection.
Does L4981A require external slope compensation?
No - the L4981A's average current mode architecture inherently avoids subharmonic instability, so external slope compensation is not required. This simplifies design and improves noise immunity compared to peak current mode controllers, especially at duty cycles above 50%.
L4981A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 20-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Mode:
- Average Current
- Frequency - Switching:
- 100kHz
- Current - Startup:
- 100 µA
- Voltage - Supply:
- 14.5V ~ 19.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 20-DIP
L4981A FAQ
1.How can I place an order for L4981A through Aetrix?
Please submit a Request for Quotation (RFQ) for L4981A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for L4981A reliable?
The price and inventory of L4981A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for L4981A is usually 5 days.
3.What payment methods are accepted for L4981A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for L4981A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for L4981A?
L4981A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your L4981A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for L4981A?
For technical support, including L4981A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your L4981A requirements.
6.How does Aetrix verify that L4981A is sourced from the original manufacturer or authorized distributors?
All L4981A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that L4981A meets industry standards.
7.What is the process for return or replacement of L4981A?
All L4981A units undergo pre-shipment inspection (PSI). If there is an issue with L4981A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The L4981A part is unused and in its original packaging.
Return procedure for L4981A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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