STMicroelectronics L5985TR
- Part No.:
- L5985TR
- Manufacturer:
- STMicroelectronics
- Package:
- 8-VFDFN Exposed Pad
- Datasheet:
-
L5985TR.pdf
- Description:
- IC REG BUCK ADJ 2A 8VFQFPN
- Quantity:
- Payment:

- Shipping:

Inventory:4,133
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
L5985TR from STMicroelectronics is a 2 A synchronous step-down DC-DC switching regulator with integrated P-channel MOSFET, operating from 2.9 V to 18 V input and delivering adjustable output down to 0.6 V. It features 250 kHz base switching frequency (programmable up to 1 MHz), internal soft-start, 100% duty-cycle low-dropout operation, and overcurrent/thermal protection - deployed in LCD TV power rails, FPGA core supplies, and XDSL line cards.
For engineers reviewing the L5985TR datasheet, L5985TR pinout, L5985TR application, or L5985TR equivalent, key selection criteria include input voltage range (2.9–18 V), output adjustability (0.6 V min), thermal resistance (60 °C/W), VFQFPN8 package footprint, and synchronization capability via SYNCH pin for multi-rail phase interleaving.
Technical Context
The L5985TR implements voltage-mode PWM control with feedforward compensation: input voltage and switching frequency modulate sawtooth slope to maintain constant PWM gain across line and frequency variations. Its error amplifier has 100 dB DC gain, 4.5 MHz GBWP, and rail-to-rail COMP output swing (0–3.3 V) for robust loop stability with Type II or III networks.
Functional blocks include a programmable oscillator (250 kHz–1 MHz), peak-current-limited P-channel MOSFET driver (RDS(on) = 140–220 mΩ), 0.6 V reference-based feedback comparator, and hiccup-mode overcurrent protection triggered at 2.5–3.3 A. Thermal shutdown activates at 150 °C with 30 °C hysteresis, and INH enables logic-controlled standby (<30 µA quiescent).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output current | 2 A DC continuous - supports FPGA core, audio codec, and SSD controller rails without external boost. |
| Input voltage range | 2.9 V to 18 V - compatible with 3.3 V, 5 V, and 12 V intermediate buses; UVLO threshold 2.9 V ±0.175 V. |
| Output voltage range | 0.6 V to VIN - enables 1.2 V DDR termination, 1.8 V SoC I/O, and 3.3 V peripheral regulation via resistor divider. |
| Switching frequency | 250 kHz (default), up to 1 MHz - higher frequencies reduce inductor size; FSW pin sets frequency via external resistor. |
| Thermal resistance | RthJA = 60 °C/W - achieved with VFQFPN8 3 mm × 3 mm exposed-pad layout; enables 1.5 W dissipation at TA < 60 °C. |
| Feedback reference | VFB = 0.6 V ±7 mV - precision reference enables ±1% output regulation accuracy across temperature and load. |
| Soft-start duration | 7.4–9.1 ms - staircase ramp (64 steps × 9.5 mV) synchronized to switching clock; prevents inrush into capacitive loads. |
Pinout & Package
VFQFPN8 3 mm × 3 mm package with exposed thermal pad (pin 1 marked by dot); RoHS-compliant, halogen-free, and qualified for industrial temperature range (−40 °C to +125 °C junction).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| OUT (Pin 1) | Regulated output node | High-current path to inductor; connects directly to LC filter output; requires low-ESR ceramic capacitor. |
| SYNCH (Pin 2) | Master/slave synchronization interface | Accepts external clock >250 kHz for zero-phase sync; floating = internal 180° phase-shifted signal for interleaving. |
| INH (Pin 3) | Enable/disable control input | Active-high logic: <0.6 V = ON, >1.9 V = OFF; internal pull-up disables device if left floating. |
| COMP (Pin 4) | Error amplifier output | Drives external compensation network (Type II/III); source/sink capability: 20 mA / 25 mA. |
| FB (Pin 5) | Feedback voltage sense | Compares output to 0.6 V reference; resistor divider sets VOUT; FB disconnection triggers current limit. |
| FSW (Pin 6) | Frequency setting input | Connects to ground via resistor to scale switching frequency; open = 250 kHz; 33 kΩ = 1 MHz. |
| GND (Pin 7) | Power and signal ground | Common return for MOSFET source, feedback, and compensation; must be tied to exposed pad for thermal performance. |
| VCC (Pin 8) | Unregulated input supply | Powers internal circuitry; accepts full 2.9–18 V range; bypassed with 10 µF ceramic near pin. |
Key Features
| Feature | Design Value |
|---|---|
| Voltage feedforward | Adjusts sawtooth slope with input voltage to maintain constant PWM gain - improves line transient response without loop redesign. |
| Zero-load operation | Stable regulation at 0 A output current - eliminates need for dummy load in always-on systems like set-top box standby rails. |
| Hiccup-mode OCP | Enters 2048-clock-cycle shutdown + restart cycle under sustained overload - protects MOSFET and PCB during short-circuit events. |
| 100% duty cycle | Supports dropout as low as VOUT − VSW - enables 3.3 V output from 3.6 V battery input in portable displays. |
| Internal soft-start | Monotonic 8 ms ramp (at 250 kHz) prevents output overshoot and inductor saturation during cold boot of FPGA or DSP. |
Applications
| Consumer Audio Power | FPGA Core Supply |
|---|---|
|
Use Scenario: Dual-rail 12 V → 5 V / 3.3 V conversion for car audio DSP and amplifier stages. IC Role / Device Role / Timing Role: Primary buck regulator delivering stable 5 V bias to analog front-end and 3.3 V to digital logic. Use Value: Low RDS(on) (140 mΩ typ.) minimizes conduction loss at 2 A; 250 kHz switching avoids AM band interference. |
Use Scenario: Point-of-load regulation for Xilinx Spartan-6 FPGA core voltage (1.2 V @ 1.8 A). IC Role / Device Role / Timing Role: Adjustable-output buck converter with precise 0.6 V reference enabling ±1% VCCINT tolerance. Use Value: Programmable soft-start (7.4–9.1 ms) prevents configuration failure during FPGA power-up sequencing. |
| XDSL Line Card DC-DC | LCD TV Backlight Driver Bias |
|
Use Scenario: 12 V intermediate bus conversion to 3.3 V for ADSL2+ PHY and microcontroller subsystems. IC Role / Device Role / Timing Role: High-efficiency step-down regulator supporting burst-mode operation during low-data-rate sleep states. Use Value: <30 µA standby current under INH disable meets ITU-T G.992.5 power budget requirements for energy-efficient modems. |
Use Scenario: 18 V input conversion to 5 V for LED driver IC bias and gate control logic in 32″ LCD TV main board. IC Role / Device Role / Timing Role: Input-capable buck regulator handling wide VIN range (12–18 V) from flyback secondary winding. Use Value: 18 V max input rating accommodates flyback output ripple; VFQFPN8 package fits tight space behind display panel. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar step-down regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2315DJ-LF-Z | 2 A, 4.5–26 V input, fixed 3.3 V/5 V options only; no adjustable VOUT below 3.3 V; no SYNCH pin. | Suitable for fixed-voltage rails only; lacks flexibility for FPGA core or DDR termination where 0.6–1.8 V is required. | Select when system uses only standard 3.3 V/5 V rails and board space permits larger SOIC-8 package. |
| TPS54202DRCT | 2 A, 4.5–28 V input, adjustable down to 0.6 V; 480 kHz default freq; includes Eco-mode for light-load efficiency. | Better light-load efficiency but higher minimum input (4.5 V) excludes 3.3 V bus use; no 100% duty cycle mode. | Prefer for battery-powered systems needing >85% efficiency at 10 mA load, but avoid where 2.9 V start-up or dropout headroom is critical. |
Compared with MP2315DJ-LF-Z and TPS54202DRCT, the L5985TR uniquely supports 2.9 V start-up, 100% duty cycle, and synchronization for multi-phase designs - making it optimal for space-constrained, multi-rail consumer electronics with mixed 3.3 V/1.2 V/0.9 V domains.
Availability
L5985TR is available at Aetrix Electronics and suitable for LCD TV power management, FPGA core supplies, and XDSL line card DC-DC conversion requiring stable component supply, long-term industrial lifecycle support, and RoHS-compliant VFQFPN packaging.
Supply support for L5985TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, MCU, power, and sensor solutions for automotive, industrial, and consumer markets.
The L5985TR belongs to ST's high-efficiency monolithic DC-DC regulator product line, engineered specifically for compact, cost-sensitive point-of-load applications in set-top boxes, displays, and networking equipment where thermal performance and input voltage flexibility are critical.
FAQ
What is the minimum input voltage required for L5985TR startup?
The L5985TR requires a minimum input voltage of 2.9 V to initiate regulation, verified by its VCCON turn-on threshold specification. Below this level, the UVLO circuit holds the device in shutdown, preventing erratic operation. This allows direct use on 3.3 V intermediate buses without pre-regulation.
Can L5985TR operate with 0 A load current while maintaining regulation?
Yes - the L5985TR supports zero-load current operation per datasheet Section 4. Functional Description. Its voltage-mode control architecture and low-quiescent-current design (20–30 µA in standby) ensure stable 0.6 V reference tracking and output regulation even with no output capacitance load.
How does the SYNCH pin enable phase interleaving between two L5985TR devices?
When SYNCH pins of two L5985TR units are connected, the higher-frequency device becomes master and forces the lower-frequency unit into slave mode with 180° phase shift. This halves RMS input capacitor current, reducing heating and EMI - confirmed in Figure 4 and Section 4.1 of the official datasheet.
What is the maximum allowable thermal resistance for reliable 2 A operation at 70 °C ambient?
With RthJA = 60 °C/W and maximum junction temperature of 150 °C, the L5985TR dissipates up to 1.33 W at 70 °C ambient (ΔT = 80 °C). At 2 A output and 12 V input → 3.3 V output (η ≈ 88%), power dissipation is ~1.1 W - within safe margin, provided PCB copper area matches ST's demo board layout.
L5985TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.9V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 18V
- Current - Output:
- 2A
- Frequency - Switching:
- 250kHz ~ 1MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-VFQFPN (3x3)
L5985TR FAQ
1.How can I place an order for L5985TR through Aetrix?
Please submit a Request for Quotation (RFQ) for L5985TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for L5985TR reliable?
The price and inventory of L5985TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for L5985TR is usually 5 days.
3.What payment methods are accepted for L5985TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for L5985TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for L5985TR?
L5985TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your L5985TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for L5985TR?
For technical support, including L5985TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your L5985TR requirements.
6.How does Aetrix verify that L5985TR is sourced from the original manufacturer or authorized distributors?
All L5985TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that L5985TR meets industry standards.
7.What is the process for return or replacement of L5985TR?
All L5985TR units undergo pre-shipment inspection (PSI). If there is an issue with L5985TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The L5985TR part is unused and in its original packaging.
Return procedure for L5985TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
L5985TR Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

