STMicroelectronics L5987ATR

Overview

L5987ATR from STMicroelectronics is a 3 A synchronous step-down switching regulator with integrated P-channel MOSFET, designed for point-of-load DC-DC conversion in space-constrained systems. It operates from 2.9 V to 18 V input, delivers adjustable output down to 0.6 V, features 250 kHz–1 MHz programmable switching frequency, internal soft-start, and 100% duty-cycle low-dropout operation - enabling reliable 3.3 V bus regulation and zero-load current operation in FPGA core supplies.

For engineers reviewing the L5987ATR datasheet, L5987ATR pinout, L5987ATR application, or L5987ATR equivalent, key selection criteria include thermal resistance (40 °C/W for HSOP8), overcurrent protection behavior (hiccup vs. constant-current modes), voltage feedforward compensation, and synchronization capability across multiple regulators in multi-rail systems.

Technical Context

The L5987ATR implements voltage-mode PWM control with a fixed-frequency sawtooth oscillator whose slope is dynamically adjusted via voltage and frequency feedforward to maintain stable PWM gain across input voltage and switching frequency variations. Its error amplifier features 100 dB open-loop gain, 4.5 MHz GBWP, and rail-to-rail output swing (0–3.3 V) for robust loop compensation.

Internal protection includes cycle-by-cycle peak current limiting with 200 ns blanking time, hysteretic thermal shutdown (150 °C trip, 130 °C recovery), and UVLO with 2.9 V turn-on threshold and 0.3 V hysteresis. The INH pin supports active-high disable with <30 µA standby current, while SYNCH enables master/slave synchronization with phase-shifted outputs for interleaved operation.

Key Specifications

Pinout & Package

Available in HSOP8 package with exposed thermal pad (40 °C/W R_thJA) - optimized for high-current, thermally demanding applications. Pin layout supports compact PCB layout with dedicated power, feedback, and synchronization paths.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar step-down regulator applications.

Compared with MP2315DJ-LF-Z and TPS54331DR, the L5987ATR uniquely combines 100% duty-cycle operation, voltage feedforward, and master/slave synchronization - making it optimal for low-input-voltage, multi-rail, thermally sensitive applications where regulation margin and ripple cancellation are critical.

Availability

L5987ATR is available at Aetrix Electronics and suitable for FPGA core supplies, automotive infotainment SoC rails, industrial PLC I/O modules, and networking DSL modem power requiring stable component supply, long-term lifecycle support, and consistent thermal performance across production batches.

Supply support for L5987ATR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in power management, microcontrollers, and analog ICs for industrial, automotive, and consumer markets.

The L5987 series belongs to ST's high-current monolithic buck regulator product line, engineered specifically for compact, thermally efficient DC-DC conversion in FPGA, PLC, and networking equipment where reliability under dynamic load and thermal stress is essential.

FAQ

What is the maximum output current achievable with L5987ATR in HSOP8 package at 85°C ambient?

The L5987ATR in HSOP8 package delivers up to 3 A DC output current at 85°C ambient when mounted on a standard 4-layer PCB with 2 oz copper and thermal vias to an internal ground plane. This is enabled by its 40 °C/W junction-to-ambient thermal resistance and built-in thermal shutdown at 150°C with 30°C hysteresis - ensuring safe operation without derating below 85°C.

How does the SYNCH pin function when connecting two L5987ATR devices?

When the SYNCH pins of two L5987ATR devices are tied together, the unit with the higher oscillator frequency automatically becomes the master and the other acts as slave, producing complementary 180° phase-shifted switching waveforms. This interleaving reduces input capacitor RMS current by up to 30%, lowers EMI peaks, and improves thermal distribution - confirmed in ST's application note AN4405 for multi-phase buck designs.

Can L5987ATR regulate output voltage below 0.6 V using external circuitry?

No - the internal reference is fixed at 0.6 V ±7 mV and the FB pin is designed only for resistive divider-based scaling upward. There is no provision for negative offset injection, reference trimming, or external reference override. Output voltages below 0.6 V require a different regulator architecture (e.g., LDO or specialized buck with adjustable reference).

What compensation network type is recommended for ceramic-output-capacitor designs?

For ceramic output capacitors with low ESR, a Type II compensation network is recommended - it introduces one pole and one zero to stabilize the loop against the LC double-pole while avoiding excessive phase lag. ST's datasheet Section 6.4.2 specifies exact resistor/capacitor values based on selected f_SW, inductance, and output capacitance, validated for <45° phase margin across –40°C to +125°C.