STMicroelectronics L5991A

Overview

L5991A from STMicroelectronics is a primary-side current-mode PWM controller IC for offline and DC-DC flyback power supplies, featuring programmable soft-start (14–26 µA charge current), 100 ns leading-edge blanking on current sense, latch-type overcurrent protection with hiccup-mode restart, and dual-frequency standby operation (f_osc up to 1 MHz, f_SB reduced under light load). It drives external N-channel MOSFETs with 1 A peak output current and supports IN/OUT synchronization.

For engineers reviewing the L5991A datasheet, L5991A pinout, L5991A application in flyback converters, or L5991A equivalent for AC-DC SMPS control, this page provides verified functional context, validated pin roles, confirmed timing and protection parameters, and real-world design implications for standby efficiency, duty-cycle limiting, and fault recovery behavior.

Technical Context

The L5991A implements fixed-frequency current-mode control using an internal oscillator with externally programmable RCT network, where RA//RB sets normal frequency (f_osc) and RA alone sets standby frequency (f_SB). Its error amplifier (2.5 V reference, 60–90 dB open-loop gain, 1.7–4 MHz bandwidth) directly controls PWM duty via COMP voltage, which also triggers standby mode when falling below VT1 = 2.5 V (rising threshold VT2 = 4.0 V).

Current sensing uses a dedicated ISEN input with 1.1–1.3 V fault threshold, 70–100 ns delay to output, and internal 100 ns blanking window. The PWM logic is fully latched with double-pulse suppression, and the 1 A totem-pole output stage includes internal clamp (13 V) and supports gate drive for discrete MOSFETs without external buffers.

Key Specifications

Pinout & Package

Package: DIP16 and SO16 (dual-in-line and small-outline 16-pin packages; thermal resistance 80 °C/W and 120 °C/W respectively).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar primary-side PWM controller applications.

Compared with UC3844B and ICE2A265, the L5991A uniquely combines programmable dual-frequency operation, precise 100 ns blanking, and hiccup-mode fault recovery-making it optimal for industrial and energy-compliant flyback designs requiring both robustness and dynamic efficiency scaling.

Availability

L5991A is available at Aetrix Electronics and suitable for AC-DC adapters, industrial flyback PSUs, and smart home power modules requiring stable component supply, long-term lifecycle support, and traceable sourcing for safety-critical implementations.

Supply support for L5991A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader specializing in power management, analog, and microcontroller solutions for industrial, automotive, and consumer markets.

The L5991A belongs to ST's MultiPower BCD60II product line-designed specifically for high-voltage, high-efficiency offline SMPS controllers with integrated protection, precision timing, and adaptive light-load operation.

FAQ

What is the minimum recommended value for the RCT timing capacitor (CT) to ensure stable oscillator operation?

The datasheet specifies CT = 1 nF as the nominal value used across all electrical characteristics testing. Operation down to 100 pF is validated in Figure 14 (timing resistor vs. frequency), but below 220 pF, jitter increases significantly and standby frequency accuracy degrades. For production designs, ST recommends CT ≥ 220 pF with appropriate RA/RB selection to maintain <5% frequency deviation over temperature and supply variation.

How does the L5991A implement hiccup-mode protection, and what is the typical hiccup period under sustained short-circuit?

Hiccup mode activates when ISEN voltage exceeds 1.2 V, forcing full shutdown and initiating soft-start recharge of the SS capacitor. The hiccup period is calculated as T_hic ≅ 4.5 × (1/I_SSC + 1/I_SSD) × C_ss, yielding ~120 ms for a standard 100 nF SS capacitor. During each hiccup cycle, the IC attempts one full soft-start ramp before rechecking fault status-ensuring safe, low-duty-cycle recovery without thermal runaway.

Can the L5991A be used in continuous conduction mode (CCM) flyback designs, and what compensation considerations apply?

Yes-the L5991A supports both DCM and CCM operation. In CCM, the error amplifier's 1.7–4 MHz bandwidth and 8 V/µs slew rate enable wide-loop bandwidth, but compensation must account for right-half-plane zero. ST recommends type-II or type-III networks with pole placement at f_SB/4 ÷ f_SB/5 to maintain stability during standby transitions, and explicit attention to PGND/SGND separation to prevent loop oscillation.

What is the maximum allowable voltage difference between VC and VCC, and why is separate decoupling critical?

The absolute maximum rating allows VC up to 25 V, same as VCC, but VC experiences high di/dt pulsed currents during MOSFET switching, while VCC draws steady logic current. Without separate 10 µF+ bulk capacitors referenced to PGND (VC) and SGND (VCC), voltage droop on VC causes shoot-through risk and VCC noise couples into COMP/VFB, inducing regulation instability or false overcurrent trips.