STMicroelectronics L6382D5

Overview

L6382D5 from STMicroelectronics is a high-voltage BCD-based power management unit (PMU) for microcontroller-controlled electronic ballasts with integrated PFC and half-bridge stages. It integrates four MOSFET drivers (PFC, half-bridge high/low-side, preheating), 5V ±2% reference (30mA max), internal two-point VCC regulator, over-current protection with digital CSO output, and patented synchronous bootstrap diode - enabling full lamp control in dimmable/non-dimmable fluorescent ballast systems.

For engineers reviewing the L6382D5 datasheet, L6382D5 pinout, L6382D5 application, or L6382D5 equivalent, this IC delivers verified gate-drive timing (≤300 ns propagation delay), HV start-up up to 600 V, UVLO thresholds (VccON = 14 V typ.), and integrated interlocking to prevent cross-conduction - critical for reliable lamp ignition and thermal-safe operation in industrial lighting designs.

Technical Context

The L6382D5 implements a state-machine-based power management architecture with three operational modes: START-UP (HV generator active, VREF sunk), SAVE (cycled HV start-up, 10 mA VREF), and OPERATING (full drivers enabled, 30 mA VREF, TPR regulation active). Its logic inputs (PFI, LSI, HSI, HEI) accept 5 V CMOS signals up to 400 kHz and feed level-shifted totem-pole drivers with defined source/sink capability (e.g., PFG: 120 mA source / 250 mA sink).

Core functional blocks include a 600 V HV start-up transistor (IMSS = 20 mA), internal synchronous bootstrap diode (RDS(on) = 150 Ω, VF = 2.4 V @ 10 mA), two-point VCC regulator (TPR) with programmable turn-on/off thresholds (TPR(ON) = 13 V typ., TPR(OFF) = 12.95 V typ.), and an asynchronous over-current protection circuit latching CSO high when CSI exceeds 0.54 V (typ.) - disabling half-bridge drivers until reset via Vcc cycling or simultaneous LGI/HGI low.

Key Specifications

Pinout & Package

Package: SO-20 (Small Outline, 20-pin, 0.65 mm pitch), surface-mount, RoHS-compliant, thermal resistance R_thJA = 120 °C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power management unit applications.

Compared with IRS2166DSTRPBF and BD7682FJ-E2, the L6382D5 uniquely integrates PFC, half-bridge, and preheat drivers with 5 V µC supply and synchronous bootstrap - making it the only single-package solution for full-featured microcontrolled fluorescent ballasts.

Availability

L6382D5 is available at Aetrix Electronics and suitable for fluorescent lamp ballasts, dimmable lighting systems, and industrial emergency lighting requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for L6382D5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, power, MCU, and sensor solutions for industrial, automotive, and consumer markets.

The L6382D5 belongs to ST's Lighting & Power Conversion product line, engineered specifically for high-efficiency, microcontroller-based electronic ballasts - emphasizing integration, reliability, and compliance with IEC 61000-3-2 harmonic standards.

FAQ

What is the maximum allowable voltage on the HVSU pin?

The HVSU pin supports up to 600 V DC absolute maximum rating, enabling direct connection to rectified mains in universal-input ballast designs. The internal 600 V start-up MOSFET operates safely within this limit, with leakage current specified at 40 µA when VHVSU = 600 V. Exceeding 600 V risks permanent damage to the HV structure.

How does the L6382D5 prevent shoot-through in the half-bridge?

The L6382D5 implements hardware interlocking: when either LSI or HSI transitions, the corresponding driver (LSG or HSG) is delayed by ≥300 ns before enabling, and the opposite driver is forcibly disabled during that interval. This ensures zero overlap between high- and low-side conduction - confirmed by internal logic block diagram and timing diagrams in Section 6.4 of the datasheet.

Can the VREF pin supply a 3.3 V microcontroller directly?

No - VREF delivers a fixed 5.0 V ±2% output and is not adjustable. To power a 3.3 V µC, an external LDO (e.g., LD3985) must be used between VREF and the µC VDD. The L6382D5's 5 V output is designed for legacy 5 V MCUs; attempting to load it with a 3.3 V device without regulation may cause overvoltage damage or unstable operation.

What happens if the CSI pin exceeds 0.56 V?

If CSI voltage rises above 0.56 V (maximum threshold), the internal over-current comparator triggers immediately, forcing CSO high and disabling both LSG and HSG drivers within 200 ns. Recovery requires either cycling VCC below UVLO (9.5 V) or asserting both LSI and HSI low simultaneously - per Section 5.2.3 and Table 4 of the datasheet.