STMicroelectronics L6382D5TR
- Part No.:
- L6382D5TR
- Manufacturer:
- STMicroelectronics
- Category:
- Lighting, Ballast Controllers
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
L6382D5TR.pdf
- Description:
- IC PFC/BALLAST CNTRL 20SO
- Quantity:
- Payment:

- Shipping:

Inventory:4,077
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Product details
Overview
L6382D5 from STMicroelectronics is a high-voltage BCD-based power management unit (PMU) for microcontroller-controlled electronic ballasts with integrated PFC and half-bridge stages. It integrates four MOSFET drivers (PFC, half-bridge high/low-side, preheating), 5V ±2% reference (30mA max), internal bootstrap diode, two-point VCC regulator, and digital over-current protection with CSO latched output. Used in dimmable/non-dimmable fluorescent lamp ballasts.
For engineers reviewing the L6382D5 datasheet, L6382D5 pinout, L6382D5 application, or L6382D5 equivalent, this IC delivers integrated gate driving, power sequencing, and microcontroller supply regulation - critical for compact, reliable, software-configurable ballast designs operating across lamp wattage variants.
Technical Context
The L6382D5 implements a state-machine–driven power management architecture with three operational modes: START-UP (HV start-up generator active, VREF disabled), SAVE MODE (VREF sourcing ≤10mA, HVSU cycling to maintain VCC between 12.75–14.85V), and OPERATING MODE (VREF sourcing up to 30mA, TPR regulating VCC, OCP enabled, all drivers active). Transitions are governed by VCC thresholds, VREF voltage, and LGI/HGI timing.
Its driver subsystem includes level-shifted 5V-compatible inputs (PFI, LSI, HSI, HEI), totem-pole outputs with defined sink/source capability (e.g., PFG: 120mA source / 250mA sink), patented synchronous bootstrap diode (RDS(on) = 150Ω), and interlocking logic preventing cross-conduction. The TPR block enables charge-pump–free VCC regulation using external switching node coupling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VREF Output | 5.0 V ±2%, supplies microcontroller up to 30 mA in operating mode; stable under VCC = 9–15 V variation. |
| PFG Driver Sink | 250 mA min., ensures fast turn-off of PFC MOSFET under heavy capacitive load (Cload = 1 nF). |
| HSG/LSG Drive | 120 mA source/sink each, supports robust half-bridge gate control with built-in 20 kΩ pull-down to OUT/GND. |
| OCP Threshold | 0.54 V typ. at CSI input; triggers latched CSO high signal and disables half-bridge drivers within 200 ns. |
| HVSU Voltage Range | −0.3 to 600 V, enables direct connection to rectified mains for self-powered start-up without external HV resistor network. |
| TPR Regulation | Enables VCC regulation between 12.45–13.48 V (OFF) and 12.5–13.5 V (ON) using external capacitor-coupled switching node. |
| Operating Temp | −40°C to +125°C junction temperature, qualified for industrial-grade ballast thermal environments. |
Pinout & Package
Package: SO-20 (Small Outline, 20-pin, 0.65 mm pitch, body width 7.5 mm), surface-mount, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 PFI | PFC Gate Control Input | 5V CMOS-compatible digital input; level-shifted to drive PFG output with 250 mA sink capability. |
| 2 LSI | Low-Side Gate Control Input | 5V CMOS input controlling LSG output; propagation delay ≤300 ns ensures precise half-bridge timing. |
| 3 HSI | High-Side Gate Control Input | 5V CMOS input level-shifted to floating domain; synchronizes with LSG to enable interlocking logic. |
| 5 PFG | PFC Driver Output | Drives PFC MOSFET gate directly; internal 10 kΩ pull-down prevents spurious turn-on during idle. |
| 9 LSG | Half-Bridge Low-Side Driver Output | Sources/sinks 120 mA; referenced to GND; includes 20 kΩ internal pull-down to ground. |
| 11 BOOT | Bootstrap Supply Input | Connects to bootstrap capacitor; fed by internal synchronous diode (replaces external diode). |
| 12 HSG | Half-Bridge High-Side Driver Output | Drives high-side MOSFET gate; referenced to OUT; 20 kΩ internal pull-down to OUT prevents false turn-on. |
| 13 OUT | High-Side Floating Ground | Return path for high-side gate current; layout-critical node to minimize ground bounce and EMI. |
| 15 HVSU | High-Voltage Start-Up Input | Accepts up to 600 V; internal 600 V MOSFET charges VCC capacitor during start-up and save mode. |
| 17 HEG | Preheating Driver Output | Drives isolated filament preheat MOSFET; 50 mA source / 70 mA sink; 50 kΩ internal pull-down to GND. |
| 18 CSO | OCP Status Output | CMOS-compatible latched high signal indicates over-current fault; requires VCC cycle or dual-LGI low reset. |
| 19 CSI | Current Sense Input | Analog comparator input; triggers OCP when voltage exceeds 0.54 V; enabled only in operating mode. |
| 20 VREF | 5V Reference Output | Stable 5.0 V ±2% reference; supplies µC; load-regulated to ±20 mV over −3 to +30 mA range. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Bootstrap Diode | Patented synchronous structure (RDS(on) = 150 Ω) eliminates external diode, reducing BOM count and layout area. |
| Dual-Mode VREF Supply | Delivers 10 mA in SAVE mode and 30 mA in OPERATING mode - matches µC wake-up vs. active current requirements. |
| Two-Point VCC Regulator (TPR) | Enables efficient charge-pump–free VCC regulation using external capacitor-coupled switching node (e.g., half-bridge OUT). |
| Digital OCP with Latched Output | CSO pin latches high on fault; provides unambiguous system-level fault signaling without µC polling overhead. |
| Cross-Conduction Protection | Hardware interlocking logic ensures dead-time between LSG and HSG transitions, preventing shoot-through. |
Applications
| Fluorescent Lamp Ballast | Dimmable Electronic Ballast |
|---|---|
|
Use Scenario: Fixed-output, non-dimmable fluorescent lamp driver for commercial lighting fixtures. IC Role / Device Role / Timing Role: PMU providing gate drive, µC supply, and power sequencing for PFC + half-bridge topology. Use Value: Reduces component count by integrating 4 drivers, 5V reference, and HV start-up - enabling compact, cost-effective 20–40W ballasts. |
Use Scenario: Microcontroller-programmable ballast supporting 1–10 V analog dimming or digital protocols. IC Role / Device Role / Timing Role: Enables software-defined lamp wattage and preheat time via PFI/LSI/HSI/HEI digital inputs. Use Value: Single IC supports multiple lamp types (T5/T8) and dimming curves - eliminating hardware redesigns across product variants. |
| Industrial Lighting Control | Energy-Efficient Ballast Module |
|
Use Scenario: Harsh-environment lighting in factory automation or outdoor signage requiring extended thermal operation. IC Role / Device Role / Timing Role: Robust gate driver with −40°C to +125°C qualification and integrated UVLO/OCP for fault resilience. Use Value: Eliminates discrete protection circuitry and improves MTBF through integrated interlocking and latchable fault signaling. |
Use Scenario: OEM ballast module targeting ENERGY STAR® or IEC 61000-3-2 compliance. IC Role / Device Role / Timing Role: Integrates PFC stage control and half-bridge timing with precise 5V reference for accurate µC ADC sampling. Use Value: Meets harmonic current limits via tightly regulated PFC timing and reduces system-level calibration effort via stable VREF. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power management unit applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRS2153D | Self-oscillating half-bridge driver only; no PFC driver, no VREF, no µC interface, no OCP latching. | Requires external PFC controller, µC supply, and fault handling logic - higher BOM and design complexity. | Select when cost-sensitive, fixed-frequency, non-microcontrolled ballasts are needed without software configurability. |
| L6574 | Single-chip ballast controller with analog inputs; lacks digital µC interface, integrated VREF, and TPR regulation. | Designed for analog dimming; no support for firmware-based lamp type adaptation or preheat profile tuning. | Select for legacy analog systems where µC integration and multi-lamp flexibility are not required. |
Compared with IRS2153D and L6574, the L6382D5 uniquely combines microcontroller compatibility, integrated 5V supply, four-channel gate driving, and programmable power-state management - enabling single-IC, software-defined ballast platforms with reduced validation effort and faster time-to-market.
Availability
L6382D5 is available at Aetrix Electronics and suitable for fluorescent lamp ballasts, industrial lighting control systems, and energy-efficient lighting modules requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for L6382D5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader specializing in power management, analog, and microcontroller solutions for industrial, automotive, and consumer applications.
The L6382D5 belongs to ST's dedicated lighting control IC portfolio, designed specifically for microcontroller-driven electronic ballasts with integrated PFC, half-bridge, and filament preheating functions.
FAQ
What is the maximum allowable voltage on the HVSU pin?
The HVSU pin supports an absolute maximum voltage of 600 V, enabling direct connection to rectified AC mains without external voltage division. This rating is validated per ST's BCD process specifications and includes safety margin for transient surges up to 600 V peak. Operation above this voltage risks permanent damage to the internal 600 V start-up MOSFET.
How does the L6382D5 implement cross-conduction protection?
The L6382D5 uses hardware-level interlocking logic that monitors LSI and HSI inputs in real time: if both signals are high simultaneously, the internal logic forces LSG and HSG outputs low with zero propagation delay. This prevents shoot-through by ensuring mandatory dead-time, independent of µC firmware timing accuracy or external gate resistors.
Can the VREF pin supply a 5V microcontroller during all operating modes?
VREF supplies the microcontroller only in SAVE and OPERATING modes: up to 10 mA in SAVE mode and up to 30 mA in OPERATING mode. During START-UP, VREF is actively clamped below 1.8 V by an internal sinking circuit to prevent premature µC wake-up; it becomes active only after VCC exceeds 14 V and the device enters SAVE mode.
What is the function of the TPR pin and how is it used in circuit design?
The TPR pin enables the two-point VCC regulator: it must be connected via a capacitor to a switching node (e.g., half-bridge OUT) to form a charge-pump structure. During OPERATING mode, the internal TPR circuit senses VCC and switches an internal PSW transistor to regulate VCC between 12.45–13.48 V, eliminating need for external charge-pump components while maintaining efficiency.
L6382D5TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- PFC/Ballast Controller
- Frequency:
- -
- Voltage - Supply:
- 14V ~ 17V
- Current - Supply:
- 2.1 mA
- Current - Output Source/Sink:
- -
- Dimming:
- Yes
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-SO
L6382D5TR FAQ
1.How can I place an order for L6382D5TR through Aetrix?
Please submit a Request for Quotation (RFQ) for L6382D5TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for L6382D5TR reliable?
The price and inventory of L6382D5TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for L6382D5TR is usually 5 days.
3.What payment methods are accepted for L6382D5TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for L6382D5TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for L6382D5TR?
L6382D5TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your L6382D5TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for L6382D5TR?
For technical support, including L6382D5TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your L6382D5TR requirements.
6.How does Aetrix verify that L6382D5TR is sourced from the original manufacturer or authorized distributors?
All L6382D5TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that L6382D5TR meets industry standards.
7.What is the process for return or replacement of L6382D5TR?
All L6382D5TR units undergo pre-shipment inspection (PSI). If there is an issue with L6382D5TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The L6382D5TR part is unused and in its original packaging.
Return procedure for L6382D5TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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