STMicroelectronics L6562AD

Overview

L6562AD from STMicroelectronics is a transition-mode (TM) power factor correction (PFC) controller in SO-8 package, featuring 1% internal reference voltage (2.5 V @ TJ = 25 °C), ultra-low 30 µA start-up current, 2.5 mA quiescent current, 600 mA source / 800 mA sink totem-pole gate driver, and digital leading-edge blanking on current sense. It enables IEC61000-3-2-compliant PFC pre-regulators for flat TVs, desktop PCs, and 400 W AC-DC adapters.

For engineers reviewing the L6562AD datasheet, L6562AD pinout, L6562AD application, or L6562AD equivalent, key selection criteria include THD-optimized multiplier linearity, dynamic/static overvoltage protection thresholds (27 µA trigger, 2.25 V static clamp), disable function via INV pin (150–250 mV threshold), and ZCD-based zero-current detection for accurate TM timing.

Technical Context

The L6562AD implements fixed-off-time transition-mode control with a proprietary linear multiplier that injects positive offset near AC zero-crossings to reduce conduction dead-angle and minimize THD. Its voltage-mode error amplifier uses an internal 2.5 V reference with ±2.5 mV line regulation across 10.5–22.5 V VCC.

Overvoltage protection operates in two stages: dynamic OVP triggers at 27 µA COMP current (≈40 V ΔVO with R1 = 1.5 MΩ), while static OVP activates when COMP saturates low under light-load conditions. The ZCD input detects boost inductor demagnetization via negative-going edge, enabling precise MOSFET turn-on timing without auxiliary winding.

Key Specifications

Pinout & Package

SO-8 surface-mount package with standard 1.27 mm pitch, compliant with JEDEC MS-012AC. Thermal resistance R_thJA = 150 °C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar transition-mode PFC controller applications.

Compared with UCC28051DR, the L6562AD offers integrated gate drive and lower start-up current but lacks programmable frequency; versus L6562D, it shares core functionality but has lower ESD immunity-making L6562AD optimal for cost-sensitive, thermally constrained 350–400 W consumer adapters.

Availability

L6562AD is available at Aetrix Electronics and suitable for flat panel TV power supplies, desktop PC SMPS, and high-end AC-DC adapters requiring stable component supply, long-term lifecycle support, and traceable sourcing for volume production.

Supply support for L6562AD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, microcontroller, power, and sensor solutions for industrial, automotive, and consumer markets.

The L6562AD belongs to ST's legacy PFC controller product line, engineered specifically for cost-effective, high-efficiency transition-mode PFC pre-regulators in IEC61000-3-2-compliant AC-DC power supplies up to 400 W.

FAQ

What is the purpose of the ZCD pin on the L6562AD?

The ZCD (Zero-Current Detection) pin senses the demagnetization of the boost inductor via a negative-going edge, triggering MOSFET turn-on to maintain transition-mode operation. It supports auxiliary-winding-free implementation using an R-C network from the MOSFET drain, reducing magnetics complexity in space-constrained adapters.

How does the L6562AD implement overvoltage protection?

The L6562AD provides dual-stage OVP: dynamic OVP monitors COMP pin current and triggers at 27 µA to shut down the gate driver during abrupt overvoltage events (e.g., load disconnection), while static OVP activates when the error amplifier saturates low under sustained light-load overvoltage, forcing burst-mode operation.

Can the L6562AD replace the L6562 in existing designs?

No-though pin-compatible, the L6562AD relocates the disable function from ZCD (L6562) to INV (L6562AD) and reduces dynamic OVP trigger current from 40 µA to 27 µA. External resistor values (e.g., R1 in OVP divider) must be increased by 48% to maintain same trip point, and compensation networks may require re-tuning.

What is the significance of the THD optimizer circuit?

The THD optimizer injects a controlled positive offset into the multiplier output near AC line zero-crossings, forcing earlier MOSFET conduction to discharge the bridge rectifier's high-frequency filter capacitor. This eliminates conduction dead-angle, reducing THD to <5% even at low line voltages and light loads without increasing EMI filter size.