STMicroelectronics L6562AN

Overview

L6562AN from STMicroelectronics is a transition-mode (TM) power factor correction (PFC) controller in DIP-8 package, designed for high-efficiency AC-DC pre-regulators. It delivers 1% internal reference voltage accuracy at 25°C, ultra-low 30 µA start-up current, and integrated totem-pole gate driver with ±600/±800 mA sourcing/sinking capability. Used in IEC61000-3-2-compliant flat TV and desktop PC power supplies up to 400W.

For engineers reviewing the L6562AN datasheet, L6562AN pinout, L6562AN application, or L6562AN equivalent, key selection considerations include its proprietary THD-optimized multiplier, digital leading-edge blanking on CS pin, disable function via INV pin, and dual-step overvoltage protection with dynamic OVP triggering at 27 µA.

Technical Context

The L6562AN implements current-mode control in transition mode using zero-current detection (ZCD) on pin 5 to synchronize MOSFET turn-on at inductor demagnetization. Its multiplier input (pin 3) accepts rectified mains via resistor divider and generates a sinusoidal current reference, enhanced by a dedicated THD optimizer circuit that adds controlled offset near line zero-crossings.

Voltage regulation is achieved via an internal 2.5 V reference (±1% @ 25°C) feeding the error amplifier's inverting input (pin 1), with COMP (pin 2) output driving loop compensation. Overvoltage protection operates in two stages: dynamic OVP triggers gate shutdown when COMP current exceeds 27 µA; static OVP activates when error amplifier saturates low under light-load overvoltage conditions.

Key Specifications

Pinout & Package

DIP-8 package with through-hole mounting; 0.3-inch body width; standard JEDEC MS-001AC footprint; rated for −40°C to +150°C junction temperature; thermal resistance R_thJA = 100°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar transition-mode PFC controller applications.

Compared with L6562AD, the L6562AN offers lower thermal resistance and easier heatsinking in open-frame supplies; versus UCC28051DR, it provides superior THD performance below 20% load and simpler magnetics implementation, albeit with lower maximum power scalability.

Availability

L6562AN is available at Aetrix Electronics and suitable for flat-panel TV power supplies, desktop PC SMPS, and HI-END AC-DC adapters requiring stable component supply, long lifecycle support, and consistent DIP-8 mechanical compatibility.

Supply support for L6562AN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering silicon solutions for automotive, industrial, and power management applications since 1987.

The L6562A belongs to ST's legacy analog power IC portfolio, specifically engineered for cost-sensitive, high-volume transition-mode PFC applications in consumer and computing power supplies compliant with IEC61000-3-2.

FAQ

What is the purpose of the THD optimizer circuit in the L6562AN?

The THD optimizer circuit reduces conduction dead-angle near AC line zero-crossings by adding a controlled positive offset to the multiplier output. This forces earlier MOSFET turn-on when instantaneous line voltage is low, fully discharging the bridge rectifier's high-frequency filter capacitor and minimizing crossover distortion. It lowers total harmonic distortion without requiring larger input EMI capacitors.

Can the L6562AN operate without an auxiliary winding on the boost inductor?

Yes - the ZCD pin can be driven directly from the MOSFET drain via an R-C network (e.g., 330 kΩ + 22 pF), eliminating the need for an auxiliary winding. This configuration relies on high-frequency drain voltage edges to arm and trigger the zero-current detector. ST confirms proper operation up to 400 V output with this method, as shown in Application Note Figure 20.

How does the dual-step overvoltage protection work?

Dynamic OVP monitors COMP pin current: if it exceeds ~27 µA (e.g., due to sudden load removal), the gate driver shuts down immediately. Static OVP activates when the error amplifier saturates low under sustained light-load overvoltage, forcing burst-mode operation. Both modes reduce quiescent current to 1.7–2.2 mA to preserve Vcc hold-up time during fault conditions.

Is the L6562AN pin-compatible with the L6562?

No - although both share the same DIP-8/SO-8 pinout, the disable function moved from ZCD (pin 5) in the L6562 to INV (pin 1) in the L6562AN. Additionally, key parameters differ: CS clamp is 1.08 V (vs 1.7 V), OVP trigger is 27 µA (vs 40 µA), and multiplier gain is 0.38 (vs 0.6). External component values must be re-optimized for L6562AN migration.