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STMicroelectronics L6563A
- Part No.:
- L6563A
- Manufacturer:
- STMicroelectronics
- Category:
- PFC (Power Factor Correction)
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
L6563A.pdf
- Description:
- IC PFC CTRLR TRANSITION 14SO
- Quantity:
- Payment:
- Shipping:
Inventory:351
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Product details
Overview
L6563A from STMicroelectronics is an advanced transition-mode (TM) power factor correction (PFC) controller in SO-14 package, designed for high-efficiency AC-DC pre-regulators. It delivers 1.5% internal reference voltage accuracy (@TJ = 25°C), ≤90 µA start-up current, and a ±600/±800 mA totem-pole gate driver for driving MOSFETs or IGBTs in >350W EN61000-3-2-compliant SMPS.
For engineers reviewing the L6563A datasheet, L6563A pinout, L6563A application, or L6563A equivalent, key selection considerations include its voltage feedforward (1/V²) compensation, tracking boost function, latched feedback failure protection, and absence of inductor saturation detection-distinguishing it from the L6563.
Technical Context
The L6563A implements current-mode control in transition mode with a highly linear multiplier and dedicated THD-optimizing circuitry, enabling low total harmonic distortion across wide input voltage ranges (e.g., 85–265 VAC). Its 1/V² voltage feedforward dynamically scales loop gain to maintain stability during mains transients.
It integrates a precision 2.5 V error amplifier reference, programmable overvoltage protection (OVP) with 2.15 V static threshold, and remote ON/OFF via RUN pin (0.52 V disable / 0.6 V enable). The PFC_OK pin provides dual-function monitoring: latched shutdown above 2.5 V (feedback failure) and active disable below 0.2 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VREF Accuracy | 1.5% @ TJ = 25°C - ensures tight output voltage regulation in PFC stage without external trimming. |
| Start-up Current | ≤90 µA - enables direct startup from high-impedance auxiliary supplies, reducing standby losses. |
| Quiescent Current | ≤5 mA - minimizes power consumption during normal operation, supporting high-efficiency designs. |
| Gate Drive Strength | −600/+800 mA - drives large MOSFET/IGBT gates directly, eliminating need for external drivers in mid-power PFC stages. |
| OVP Threshold | 2.15 V (static), 20 µA (dynamic) - dual-level protection prevents catastrophic overvoltage due to feedback fault or load dump. |
| Voltage Feedforward | 1/V² correction via VFF pin - compensates for line-voltage-dependent gain variation, maintaining PF <0.99 and THD <5% over full input range. |
| Tracking Boost | Enabled via TBO pin - adjusts PFC output voltage proportionally to RMS input voltage, improving light-load efficiency and thermal management. |
Pinout & Package
SO-14 surface-mount package with standard JEDEC outline, rated for industrial temperature range (−25°C to +150°C junction).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (INV) | Inverting input of voltage error amplifier | Accepts resistor-divider feedback from PFC output; sinks current from TBO to enable tracking boost. |
| 2 (COMP) | Error amplifier output | Drives multiplier input; requires external RC compensation network between COMP and INV for loop stability. |
| 3 (MULT) | Main multiplier input | Connects to rectified mains via resistor divider; provides sinusoidal current reference for TM control. |
| 4 (CS) | Current sense comparator input | Detects MOSFET conduction current; triggers turn-off at ~1.08 V (no saturation detection in L6563A). |
| 5 (VFF) | Voltage feedforward input | Derives RMS line voltage via peak-hold circuit; enables 1/V² gain correction for constant power transfer. |
| 6 (TBO) | Tracking boost output | Buffered VFF voltage; sets current sunk from INV to scale PFC output voltage with input line. |
| 7 (PFC_OK) | Output voltage monitor / disable | Latched shutdown if >2.5 V (feedback failure); active disable if <0.2 V (e.g., system sleep mode). |
| 8 (PWM_LATCH) | Fault signaling output | Open-drain high-impedance until latched fault (PFC_OK overvoltage); used to disable downstream PWM controller. |
| 9 (PWM_STOP) | Temporary stop signaling | Pulled low when RUN pin disables IC; allows non-latched pause of DC-DC stage for energy-saving modes. |
| 10 (RUN) | Remote ON/OFF control | 0.52 V disable / 0.6 V enable threshold; supports brownout detection when tied to VFF via resistor divider. |
| 11 (ZCD) | Zero-current detection input | Senses boost inductor demagnetization; negative edge triggers MOSFET turn-on for precise TM timing. |
| 12 (GND) | Analog & power ground | Common return for signal circuitry and gate driver; must be low-inductance connection to minimize noise. |
| 13 (GD) | Gate driver output | Totem-pole stage clamped to ~12 V; drives gate capacitance directly with fast rise/fall times (40/30 ns typical). |
| 14 (VCC) | Supply voltage input | 10.3–22 V operating range; UVLO thresholds at 12 V (on) / 9.5 V (off); includes internal zener clamp (25 V max). |
Key Features
| Feature | Design Value |
|---|---|
| Precision internal reference | 2.5 V ±1.5% tolerance enables stable output regulation without external voltage reference ICs. |
| Voltage feedforward (1/V²) | Compensates control loop gain vs. input voltage, maintaining PF >0.99 and THD <5% from 85–265 VAC. |
| Tracking boost function | Reduces PFC output voltage at low line (e.g., 115 VAC) to cut conduction losses and improve light-load efficiency. |
| Latched feedback failure protection | PFC_OK pin asserts permanent shutdown on open-loop condition, preventing uncontrolled overvoltage and safety hazards. |
| Low-power idle states | Quiescent current drops to 1.5–2.2 mA when disabled via RUN or PFC_OK, supporting Energy Star/Blue Angel compliance. |
Applications
| Desktop PC Power Supply | Server PSU Pre-regulator |
|---|---|
|
Use Scenario: 500–800W ATX or EPS12V power supply meeting IEC61000-3-2 Class D limits. IC Role / Device Role / Timing Role: Transition-mode PFC controller regulating boost stage output to 385–400 VDC while shaping input current. Use Value: Enables single-stage PFC with THD <5% at full load and PF >0.98 across universal input, reducing EMI filter size. |
Use Scenario: Redundant 1 kW+ server PSU requiring high reliability and energy efficiency under variable loading. IC Role / Device Role / Timing Role: Primary PFC controller coordinating with downstream LLC resonant converter via PWM_LATCH/PWM_STOP interface. Use Value: Tracking boost lowers output voltage at 115 VAC, cutting MOSFET conduction loss by ~18% and improving 20% load efficiency by 0.7%. |
| HI-END Audio Amplifier PSU | Industrial Motor Drive Front-end |
|
Use Scenario: High-fidelity audio amplifier with ultra-low-noise, regulated DC bus for Class AB/D output stages. IC Role / Device Role / Timing Role: Precision PFC controller delivering tightly regulated 400 VDC with minimal ripple and harmonic injection into analog circuits. Use Value: 1.5% reference accuracy and low 25 mV CS offset ensure output voltage stability within ±2 V, preserving SNR >110 dB. |
Use Scenario: 3-phase industrial drive front-end using single-phase PFC module for control logic and auxiliary supplies. IC Role / Device Role / Timing Role: Robust PFC controller operating continuously at 60°C ambient with brownout immunity down to 85 VAC (via RUN-VFF tie). Use Value: −25°C to +150°C junction rating and 120 °C/W RthJA allow reliable operation in enclosed cabinets without forced air cooling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transition-mode PFC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC28051 (Texas Instruments) | Fixed-frequency CCM/TM hybrid; no 1/V² feedforward; higher quiescent current (1.5 mA vs. 5 mA running, but no low-idle mode). | Lacks tracking boost and latched OVP; requires external circuitry for feedback failure protection. | Prefer for cost-sensitive CCM designs where THD <8% suffices and light-load efficiency is secondary. |
| L4981A (STMicroelectronics) | Peak-current-mode CCM controller; no TM operation; higher gate drive (±1 A); lacks VFF, TBO, and PFC_OK latch. | Designed for >1 kW fixed-frequency PFC; incompatible with TM topology and low-THD requirements. | Select only for legacy CCM designs needing higher power density and no transition-mode optimization. |
Compared with UCC28051 and L4981A, the L6563A uniquely combines TM operation, 1/V² feedforward, and integrated latched protection-making it optimal for EN61000-3-2-compliant, high-efficiency, medium-power PFC stages where THD, light-load behavior, and safety robustness are critical.
Availability
L6563A is available at Aetrix Electronics and suitable for desktop PC power supplies, server PSUs, HI-END audio amplifiers, and industrial motor drive front-ends requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for L6563A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, analog, MCU, and automotive ICs with vertical manufacturing and broad industrial qualification.
The L6563A belongs to ST's high-performance PFC controller product line, engineered specifically for transition-mode AC-DC pre-regulators targeting >350W EN61000-3-2 compliance with emphasis on THD reduction, efficiency across load range, and system-level safety integration.
FAQ
What is the key functional difference between L6563 and L6563A?
The sole functional difference is the absence of inductor saturation detection in the L6563A. Pin 4 (CS) in the L6563 includes a 1.7 V latch-off level to shut down the IC upon saturation; this feature is omitted in the L6563A. All other specifications-including pinout, electrical characteristics, protection features, and application circuitry-are identical.
Can L6563A implement brownout protection, and how?
Yes. Connect the RUN pin (10) to the VFF pin (5) via a resistor divider to derive a scaled version of the rectified mains peak. When input voltage drops below the RUN disable threshold (0.52 V), the IC shuts down non-latched and asserts PWM_STOP low-enabling coordinated brownout response with downstream converters without latching.
Does L6563A support interfacing with a downstream PWM controller?
Yes. The PWM_LATCH (pin 8) and PWM_STOP (pin 9) outputs provide standardized fault and control signaling. PWM_LATCH goes high during latched faults (e.g., PFC_OK overvoltage) to permanently disable the PWM controller; PWM_STOP goes low during RUN-initiated disable for temporary pauses-supporting Energy Star light-load requirements.
What is the purpose of the TBO pin, and how is it configured?
The TBO pin (6) is a buffered VFF output used to sink current from the INV pin (1) via an external resistor to GND. This current modulates the error amplifier's setpoint, causing the PFC output voltage to track the RMS input voltage-reducing conduction losses at low line and improving light-load efficiency without additional control ICs.
L6563A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Mode:
- Discontinuous (Transition)
- Frequency - Switching:
- -
- Current - Startup:
- 50 µA
- Voltage - Supply:
- 10.3V ~ 22V
- Operating Temperature:
- -25°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SO
L6563A FAQ
1.How can I place an order for L6563A through Aetrix?
Please submit a Request for Quotation (RFQ) for L6563A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for L6563A reliable?
The price and inventory of L6563A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for L6563A is usually 5 days.
3.What payment methods are accepted for L6563A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for L6563A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for L6563A?
L6563A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your L6563A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for L6563A?
For technical support, including L6563A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your L6563A requirements.
6.How does Aetrix verify that L6563A is sourced from the original manufacturer or authorized distributors?
All L6563A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that L6563A meets industry standards.
7.What is the process for return or replacement of L6563A?
All L6563A units undergo pre-shipment inspection (PSI). If there is an issue with L6563A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The L6563A part is unused and in its original packaging.
Return procedure for L6563A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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