STMicroelectronics L6564TD
- Part No.:
- L6564TD
- Manufacturer:
- STMicroelectronics
- Category:
- PFC (Power Factor Correction)
- Package:
- 10-SOP (0.154", 3.90mm Width)
- Datasheet:
-
L6564TD.pdf
- Description:
- IC PFC CTRLR TRANSITION 10SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,474
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
L6564TD from STMicroelectronics is a 10-pin transition-mode (TM) power factor correction (PFC) controller IC designed for high-efficiency AC-DC pre-regulators. It integrates a current-mode PWM controller, 1% accurate internal voltage reference (2.5 V @ 25 °C), bidirectional 1/V² voltage feedforward, and a totem-pole gate driver delivering −600/+800 mA peak current in SSOP10 package. It enables EN61000-3-2 and JEITA-MITI compliant PFC stages up to 400 W in desktop/server SMPS and LED luminaires.
For engineers reviewing the L6564TD datasheet, L6564TD pinout, L6564TD application, or L6564TD equivalent, this page delivers verified technical context, exact pin functions with design meaning, real-world application cards for IEC61000-3-2 compliance, LED driver PFC, server PSU pre-regulation, and brownout-resilient AC-DC adapters - all grounded in ST's official Doc ID 022671 Rev 1.
Technical Context
The L6564TD implements a current-mode control architecture with zero-current detection (ZCD) for transition-mode operation, using a proprietary 1/V² feedforward circuit that dynamically scales the multiplier gain based on rectified mains peak voltage (VFF pin) to maintain low THD across 85–265 VAC input ranges. Its error amplifier features burst-mode inhibition below 2.4 V at COMP pin to prevent overvoltage at light load.
Protection logic includes latched shutdown on feedback loop disconnection (detected via simultaneous PFC_OK > 2.5 V and INV < 1.66 V), inductor saturation detection via 1.7 V CS threshold with automatic restart delay (150–700 µs), and AC brownout response triggered by VFF falling below 0.8 V (non-latched) with restart at 0.88 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Operating Range | 10.3–22.5 V: Supports wide-input auxiliary supplies; UVLO hysteresis of 2.7 V ensures clean startup/shutdown. |
| Internal Reference Voltage | 2.5 V ±1% @ TJ = 25 °C: Enables precise output voltage regulation (e.g., 385 V DC) without external trimming. |
| Gate Driver Output | −600/+800 mA peak: Directly drives medium-power MOSFETs (e.g., STP8NK80ZFP) without external buffers in ≤400 W designs. |
| Startup Current | ≤180 µA @ VCC = 10 V: Minimizes bleed resistor losses and enables high-impedance startup networks. |
| CS Overcurrent Threshold | 1.7 V typical: Triggers immediate shutdown on boost inductor saturation, protecting MOSFET and diode from thermal runaway. |
| VFF Brownout Threshold | 0.8 V (shutdown), 0.88 V (restart): Provides fast, non-latched response to AC line sags while maintaining system recoverability. |
| PFC_OK OVP Threshold | 2.5 V rising, 2.4 V falling: Enables accurate output overvoltage protection with hysteresis to avoid nuisance tripping during transients. |
Pinout & Package
Package: SSOP10 (3.9 mm × 4.9 mm, 0.65 mm pitch), RoHS-compliant, rated for −40 to +150 °C junction temperature (RthJA = 120 °C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 INV | Inverting input of voltage error amplifier | Receives scaled PFC output voltage; clamped at 8–9 V to prevent latch-up during fault conditions. |
| 2 COMP | Error amplifier output | Drives multiplier input; clamped at 5.7–6.7 V high / 2.1–2.4 V low; drops below 2.4 V triggers burst mode at zero load. |
| 3 MULT | Main multiplier input | Accepts rectified mains via resistor divider (0–3 V range); linear operation enables accurate current shaping across universal AC input. |
| 4 CS | Current sense comparator input | Detects MOSFET conduction current; 1.7 V threshold triggers saturation protection; includes 70–300 ns leading-edge blanking. |
| 5 VFF | Voltage feedforward input | Connects to peak-hold RC network (RFF = 100 kΩ–2 MΩ); provides 1/V² correction and brownout detection (0.8 V trip). |
| 6 PFC_OK | Output voltage monitor / disable | 2.5 V OVP trip; 0.23 V remote shutdown; latches off if INV < 1.66 V simultaneously - detects open-feedback faults. |
| 7 ZCD | Zero-current detector input | Senses boost inductor demagnetization; negative edge triggers MOSFET turn-on; arming voltage 1.1–1.9 V, trigger 0.5–1 V. |
| 8 GND | Signal and gate-driver return | Single ground pin for analog and power sections; layout requires low-inductance connection to minimize noise coupling. |
| 9 GD | Gate driver output | Totem-pole stage clamped at 10–15 V; 0.6–1.4 V low-level ensures MOSFET full turn-off; rise/fall times ≤150 ns. |
| 10 VCC | IC supply input | 10.3–22.5 V operating range; internal 25 V Zener clamp protects against transients; 0.1 µF bypass recommended. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional 1/V² feedforward | Compensates gain vs. line voltage across 85–265 VAC; improves THD under both line drop and surge conditions. |
| Latched feedback failure protection | Shuts down permanently if PFC_OK > 2.5 V AND INV < 1.66 V - prevents uncontrolled output rise due to open feedback divider. |
| Inductor saturation detection | 1.7 V CS threshold with auto-restart delay (150–700 µs) avoids destructive current spikes during core saturation. |
| Low-power idle states | Quiescent current drops to 1.5–2.5 µA when PFC_OK < 0.23 V or VPFC_OK > VPFC_OK_S AND VINV < VFFD - enables standby compliance. |
| Integrated gate driver | −600/+800 mA drive strength eliminates need for external drivers in ≤400 W PFC stages; active pull-down during UVLO prevents shoot-through. |
Applications
| IEC61000-3-2 Compliant SMPS | LED Luminaire PFC Stage |
|---|---|
Use Scenario: Desktop PC and server power supplies requiring harmonic current compliance per EN61000-3-2 Class D. IC Role / Device Role / Timing Role: Primary PFC controller managing boost converter timing, current shaping, and output regulation in transition mode. Use Value: Achieves <10% THD across 20–100% load with 85–265 VAC input, validated in ST's EVL6564-100W demo board. | Use Scenario: High-bay LED drivers operating from universal AC input with strict efficiency and reliability requirements. IC Role / Device Role / Timing Role: Front-end PFC controller ensuring stable 400 V DC bus for downstream constant-current LED drivers. Use Value: Maintains >0.99 PF and <12% THD at 100 W load while supporting outdoor-rated −40 to +125 °C ambient operation. |
| High-End AC-DC Adapter | Brownout-Resilient Industrial PSU |
Use Scenario: 65–120 W laptop adapters needing compact, high-density PFC with minimal external components. IC Role / Device Role / Timing Role: Transition-mode PFC controller enabling fixed-off-time operation and integrated gate drive for single-stage design. Use Value: Reduces BOM count by eliminating external driver and reference; SSOP10 footprint saves >30% PCB area vs. SO16 alternatives. | Use Scenario: Factory automation PSUs subject to frequent AC line sags and surges in industrial environments. IC Role / Device Role / Timing Role: PFC supervisor providing fast brownout detection (VFF < 0.8 V) and graceful restart (VFF > 0.88 V) without latching. Use Value: Prevents unexpected shutdown during momentary dips; maintains system uptime while protecting downstream converters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PFC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ICE3PCS01G | Fixed-frequency CCM PFC controller; no ZCD pin; requires external gate driver; higher quiescent current (≈1.2 mA). | Targeted at higher-power (>500 W), lower-THD CCM designs; lacks TM-specific protections like inductor saturation detection. | Select when CCM operation and tighter THD (<5%) at full load are prioritized over light-load efficiency and component count. |
| L6562AD | Legacy TM PFC controller; no 1/V² feedforward; only basic OVP; 500 mA sink/source gate drive; SO8 package. | Cost-sensitive, lower-power (<200 W) designs where THD <15% and brownout resilience are secondary. | Choose for legacy compatibility or cost-driven projects where advanced feedforward and latched FFP are not required. |
Compared with ICE3PCS01G and L6562AD, the L6564TD uniquely combines transition-mode operation with bidirectional 1/V² correction, latched feedback failure protection, and integrated high-current gate drive - making it optimal for compact, robust, standards-compliant PFC stages from 100–400 W.
Availability
L6564TD is available at Aetrix Electronics and suitable for IEC61000-3-2 compliant SMPS, LED luminaire front-ends, and industrial AC-DC adapters requiring stable component supply, long-term lifecycle support, and guaranteed outdoor-grade temperature performance.
Supply support for L6564TD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog chips for automotive, industrial, and consumer markets.
The L6564TD belongs to ST's PFC Controller product line, engineered specifically for high-efficiency, low-THD transition-mode boost pre-regulators targeting energy-efficient AC-DC conversion in computing, lighting, and industrial power systems.
FAQ
What is the purpose of the VFF pin and how must it be configured?
The VFF pin provides the DC voltage representing the peak rectified mains voltage for 1/V² feedforward correction and brownout detection. It must be connected to GND via a resistor (100 kΩ–2 MΩ) and capacitor (typically 1 µF) to form a peak-hold circuit. Direct grounding is prohibited; voltage must stay within 1–3 V for linear operation, with shutdown triggered below 0.8 V.
How does the L6564TD protect against boost inductor saturation?
It monitors the CS pin voltage and triggers an immediate shutdown when it exceeds 1.7 V (typical), indicating abnormal current rise due to core saturation. After a programmable delay (150–700 µs), the IC automatically attempts restart. This prevents MOSFET overstress and ensures safe recovery without manual intervention.
Can the L6564TD be used in continuous conduction mode (CCM)?
No - the L6564TD is exclusively a transition-mode (TM) controller. Its ZCD pin and internal timing logic are optimized for zero-current switching in discontinuous/transition boundary mode. It lacks CCM-specific features such as ramp compensation, fixed-frequency oscillator, or average-current sensing interfaces required for stable CCM operation.
What happens during feedback loop disconnection, and how is it detected?
When the feedback divider opens, PFC_OK rises above 2.5 V while INV falls below 1.66 V. The L6564TD detects this dual condition and enters latched shutdown - halting all switching until VCC is cycled below 6 V. This prevents uncontrolled output voltage rise and potential damage to downstream components, unlike non-latched OVP-only responses.
L6564TD Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 10-SOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Mode:
- Discontinuous (Transition)
- Frequency - Switching:
- -
- Current - Startup:
- 90 µA
- Voltage - Supply:
- 10.3V ~ 22.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-SSOP
L6564TD FAQ
1.How can I place an order for L6564TD through Aetrix?
Please submit a Request for Quotation (RFQ) for L6564TD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for L6564TD reliable?
The price and inventory of L6564TD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for L6564TD is usually 5 days.
3.What payment methods are accepted for L6564TD?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for L6564TD transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for L6564TD?
L6564TD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your L6564TD order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for L6564TD?
For technical support, including L6564TD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your L6564TD requirements.
6.How does Aetrix verify that L6564TD is sourced from the original manufacturer or authorized distributors?
All L6564TD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that L6564TD meets industry standards.
7.What is the process for return or replacement of L6564TD?
All L6564TD units undergo pre-shipment inspection (PSI). If there is an issue with L6564TD, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The L6564TD part is unused and in its original packaging.
Return procedure for L6564TD:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
L6564TD Tags

-
ICE2PCS01GXUMA1
Infineon Technologies
-
NCP1654BD133R2G
onsemi
-
MC33262DR2G
onsemi

-
ICE3PCS03GXUMA1
Infineon Technologies
-
NCP1631DR2G
onsemi

-
L4981BD013TR
STMicroelectronics

-
UCC28070DWR
Texas Instruments

-
UCC28070PWR
Texas Instruments

-
UC3854DWTR
Texas Instruments

-
L4981AD013TR
STMicroelectronics
-
UCC2817D
Texas Instruments

-
UC2854BDWTR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

