STMicroelectronics L6585DE

Overview

L6585DE from STMicroelectronics is a dual-function integrated circuit combining a transition-mode PFC controller and a half-bridge ballast controller for fluorescent lamp electronic ballasts. It delivers ±3 % oscillator precision, 1.2 µs dead time, programmable preheating/ignition timing, choke saturation detection, and end-of-life protection compliant with lamp-to-ground and capacitor-to-ground configurations. Designed for 220–240 VAC mains-fed 30–160 W CFL and T5/T8 ballasts.

For engineers reviewing the L6585DE datasheet, L6585DE pinout, L6585DE application, or L6585DE equivalent, key selection criteria include TM-PFC THD optimization capability, dual-stage protection coordination (HBCS 3-level sensing, Tch-based preheat timing), integrated bootstrap diode replacement, and compatibility with standard SO-20 PCB layouts in lighting control designs.

Technical Context

The L6585DE integrates two independent control loops: a voltage-mode PFC error amplifier (2.52 V reference, 80 dB gain, 1 MHz GBW) driving a current-mode multiplier with THD optimizer, and a state-machine-based ballast controller managing preheat, ignition, and run modes via EOI, Tch, and HBCS feedback. Both sections share a common VCC supply with internal 17.1 V Zener clamp and UVLO (14.3 V turn-on / 10.3 V turn-off).

Its half-bridge drivers feature synchronized bootstrap operation (patented DMOS replacing external diode), 290 mA source / 480 mA sink capability per side, and three-tier HBCS sensing (1.05 V run-mode current limit, 1.6 V ignition-mode voltage clamp, 2.75 V hard-switching latch at ~350 events). PFC gate drive provides 300 mA source / 600 mA sink with ZCD zero-current detection and 200 ns leading-edge blanking.

Key Specifications

Pinout & Package

Package: SO-20 (Small Outline, 20-pin, 0.65 mm pitch, body size 12.8 × 7.5 mm), RoHS-compliant, rated for TJ = –40 to +150 °C.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PFC + ballast control applications.

Compared with IR2159SPBF and L6574D, the L6585DE uniquely integrates TM-PFC with THD optimization and ballast control in one SO-20 package, enabling single-chip 30–160 W ballasts with EN 61347-2-3 compliance, whereas alternatives require ≥2 ICs and lack coordinated fault handling between PFC and half-bridge stages.

Availability

L6585DE is available at Aetrix Electronics and suitable for compact fluorescent lamp (CFL) ballasts, T5/T8 linear fluorescent systems, LED driver auxiliary supplies, and industrial UV-C germicidal lamp control requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for L6585DE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, MCU, power, and sensor solutions for automotive, industrial, and consumer markets.

The L6585DE belongs to ST's Lighting & Power Conversion IC product line, engineered specifically for high-reliability, single-chip electronic ballast control in energy-efficient fluorescent and specialty lamp systems - emphasizing protection coordination, THD reduction, and topology flexibility.

FAQ

What is the minimum preheat time achievable with the L6585DE's Tch pin?

The Tch pin supports preheat times down to 0.3 s using a 100 kΩ resistor and 10 nF capacitor (Rd = 100 kΩ, Cd = 10 nF), verified per Section 1.2 of the datasheet. Charging current is 31 µA; voltage threshold is 4.63 V. Shorter durations risk insufficient cathode heating and premature lamp failure - ST recommends ≥0.5 s for 23 W CFLs.

Can the L6585DE operate without the external bootstrap capacitor?

No. The BOOT pin requires a minimum 100 nF ceramic capacitor between BOOT and OUT pins to sustain high-side driver operation. Omitting it causes immediate HSD undervoltage lockout and latch-up. The integrated DMOS replaces only the external bootstrap diode - not the capacitor - as confirmed in Table 2 and Figure 20 of the datasheet.

How does the THD optimizer improve performance compared to standard multipliers?

The THD optimizer applies dynamic gain correction to the multiplier's transfer function, compensating for nonlinearities in the rectified mains waveform and error amplifier output. This reduces 3rd and 5th harmonic currents by up to 40 %, achieving <10 % THD at 180 VAC input - versus >15 % with unoptimized multipliers - as measured in Figure 5 and Section 5.2.3 of the datasheet.

Is the L6585DE compatible with 115 VAC input mains?

Yes, but with design constraints. The PFC section operates down to 85 VAC input when configured with appropriate bulk capacitor (≥450 V rating) and voltage divider on INV/MULT pins. However, preheat/ignition timing must be extended (e.g., Tch = 2.2 s) and EOL thresholds recalibrated - ST validates operation only for 220–240 VAC in production ballast reference designs.